[coreboot] Patch set updated for coreboot: 9a09c09 Make hotkeys work
Vladimir Serbinenko (phcoder@gmail.com)
gerrit at coreboot.org
Tue Mar 12 21:04:03 CET 2013
Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2664
-gerrit
commit 9a09c0961424a9377c9f774663a2ff18b0316e19
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date: Tue Mar 12 20:57:33 2013 +0100
Make hotkeys work
Change-Id: I3a2dbbaca323f67bf027f526c0e24aa04cb9e3a3
Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
src/arch/x86/boot/smbios.c | 4 +-
src/device/pci_rom.c | 3 --
src/ec/lenovo/h8/acpi/ec.asl | 97 ++++++++++++++++++++++++++---------
src/lib/hardwaremain.c | 4 ++
src/mainboard/lenovo/x201/Kconfig | 8 +++
src/mainboard/lenovo/x201/mainboard.c | 5 ++
src/northbridge/intel/gm45/raminit.c | 11 ++++
src/northbridge/intel/i945/raminit.c | 2 -
8 files changed, 103 insertions(+), 31 deletions(-)
diff --git a/src/arch/x86/boot/smbios.c b/src/arch/x86/boot/smbios.c
index 308336a..34aa175 100644
--- a/src/arch/x86/boot/smbios.c
+++ b/src/arch/x86/boot/smbios.c
@@ -133,9 +133,9 @@ static int smbios_write_type0(unsigned long *current, int handle)
t->bios_release_date = smbios_add_string(t->eos, COREBOOT_DMI_DATE);
if (strlen(CONFIG_LOCALVERSION))
- t->bios_version = smbios_add_string(t->eos, CONFIG_LOCALVERSION);
+ t->bios_version = smbios_add_string(t->eos, "CBET4000 " CONFIG_LOCALVERSION);
else
- t->bios_version = smbios_add_string(t->eos, COREBOOT_VERSION);
+ t->bios_version = smbios_add_string(t->eos, "CBET4000 " COREBOOT_VERSION);
#else
#define SPACES \
" "
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
index 0338a06..bb0d760 100644
--- a/src/device/pci_rom.c
+++ b/src/device/pci_rom.c
@@ -34,7 +34,6 @@ struct rom_header *pci_rom_probe(struct device *dev)
struct rom_header *rom_header;
struct pci_data *rom_data;
- printk (BIOS_ERR, "PCI_ROM_PROBE\n");
/* If it's in FLASH, then don't check device for ROM. */
rom_header = cbfs_load_optionrom(CBFS_DEFAULT_MEDIA, dev->vendor,
dev->device, NULL);
@@ -133,8 +132,6 @@ struct rom_header *pci_rom_load(struct device *dev,
unsigned int rom_size;
unsigned int image_size=0;
- printk (BIOS_ERR, "PCI_ROM_LOAD\n");
-
do {
/* Get next image. */
rom_header = (struct rom_header *)((void *) rom_header
diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl
index c5db891..8f7e76f 100644
--- a/src/ec/lenovo/h8/acpi/ec.asl
+++ b/src/ec/lenovo/h8/acpi/ec.asl
@@ -27,7 +27,6 @@ Device(EC)
Name (_GPE, 0x11)
Mutex (ECLK, 0)
- Name (BTN, 0)
OperationRegion(ERAM, EmbeddedControl, 0x00, 0x100)
Field (ERAM, ByteAcc, NoLock, Preserve)
@@ -87,7 +86,7 @@ Device(EC)
/* Sleep Button pressed */
Method(_Q13, 0, NotSerialized)
{
- Notify(\_SB.PCI0.LPCB.EC.SLPB, 0x80)
+ Notify(^SLPB, 0x80)
}
/* Brightness up GPE */
@@ -123,12 +122,12 @@ Device(EC)
Method(_Q2A, 0, NotSerialized)
{
- Notify(\_SB.PCI0.LPCB.EC.LID, 0x80)
+ Notify(^LID, 0x80)
}
Method(_Q2B, 0, NotSerialized)
{
- Notify(\_SB.PCI0.LPCB.EC.LID, 0x80)
+ Notify(^LID, 0x80)
}
@@ -136,110 +135,160 @@ Device(EC)
Method (_Q10, 0, NotSerialized)
{
- Store (0x1001, BTN)
+ ^HKEY.RHK (0x01)
}
Method (_Q11, 0, NotSerialized)
{
- Store (0x1002, BTN)
+ ^HKEY.RHK (0x02)
}
Method (_Q12, 0, NotSerialized)
{
- Store (0x1003, BTN)
+ ^HKEY.RHK (0x03)
}
Method (_Q64, 0, NotSerialized)
{
- Store (0x1005, BTN)
+ ^HKEY.RHK (0x05)
}
Method (_Q65, 0, NotSerialized)
{
- Store (0x1006, BTN)
+ ^HKEY.RHK (0x06)
}
Method (_Q17, 0, NotSerialized)
{
- Store (0x1008, BTN)
+ ^HKEY.RHK (0x08)
}
Method (_Q66, 0, NotSerialized)
{
- Store (0x100A, BTN)
+ ^HKEY.RHK (0x0A)
}
Method (_Q1A, 0, NotSerialized)
{
- Store (0x100B, BTN)
+ ^HKEY.RHK (0x0B)
}
Method (_Q1B, 0, NotSerialized)
{
- Store (0x100C, BTN)
+ ^HKEY.RHK (0x0C)
}
Method (_Q62, 0, NotSerialized)
{
- Store (0x100D, BTN)
+ ^HKEY.RHK (0x0D)
}
Method (_Q60, 0, NotSerialized)
{
- Store (0x100E, BTN)
+ ^HKEY.RHK (0x0E)
}
Method (_Q61, 0, NotSerialized)
{
- Store (0x100F, BTN)
+ ^HKEY.RHK (0x0F)
}
Method (_Q1F, 0, NotSerialized)
{
- Store (0x1012, BTN)
+ ^HKEY.RHK (0x12)
}
Method (_Q67, 0, NotSerialized)
{
- Store (0x1013, BTN)
+ ^HKEY.RHK (0x13)
}
Method (_Q63, 0, NotSerialized)
{
- Store (0x1014, BTN)
+ ^HKEY.RHK (0x14)
}
Method (_Q19, 0, NotSerialized)
{
- Store (0x1018, BTN)
+ ^HKEY.RHK (0x18)
}
Method (_Q1C, 0, NotSerialized)
{
- Store (0x1019, BTN)
+ ^HKEY.RHK (0x19)
}
Method (_Q1D, 0, NotSerialized)
{
- Store (0x101A, BTN)
+ ^HKEY.RHK (0x1A)
}
Device (HKEY)
{
Name (_HID, EisaId ("IBM0068"))
+ Name (BTN, 0)
+ /* MASK */
+ Name (DHKN, 0x080C)
+ /* Effective Mask */
+ Name (EMSK, 0)
+ Name (EN, 0)
Method (_STA, 0, NotSerialized)
{
Return (0x0F)
}
Method (MHKP, 0, NotSerialized)
{
- Store (^^BTN, Local0)
+ Store (BTN, Local0)
If (LEqual (Local0, Zero)) {
Return (Zero)
}
- Store (Zero, ^^BTN)
+ Store (Zero, BTN)
+ Add (Local0, 0x1000, Local0)
Return (Local0)
}
+ /* Report event */
+ Method (RHK, 1, NotSerialized) {
+ ShiftLeft (One, Subtract (Arg0, 1), Local0)
+ If (And (EMSK, Local0)) {
+ Store (Arg0, BTN)
+ Notify (HKEY, 0x80)
+ }
+ }
+ Method (MHKC, 1, NotSerialized) {
+ If (Arg0) {
+ Store (DHKN, EMSK)
+ }
+ Else
+ {
+ Store (Zero, EMSK)
+ }
+ Store (Arg0, EN)
+ }
+ Method (MHKM, 2, NotSerialized) {
+ If (LLessEqual (Arg0, 0x20)) {
+ ShiftLeft (One, Subtract (Arg0, 1), Local0)
+ If (Arg1)
+ {
+ Or (DHKN, Local0, DHKN)
+ }
+ Else
+ {
+ And (DHKN, Not (Local0), DHKN)
+ }
+ If (EN)
+ {
+ Store (DHKN, EMSK)
+ }
+ }
+ }
+ Method (MHKA, 0, NotSerialized)
+ {
+ Return (0x07FFFFFF)
+ }
+ Method (MHKV, 0, NotSerialized)
+ {
+ Return (0x0100)
+ }
}
#include "ac.asl"
diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c
index 4070d71..85c05f5 100644
--- a/src/lib/hardwaremain.c
+++ b/src/lib/hardwaremain.c
@@ -125,6 +125,7 @@ void hardwaremain(int boot_complete)
suspend_resume();
post_code(0x8a);
#endif
+
timestamp_add_now(TS_CBMEM_POST);
#if CONFIG_WRITE_HIGH_TABLES
@@ -133,11 +134,14 @@ void hardwaremain(int boot_complete)
#endif
timestamp_add_now(TS_WRITE_TABLES);
+
/* Now that we have collected all of our information
* write our configuration tables.
*/
lb_mem = write_tables();
+
timestamp_add_now(TS_LOAD_PAYLOAD);
+
payload = cbfs_load_payload(CBFS_DEFAULT_MEDIA,
CONFIG_CBFS_PREFIX "/payload");
if (! payload)
diff --git a/src/mainboard/lenovo/x201/Kconfig b/src/mainboard/lenovo/x201/Kconfig
index a7422ba..150e298 100644
--- a/src/mainboard/lenovo/x201/Kconfig
+++ b/src/mainboard/lenovo/x201/Kconfig
@@ -29,8 +29,16 @@ config MAINBOARD_DIR
config MAINBOARD_PART_NUMBER
string
+ default "3626EN1"
+
+config MAINBOARD_VERSION
+ string
default "ThinkPad X201"
+config MAINBOARD_VENDOR
+ string
+ default "LENOVO"
+
config MMCONF_BASE_ADDRESS
hex
default 0xe0000000
diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c
index d46a838..dae8bdf 100644
--- a/src/mainboard/lenovo/x201/mainboard.c
+++ b/src/mainboard/lenovo/x201/mainboard.c
@@ -42,6 +42,7 @@
#include <pc80/keyboard.h>
#include <cpu/x86/lapic.h>
#include <device/pci.h>
+#include <smbios.h>
static acpi_cstate_t cst_entries[] = {
{ 1, 1, 1000, { 0x7f, 1, 2, { 0 }, 1, 0 } },
@@ -182,6 +183,10 @@ static void rcba_config(void)
#endif
}
+const char *smbios_mainboard_version(void)
+{
+ return "Lenovo X201";
+}
static void mainboard_enable(device_t dev)
{
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
index a8a8f24..68c8120 100644
--- a/src/northbridge/intel/gm45/raminit.c
+++ b/src/northbridge/intel/gm45/raminit.c
@@ -1685,8 +1685,19 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
/* Check for bad warm boot. */
reset_on_bad_warmboot();
+
/***** From now on, program according to collected infos: *****/
+ /* Program DRAM type. */
+ switch (sysinfo->spd_type) {
+ case DDR2:
+ MCHBAR8(0x1434) |= (1 << 7);
+ break;
+ case DDR3:
+ MCHBAR8(0x1434) |= (3 << 0);
+ break;
+ }
+
/* Program system memory frequency. */
set_system_memory_frequency(timings);
/* Program IGD memory frequency. */
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 4250c80..478a9c8 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -534,7 +534,6 @@ static void sdram_detect_cas_latency_and_ram_speed(struct sys_info * sysinfo, u8
lowest_common_cas = 5;
}
PRINTK_DEBUG("lowest common cas = %d\n", lowest_common_cas);
- (void) lowest_common_cas;
for (j = max_ram_speed; j>=0; j--) {
int freq_cas_mask = cas_mask;
@@ -1977,7 +1976,6 @@ static void sdram_program_pll_settings(struct sys_info *sysinfo)
MCHBAR16(CPCTL) &= ~(1 << 11);
reg16 = MCHBAR16(CPCTL); /* Read back register to activate settings */
- (void) reg16;
}
static void sdram_program_graphics_frequency(struct sys_info *sysinfo)
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