[coreboot] New patch to review for coreboot: c3d086e ASROCK Fam14 DSDT: Add OSC method

[Mike Loptien (mike.loptien@se-eng.com)]

Mike Loptien (mike.loptien at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2739

-gerrit

commit c3d086e49f33ce939a4366fdb5d3be8dd937152c
Author: Mike Loptien <mike.loptien at se-eng.com>
Date:   Fri Mar 15 13:22:32 2013 -0600

    ASROCK Fam14 DSDT: Add OSC method
    
    The _OSC method is used to tell the OS what capabilities
    it can take control over from the firmware.  This method
    is described in chapter 6.2.9 of the ACPI spec v3.0.
    The method takes 4 inputs (UUID, Rev ID, Input Count,
    and Capabilities Buffer) and returns a Capabilites
    Buffer the same size as the input Buffer.  This Buffer
    is generally 3 Dwords long consisting of an Errors
    Dword, a Supported Capabilities Dword, and a Control
    Dword.  The OS will request control of certain
    capabilities and the firmware must grant or deny control
    of those features.  We do not want to have control over
    anything so let the OS control as much as it can.
    
    The _OSC method is required for PCIe devices and dmesg
    checks for its existence and issues an error if it is
    not found.
    
    This is the same change made to Persimmon with Change-ID
    I149428:
    http://review.coreboot.org/#/c/2684/
    
    Change-Id: I2701d915338294bdade2ad334b22a51db980892e
    Signed-off-by: Mike Loptien <mike.loptien at se-eng.com>
---
 src/mainboard/asrock/e350m1/dsdt.asl | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/asrock/e350m1/dsdt.asl b/src/mainboard/asrock/e350m1/dsdt.asl
index bc45435..feec7c9 100644
--- a/src/mainboard/asrock/e350m1/dsdt.asl
+++ b/src/mainboard/asrock/e350m1/dsdt.asl
@@ -1157,8 +1157,20 @@ DefinitionBlock (
 		Device(PCI0) {
 			External (TOM1)
 			External (TOM2)
-			Name(_HID, EISAID("PNP0A03"))
+			Name(_HID, EISAID("PNP0A08"))	/* PCI Express Root Bridge */
+			Name(_CID, EISAID("PNP0A03"))	/* PCI Root Bridge */
 			Name(_ADR, 0x00180000)	/* Dev# = BSP Dev#, Func# = 0 */
+
+			/* Operating System Capabilities Method */
+			Method(_OSC,4)
+			{	/* Check for proper PCI/PCIe UUID */
+				If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
+				{
+					/* Let OS control everything */
+					Return (Arg3)
+				}
+			}
+
 			Method(_BBN, 0) { /* Bus number = 0 */
 				Return(0)
 			}