[coreboot] Patch merged into coreboot/master: 38d9423 haswell: romstage: pass stack pointer and MTRRs

gerrit at coreboot.org gerrit at coreboot.org
Mon Mar 18 20:49:47 CET 2013

the following patch was just integrated into master:
commit 38d9423dbe300514e1ba7224a962650980a96217
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Thu Feb 7 00:03:33 2013 -0600

    haswell: romstage: pass stack pointer and MTRRs
    Instead of hard coding the policy for the stack and MTRR values after
    the cache-as-ram is torn down, allow for the C code to pass those
    policies back to the cache-as-ram assembly file. That way, ramstage
    relocation can use a different stack as well as different MTRR policies.
    Change-Id: Ied024d933f96a12ed0703c51c506586f4b50bd14
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: http://review.coreboot.org/2755
    Tested-by: build bot (Jenkins)
    Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>

Build-Tested: build bot (Jenkins) at Sat Mar 16 00:51:53 2013, giving +1
Reviewed-By: Ronald G. Minnich <rminnich at gmail.com> at Mon Mar 18 20:49:46 2013, giving +2
See http://review.coreboot.org/2755 for details.


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