[coreboot] New patch to review for coreboot: b2f33e2 lynxpoint: fix build failure on non-LP boards
Stefan Reinauer (stefan.reinauer@coreboot.org)
gerrit at coreboot.org
Tue Mar 19 01:59:40 CET 2013
Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2820
-gerrit
commit b2f33e24bf34b5c86b63b5d3a4206af8c541e3d5
Author: Aaron Durbin <adurbin at chromium.org>
Date: Wed Mar 13 14:13:14 2013 -0500
lynxpoint: fix build failure on non-LP boards
There were definitions being used from lp_gpio.h in
pmutil.c that caused a build failure for non-LP boards
since lp_gpio.h was not being included. We could potentially
fix this by including lp_gpio.h unconditionally, but that adds
the risk of re-defining macros previously defined from other
includes. Instead just move the 2 definitions required directly
in pmutil.c.
Change-Id: I363441839353c6ce6bb56d346b87710332763cf5
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
src/southbridge/intel/lynxpoint/lp_gpio.h | 2 --
src/southbridge/intel/lynxpoint/pmutil.c | 6 ++++++
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/southbridge/intel/lynxpoint/lp_gpio.h b/src/southbridge/intel/lynxpoint/lp_gpio.h
index 067b6e2..9666adc 100644
--- a/src/southbridge/intel/lynxpoint/lp_gpio.h
+++ b/src/southbridge/intel/lynxpoint/lp_gpio.h
@@ -28,8 +28,6 @@
#define GPIO_SER_BLINK_CS 0x20
#define GPIO_SER_BLINK_DATA 0x24
#define GPIO_ROUTE(set) (0x30 + ((set) * 4))
-#define GPIO_ALT_GPI_SMI_STS 0x50
-#define GPIO_ALT_GPI_SMI_EN 0x54
#define GPIO_RESET(set) (0x60 + ((set) * 4))
#define GPIO_GLOBAL_CONFIG 0x7c
#define GPIO_IRQ_IS(set) (0x80 + ((set) * 4))
diff --git a/src/southbridge/intel/lynxpoint/pmutil.c b/src/southbridge/intel/lynxpoint/pmutil.c
index 64fc585..a103667 100644
--- a/src/southbridge/intel/lynxpoint/pmutil.c
+++ b/src/southbridge/intel/lynxpoint/pmutil.c
@@ -40,6 +40,12 @@
#include "lp_gpio.h"
#endif
+/* These defines are here to handle the LP variant code dynamically. If these
+ * values are defined in lp_gpio.h but a non-LP board is being built, the build
+ * will fail. */
+#define GPIO_ALT_GPI_SMI_STS 0x50
+#define GPIO_ALT_GPI_SMI_EN 0x54
+
/* Print status bits with descriptive names */
static void print_status_bits(u32 status, const char *bit_names[])
{
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