[coreboot] software hardening research project - request for advices to start

[Gerd Hoffmann]

  Hi,

> > About the test board :
> > At this point, my idea is to use coreboot + Qemu to put my hands on
> > coreboot and try to do what I described.
> That's a great idea since it teaches you about the coreboot build 
> process and its architecture. However since Qemu takes a couple of 
> shortcuts, it's limited in what hardware behaviour you can model.

In particular:
  * Easy CPU bringup.  No microcode loading.  CPUs are there and
    just work ;)
  * Easy northbridge setup.  For example there is need to read spd
    from dimms for ram detection (to be exact it is impossible,
    qemu doesn't emulate that).  There is a special interface instead
    which the firmware can use to detect the virtual hardware.
  * No pesky EC to manage.

Southbridge setup is largely identical to physical hardware, qemu
mainboard emulation simply compiles the regular coreboot southbridge
drivers for the emulated hardware (which is not the case for northbridge
and cpu).

cheers,
  Gerd