[coreboot] Coreboot supports intel baytrail processor?
mario at lesc.ufc.br
Fri Oct 25 00:56:29 CEST 2013
Thanks for the reply, I checked the INTEL reference document.
Can you answer other questions, I am very new in Coreboot world!
My local Intel representative will inform to me in the documentation as I
add specific network and video drivers in the coreboot image?
How to create a make menuconfig for the BYT FSP that not there is in the
Computer Systems Engineer Laboratory
e-mail: mario at lesc.ufc.br
Campus do Pici s/n. Bloco 723, zip:60440-970, Fortaleza-Ceará-Brazil
Phone:+55 (85) 3366 9608 extension:232*
*"Se não puder destacar-se pelo talento, vença pelo esforço"*
2013/10/22 Stojsavljevic, Zoran <zoran.stojsavljevic at intel.com>
> Hello Mario,
> Please, could you download INTEL public document:
> There, on page 11 you can see what in nutshell BYT/any other FSP looks
> like: it is nothing more than SEC and PEI phases of EFI/UEFI BIOS (does
> initialization of the processor, chipset, memory - mrc). Tailored for the
> specific purposes. Coreboot comes on the top of this to initialize ACPI
> (PM), e1000 (net), VGA (video) etc. (more than outlined). And then passes
> control to its payload.
> For BYT FSP you should go to your local INTEL Point of Contact, and
> request access to the restricted documents considering BYT FSP. I know that
> these are intensive INTEL activities to release Proof of Concept for BYT
> FSP with Coreboot. More I cannot reveal. All these you should ask your
> local INTEL representative. Policy of the company. Sorry...
> Most of The Time you should be "intel inside" to be capable to think "out
> of the box".
> From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org]
> On Behalf Of Mário Wilson
> Sent: Monday, October 21, 2013 5:13 PM
> To: ron minnich
> Cc: Stojsavljevic, Zoran; Joshua Kim; coreboot at coreboot.org
> Subject: Re: [coreboot] Coreboot supports intel baytrail processor?
> Good day,
> I'm also looking for information on the FSP to use it in the Bay Trail
> Done reading the documentation and wanted to know if you can answer the
> following questions:
> - If the FSP does initialization processor, chipset, memory and Coreboot
> also does this, how to integrate the binary FSP within the structure of the
> thank you,
> Mário Wilson
> Development Engineer
> Computer Systems Engineer Laboratory
> e-mail: mario at lesc.ufc.br
> Campus do Pici s/n. Bloco 723, zip:60440-970, Fortaleza-Ceará-Brazil
> Phone:+55 (85) 3366 9608 extension:232
> "Se não puder destacar-se pelo talento, vença pelo esforço"
> 2013/9/4 ron minnich <rminnich at gmail.com>
> On Wed, Sep 4, 2013 at 12:53 AM, Stojsavljevic, Zoran
> <zoran.stojsavljevic at intel.com> wrote:
> > Hello Ron,
> > Yes, Baytrail FSP Beta release is already for 4 weeks available in EDS
> (External Design Specifications), but you must be registered with INTEL to
> get Baytrail FSP and it documents. Also, as I stated before, you need OTM
> (Coreboot will come later as part of this picture).
> I'm on the web site and hunting around and it seems, at present, to be
> incomplete. Also, saying FSP is available in beta as an EDS (a spec)
> makes no sense to me. Where's the FSP binary itself?
> For instance, after passing through many links and looking at many
> docs, I am here:
> But all I can are documents, nice looking people, and links that have
> nothing to do with FSP. Where do I go?
> What are the redistribution rights on FSP? I assume we'll be able to
> host the binary at coreboot.org as well as intel.com.
> coreboot mailing list: coreboot at coreboot.org
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