[coreboot] ASUS A8V-E Deluxe RAM initialization issues AND dual-core success story

Michael Büchler mbuechler.3 at gmail.com
Sat Oct 26 21:37:24 CEST 2013


Dear coreboot community,

I'm trying to use coreboot on my second PC and I think I need your help.
I have an ASUS A8V-E Deluxe with coreboot which does work with a single
1GB ECC module, but not with a second identical one. It hangs at jumping
from romstage to coreboot_ram (I hope that's correct). It's last words
are "Jumping to image", then nothing.

I'm attaching two logs from serial console, one with 1x1GB RAM installed
which works, one with 2x1GB which hangs, and also the diff.
Looking at the diff I noticed that in the 2x1GB log there are some
missing lines between
"Copying data from cache to RAM -- switching to use RAM as stack..." and
"Clearing initial memory region: Done".
What should happen in between seems to be omitted, which doesn't make
sense to me, looking at src/cpu/amd/car/post_cache_as_ram.c . With my
little experience I can't figure out what's wrong..

Anything I can do to debug? Do you have an idea?

Some notes:
- 2x1GB starts up with the vendor BIOS but randomly hangs at booting
linux (kernel panic or so)
- 1x1GB works with coreboot and vendor BIOS
- Replacing those 1GB ECC modules (Corsair/Samsung chips) with 512MB ECC
modules (HP/Samsung or MDT/???) leads to the same results (2 modules
fail with coreboot; vendor BIOS unknown)
- 2x512MB non-ECC works!

Why are only 2 modules with ECC failing to boot, but not 2 non-ECC? I
tried commenting out the contents of hw_enable_ecc() in
src/northbridge/amd/amdk8/raminit.c but that didn't change anything.
memtest86+ even still detected ECC (with only one module).

Apart from that I got a little success story: the VIA K8T890 chipset on
this mainboard had a bug in it's first revision, making it incompatible
with dual-core CPUs. I was curious if coreboot also had this limitation,
so I bought a cheap dual-core Opteron 180 and tested it. Vendor BIOS:
one core detected in linux. coreboot: two cores!!
I'm not sure if it's stable because I had two hang-ups last weekend, but
that was probably because I forgot to put in the GPU fan plug.. :)
If anyone knows the details of this chipset bug I'd be very interested.
By the way, the RAM issue is the same with a single-core Athlon 64.

Thanks,
Michael
-------------- next part --------------


coreboot-4.0-4742-g553fe1c Sun Oct 20 19:33:38 CEST 2013 starting...
now booting... romstage


coreboot-4.0-4742-g553fe1c Sun Oct 20 19:33:38 CEST 2013 starting...
now booting... real_main
Enabling routing table for node 00 done.
Enabling UP settings
coherent_ht_finalize
done
core0 started: 
now booting... Core0 started
started ap apicid: * AP 01started

SBLink=00
NC node|link=00
entering optimize_link_incoherent_ht
sysinfo->link_pair_num=0x1
entering ht_optimize_link
pos=0x8a, unfiltered freq_cap=0x8075
pos=0x8a, filtered freq_cap=0x75
pos=0x6e, unfiltered freq_cap=0x75
pos=0x6e, filtered freq_cap=0x75
freq_cap1=0x75, freq_cap2=0x75
dev1 old_freq=0x0, freq=0x6, needs_reset=0x1
dev2 old_freq=0x0, freq=0x6, needs_reset=0x1
width_cap1=0x11, width_cap2=0x11
dev1 input ln_width1=0x4, ln_width2=0x4
dev1 input width=0x1
dev1 output ln_width1=0x4, ln_width2=0x4
dev1 input|output width=0x11
old dev1 input|output width=0x11
dev2 input|output width=0x11
old dev2 input|output width=0x11
after ht_optimize_link for link pair 0, reset_needed=0x1
after optimize_link_read_pointers_chain, reset_needed=0x1
K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 06 VIA HT caps: 0075
ht reset -
soft r

coreboot-4.0-4742-g553fe1c Sun Oct 20 19:33:38 CEST 2013 starting...
now booting... romstage


coreboot-4.0-4742-g553fe1c Sun Oct 20 19:33:38 CEST 2013 starting...
now booting... real_main
Enabling routing table for node 00 done.
Enabling UP settings
coherent_ht_finalize
done
core0 started: 
now booting... Core0 started
started ap apicid: * AP 01started

SBLink=00
NC node|link=00
entering optimize_link_incoherent_ht
sysinfo->link_pair_num=0x1
entering ht_optimize_link
pos=0x8a, unfiltered freq_cap=0x8075
pos=0x8a, filtered freq_cap=0x75
pos=0x6e, unfiltered freq_cap=0x75
pos=0x6e, filtered freq_cap=0x75
freq_cap1=0x75, freq_cap2=0x75
dev1 old_freq=0x6, freq=0x6, needs_reset=0x0
dev2 old_freq=0x6, freq=0x6, needs_reset=0x0
width_cap1=0x11, width_cap2=0x11
dev1 input ln_width1=0x4, ln_width2=0x4
dev1 input width=0x1
dev1 output ln_width1=0x4, ln_width2=0x4
dev1 input|output width=0x11
old dev1 input|output width=0x11
dev2 input|output width=0x11
old dev2 input|output width=0x11
after ht_optimize_link for link pair 0, reset_needed=0x0
after optimize_link_read_pointers_chain, reset_needed=0x0
K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 06 VIA HT caps: 0075
Current fid_cur: 0x10, fid_max: 0x10
Requested fid_new: 0x10
Ram1.00
setting up CPU00 northbridge registers
done.
Ram2.00
Device error
Device error
Device error
Registered
Setting DualDIMMen
200MHz
Interleaved
RAM end at 0x00100000 kB
Lower RAM end at 0x00100000 kB
Ram3
ECC enabled
Initializing memory:  done
Ram4
v_esp=000cff08
testx = 5a5a5a5a
Copying data from cache to RAM -- switching to use RAM as stack... Done
testx = 5a5a5a5a
Disabling cache as ram now 
Clearing initial memory region: Done
Loading image.
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffc00/0x80000
CBFS: CBFS location: 0x0~0x7fc20, align: 64
CBFS: Looking for 'fallback/coreboot_ram' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS:  (unmatched file @0x0: cmos_layout.bin)
CBFS:  - load entry 0x740 file name (32 bytes)...
CBFS:  (unmatched file @0x740: fallback/romstage)
CBFS:  - load entry 0xb200 file name (32 bytes)...
CBFS: Found file (offset=0xb238, len=60432).
CBFS: loading stage fallback/coreboot_ram @ 0x100000 (516152 bytes), entry @ 0x100000
CBFS: stage loaded.
Jumping to image.
POST: 0x80
POST: 0x39
coreboot-4.0-4742-g553fe1c Sun Oct 20 19:33:38 CEST 2013 booting...
POST: 0x40
Enumerating buses...
Show all devs...Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:0f.1: enabled 1
PCI: 00:11.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
I2C: 00:52: enabled 1
I2C: 00:53: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 0
PNP: 002e.5: enabled 0
PNP: 002e.106: enabled 0
PNP: 002e.7: enabled 0
PNP: 002e.107: enabled 1
PNP: 002e.207: enabled 1
PNP: 002e.307: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.9: enabled 1
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 1
PNP: 002e.a: enabled 0
PNP: 002e.b: enabled 1
PCI: 00:12.0: enabled 0
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 DOMAIN: 0000: enabled 1
  PCI: 00:18.0: enabled 1
   PCI: 00:00.0: enabled 1
   PCI: 00:0f.1: enabled 1
   PCI: 00:11.0: enabled 1
    I2C: 00:50: enabled 1
    I2C: 00:51: enabled 1
    I2C: 00:52: enabled 1
    I2C: 00:53: enabled 1
    PNP: 002e.0: enabled 1
    PNP: 002e.1: enabled 1
    PNP: 002e.2: enabled 1
    PNP: 002e.3: enabled 0
    PNP: 002e.5: enabled 0
    PNP: 002e.106: enabled 0
    PNP: 002e.7: enabled 0
    PNP: 002e.107: enabled 1
    PNP: 002e.207: enabled 1
    PNP: 002e.307: enabled 0
    PNP: 002e.8: enabled 0
    PNP: 002e.9: enabled 1
    PNP: 002e.109: enabled 0
    PNP: 002e.209: enabled 0
    PNP: 002e.309: enabled 1
    PNP: 002e.a: enabled 0
    PNP: 002e.b: enabled 1
   PCI: 00:12.0: enabled 0
  PCI: 00:18.1: enabled 1
  PCI: 00:18.2: enabled 1
  PCI: 00:18.3: enabled 1
scan_static_bus for Root Device
setup_bsp_ramtop, TOP MEM: msr.lo = 0x40000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x00000000, msr.hi = 0x00000000
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
CPU_CLUSTER: 0 scanning...
  PCI: 00:18.3 siblings=1
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:18.0 [1022/1100] bus ops
PCI: 00:18.0 [1022/1100] enabled
PCI: 00:18.1 [1022/1101] enabled
PCI: 00:18.2 [1022/1102] enabled
PCI: 00:18.3 [1022/1103] ops
PCI: 00:18.3 [1022/1103] enabled
POST: 0x25
PCI: 00:00.0 [1106/0238] ops
 VIA_X_0 device dump:
00: 06 11 38 02 06 00 30 22 00 00 00 06 00 00 80 00 
10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00 
40: bf 63 08 00 00 00 00 00 01 00 1f c4 00 04 00 01 
50: 01 60 02 00 00 00 00 00 08 00 01 80 00 00 00 00 
60: 08 58 60 00 20 00 11 11 d0 00 00 00 22 06 75 00 
70: 02 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 
80: 02 50 35 00 07 02 00 1f 00 00 00 00 28 00 00 00 
90: 80 00 00 00 00 0f 01 00 00 00 00 00 00 00 00 00 
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 08 00 00 98 00 00 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:00.0 [1106/0238] enabled
Capability: type 0x02 @ 0x80
Capability: type 0x01 @ 0x50
Capability: type 0x08 @ 0x60
flags: 0x0060
PCI: 00:00.0 count: 0003 static_count: 0013
PCI: 00:00.0 [1106/0238] enabled next_unitid: 0013
PCI: pci_scan_bus for bus 00
POST: 0x24
 VIA_X_0 device dump:
00: 06 11 38 02 06 00 30 22 00 00 00 06 00 00 80 00 
10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00 
40: bf 63 08 00 00 00 00 00 01 00 1f c4 00 04 00 01 
50: 01 60 02 00 00 00 00 00 08 00 01 80 00 00 00 00 
60: 08 58 60 00 20 00 11 11 d0 00 00 00 22 06 75 00 
70: 02 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 
80: 02 50 35 00 07 02 00 1f 00 00 00 00 28 00 00 00 
90: 80 00 00 00 00 0f 01 00 00 00 00 00 00 00 00 00 
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 08 00 00 98 00 00 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:00.0 [1106/0238] enabled
PCI: 00:00.1 [1106/0000] ops
 K8x8xx: Enabling NB error reporting: Done
 VIA_X_1 device dump:
00: 06 11 38 12 06 00 00 02 00 00 00 06 00 00 00 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
50: 00 00 00 00 00 00 00 00 81 00 00 00 00 00 00 00 
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:00.1 [1106/1238] enabled
PCI: 00:00.2 [1106/2238] ops
Writeback to ac failed 24
Writeback to af failed 30
 VIA_X_2 device dump:
00: 06 11 38 22 06 00 00 02 00 00 00 06 00 00 00 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
a0: 13 8e 0e 31 30 3c 80 86 7f cf 44 22 24 00 22 30 
b0: 3f 13 00 00 02 00 00 00 00 00 00 00 00 00 00 00 
c0: 20 aa aa 02 50 50 00 00 00 00 00 00 00 00 00 00 
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:00.2 [1106/2238] enabled
PCI: 00:00.3 [1106/3238] ops
 VIA_X_3 device dump:
00: 06 11 38 32 06 00 00 02 00 00 00 06 00 00 00 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
50: 22 22 00 00 00 00 e4 00 00 00 00 00 00 00 00 00 
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
80: ff ff ff 30 00 40 19 00 40 00 00 00 00 00 00 00 
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:00.3 [1106/3238] enabled
PCI: 00:00.4 [1106/4238] enabled
PCI: 00:00.5 [1106/5238] ops
PCI: 00:00.5 [1106/5238] enabled
PCI: 00:00.7 [1106/0000] ops
PCI: 00:00.7 [1106/7238] enabled
PCI: 00:01.0 [1106/b188] bus ops
B188 device dump
00: 06 11 88 b1 07 00 30 02 00 00 04 06 00 00 01 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 20 02 
20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 70 00 00 00 00 00 00 00 00 00 16 00 
40: 91 40 00 44 31 3a 88 b1 00 00 00 00 00 00 00 00 
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
70: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 
80: 0e 70 35 00 07 02 00 1f 00 00 00 00 28 00 00 00 
90: 80 00 00 00 00 08 01 00 00 00 00 00 00 00 00 00 
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
b0: bf 63 08 00 00 00 00 00 00 00 1f c4 00 04 00 00 
c0: 08 00 0b ff 00 00 00 00 00 00 00 00 00 00 00 00 
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:01.0 [1106/b188] enabled
PCI: 00:02.0 [1106/a238] bus ops
Configuring PCIe PEG
00: 06 11 38 a2 00 00 10 00 00 00 04 06 00 00 01 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 
20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00 
40: 10 68 41 00 01 0f 00 00 00 00 10 00 01 0d 00 00 
50: 00 00 01 01 60 00 00 00 00 00 48 00 00 00 00 00 
60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 
70: 05 00 80 01 00 00 00 00 00 00 00 00 00 00 00 00 
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
a0: 01 04 00 00 10 00 00 00 00 00 00 00 00 00 00 00 
b0: 0c 12 40 80 00 00 03 00 00 00 00 00 00 00 00 00 
c0: 03 00 01 00 44 44 44 44 44 44 44 44 00 00 00 00 
d0: 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 0c 07 01 8a f8 00 00 00 01 82 f8 00 00 00 00 00 
f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:02.0 PCIe link timeout
00: 06 11 38 a2 00 00 10 00 00 00 04 06 00 00 01 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 
20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00 
40: 10 68 41 00 01 0f 00 00 00 00 10 00 01 0d 00 00 
50: 00 00 01 01 60 00 00 00 00 00 48 00 00 00 00 00 
60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 
70: 05 00 80 01 00 00 00 00 00 00 00 00 00 00 00 00 
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
a0: 01 04 00 00 30 00 00 00 00 00 00 00 00 00 00 00 
b0: 0c f0 40 80 00 00 03 00 01 00 00 00 00 00 00 00 
c0: 03 00 01 00 44 44 44 44 44 44 44 44 00 00 00 00 
d0: 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 0c 0b 01 8a f8 00 00 00 01 82 f8 00 00 00 00 00 
f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:02.0 [1106/a238] enabled
PCI: 00:03.0 [1106/c238] bus ops
Configuring PCIe PEXs
00: 06 11 38 c2 00 00 10 00 00 00 04 06 00 00 81 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 
20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00 
40: 10 68 41 00 01 0e 00 00 00 00 10 00 41 0c 00 01 
50: 00 00 01 00 60 00 00 00 00 00 48 00 00 00 00 00 
60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 
70: 05 00 80 01 00 00 00 00 00 00 00 00 00 00 00 00 
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
a0: 01 04 00 00 10 00 00 00 00 00 00 00 00 00 00 00 
b0: 3b 59 40 80 00 00 03 00 00 00 00 00 00 00 00 00 
c0: 03 00 01 00 44 44 00 00 00 00 00 00 00 00 00 00 
d0: 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 00 0b 01 8a f8 00 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:03.0 PCIe link timeout
00: 06 11 38 c2 00 00 10 00 00 00 04 06 00 00 81 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 
20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00 
40: 10 68 41 00 01 0e 00 00 00 00 10 00 41 0c 00 01 
50: 00 00 01 00 60 00 00 00 00 00 48 00 00 00 00 00 
60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 
70: 05 00 80 01 00 00 00 00 00 00 00 00 00 00 00 00 
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
a0: 01 04 00 00 10 00 00 00 00 00 00 00 00 00 00 00 
b0: 3b f0 40 80 00 00 03 00 00 00 00 00 00 00 00 00 
c0: 03 00 01 00 44 44 00 00 00 00 00 00 00 00 00 00 
d0: 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 00 0b 01 8a f8 00 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:03.0 [1106/c238] enabled
PCI: 00:03.1 [1106/d238] bus ops
Configuring PCIe PEXs
00: 06 11 38 d2 00 00 10 00 00 00 04 06 00 00 81 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 
20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 02 00 00 
40: 10 68 41 00 01 0e 00 00 00 00 10 00 11 0c 00 02 
50: 00 00 01 00 60 00 00 00 00 00 48 00 00 00 00 00 
60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 
70: 05 00 80 01 00 00 00 00 00 00 00 00 00 00 00 00 
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
a0: 01 04 00 00 10 00 00 00 00 00 00 00 00 00 00 00 
b0: 3b 59 40 80 00 00 03 00 00 00 00 00 00 00 00 00 
c0: 00 00 00 00 04 00 00 00 00 00 00 00 00 00 00 00 
d0: 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 00 0b 00 02 00 00 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:03.1 PCIe link timeout
00: 06 11 38 d2 00 00 10 00 00 00 04 06 00 00 81 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 
20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 02 00 00 
40: 10 68 41 00 01 0e 00 00 00 00 10 00 11 0c 00 02 
50: 00 00 01 00 60 00 00 00 00 00 48 00 00 00 00 00 
60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 
70: 05 00 80 01 00 00 00 00 00 00 00 00 00 00 00 00 
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
a0: 01 04 00 00 10 00 00 00 00 00 00 00 00 00 00 00 
b0: 3b f0 40 80 00 00 03 00 00 00 00 00 00 00 00 00 
c0: 00 00 00 00 04 00 00 00 00 00 00 00 00 00 00 00 
d0: 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 00 0b 00 02 00 00 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:03.1 [1106/d238] enabled
PCI: 00:03.2 [1106/e238] bus ops
Configuring PCIe PEXs
00: 06 11 38 e2 00 00 10 00 00 00 04 06 00 00 81 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 
20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 03 00 00 
40: 10 68 41 00 c1 0e 00 00 00 00 10 00 11 0c 00 03 
50: 00 00 11 00 60 00 00 00 00 00 48 00 00 00 00 00 
60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 
70: 05 00 80 01 00 00 00 00 00 00 00 00 00 00 00 00 
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
a0: 01 04 00 00 10 00 00 00 00 00 00 00 00 00 00 00 
b0: 3b 59 40 80 00 00 03 00 00 00 00 00 00 00 00 00 
c0: 00 00 00 00 04 00 00 00 00 00 00 00 00 00 00 00 
d0: 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 00 0b 00 02 00 00 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:03.2 PCIe link timeout
00: 06 11 38 e2 00 00 10 00 00 00 04 06 00 00 81 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 
20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 03 00 00 
40: 10 68 41 00 c1 0e 00 00 00 00 10 00 11 0c 00 03 
50: 00 00 11 00 60 00 00 00 00 00 48 00 00 00 00 00 
60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 
70: 05 00 80 01 00 00 00 00 00 00 00 00 00 00 00 00 
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
a0: 01 04 00 00 10 00 00 00 00 00 00 00 00 00 00 00 
b0: 3b f0 40 80 00 00 03 00 00 00 00 00 00 00 00 00 
c0: 00 00 00 00 04 00 00 00 00 00 00 00 00 00 00 00 
d0: 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 00 0b 00 02 00 00 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:03.2 [1106/e238] enabled
PCI: 00:03.3 [1106/f238] bus ops
Configuring PCIe PEXs
00: 06 11 38 f2 00 00 10 00 00 00 04 06 00 00 81 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 
20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 04 00 00 
40: 10 68 41 00 01 0e 00 00 00 00 10 00 11 0c 00 04 
50: 00 00 01 00 60 00 00 00 00 00 48 00 00 00 00 00 
60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 
70: 05 00 80 01 00 00 00 00 00 00 00 00 00 00 00 00 
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
a0: 01 04 00 00 10 00 00 00 00 00 00 00 00 00 00 00 
b0: 3b 59 40 80 00 00 03 00 00 00 00 00 00 00 00 00 
c0: 00 00 00 00 04 00 00 00 00 00 00 00 00 00 00 00 
d0: 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 00 0b 00 02 00 00 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:03.3 PCIe link timeout
00: 06 11 38 f2 00 00 10 00 00 00 04 06 00 00 81 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 
20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 04 00 00 
40: 10 68 41 00 01 0e 00 00 00 00 10 00 11 0c 00 04 
50: 00 00 01 00 60 00 00 00 00 00 48 00 00 00 00 00 
60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 
70: 05 00 80 01 00 00 00 00 00 00 00 00 00 00 00 00 
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
a0: 01 04 00 00 10 00 00 00 00 00 00 00 00 00 00 00 
b0: 3b f0 40 80 00 00 03 00 00 00 00 00 00 00 00 00 
c0: 00 00 00 00 04 00 00 00 00 00 00 00 00 00 00 00 
d0: 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 00 0b 00 02 00 00 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:03.3 [1106/f238] enabled
PCI: 00:0d.0 [1274/1371] enabled
PCI: 00:0f.0 [1106/3149] ops
PCI: 00:0f.0 [1106/3149] enabled
PCI: 00:0f.1 [1106/0571] ops
PCI: 00:0f.1 [1106/0571] enabled
PCI: 00:10.0 [1106/3038] ops
PCI: 00:10.0 [1106/3038] enabled
PCI: 00:10.1 [1106/3038] ops
PCI: 00:10.1 [1106/3038] enabled
PCI: 00:10.2 [1106/3038] ops
PCI: 00:10.2 [1106/3038] enabled
PCI: 00:10.3 [1106/3038] ops
PCI: 00:10.3 [1106/3038] enabled
PCI: 00:10.4 [1106/3104] ops
PCI: 00:10.4 [1106/3104] enabled
PCI: 00:10.5 [1106/d104] enabled
PCI: 00:11.0 [1106/3227] bus ops
PCI: 00:11.0 [1106/3227] enabled
PCI: 00:11.5 [1106/3059] enabled
PCI: 00:11.6 [1106/3068] enabled
POST: 0x25
do_pci_scan_bridge for PCI: 00:01.0
PCI: pci_scan_bus for bus 01
POST: 0x24
POST: 0x25
PCI: pci_scan_bus returning with max=001
POST: 0x55
do_pci_scan_bridge returns max 1
do_pci_scan_bridge for PCI: 00:02.0
PCI: pci_scan_bus for bus 02
POST: 0x24
PCI: 02:00.0 [10de/0092] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=002
POST: 0x55
Capability: type 0x01 @ 0x60
Capability: type 0x05 @ 0x68
Capability: type 0x10 @ 0x78
Capability: type 0x10 @ 0x40
ASPM: Enabled L1
do_pci_scan_bridge returns max 2
do_pci_scan_bridge for PCI: 00:03.0
PCI: pci_scan_bus for bus 03
POST: 0x24
POST: 0x25
PCI: pci_scan_bus returning with max=003
POST: 0x55
do_pci_scan_bridge returns max 3
do_pci_scan_bridge for PCI: 00:03.1
PCI: pci_scan_bus for bus 04
POST: 0x24
POST: 0x25
PCI: pci_scan_bus returning with max=004
POST: 0x55
do_pci_scan_bridge returns max 4
do_pci_scan_bridge for PCI: 00:03.2
PCI: pci_scan_bus for bus 05
POST: 0x24
PCI: 05:00.0 [11ab/4362] enabled
POST: 0x25
PCI: pci_scan_bus returning with max=005
POST: 0x55
Capability: type 0x01 @ 0x48
Capability: type 0x03 @ 0x50
Capability: type 0x05 @ 0x5c
Capability: type 0x10 @ 0xe0
Capability: type 0x10 @ 0x40
ASPM: Enabled L0s
do_pci_scan_bridge returns max 5
do_pci_scan_bridge for PCI: 00:03.3
PCI: pci_scan_bus for bus 06
POST: 0x24
POST: 0x25
PCI: pci_scan_bus returning with max=006
POST: 0x55
do_pci_scan_bridge returns max 6
scan_static_bus for PCI: 00:11.0
smbus: PCI: 00:11.0[0]->I2C: 01:50 enabled
smbus: PCI: 00:11.0[0]->I2C: 01:51 enabled
smbus: PCI: 00:11.0[0]->I2C: 01:52 enabled
smbus: PCI: 00:11.0[0]->I2C: 01:53 enabled
PNP: 002e.0 enabled
PNP: 002e.1 enabled
PNP: 002e.2 enabled
PNP: 002e.3 disabled
PNP: 002e.5 disabled
PNP: 002e.106 disabled
PNP: 002e.7 disabled
PNP: 002e.107 enabled
PNP: 002e.207 enabled
PNP: 002e.307 disabled
PNP: 002e.8 disabled
PNP: 002e.9 enabled
PNP: 002e.109 disabled
PNP: 002e.209 disabled
PNP: 002e.309 enabled
PNP: 002e.a disabled
PNP: 002e.b enabled
scan_static_bus for PCI: 00:11.0 done
PCI: pci_scan_bus returning with max=006
POST: 0x55
PCI: pci_scan_bus returning with max=006
POST: 0x55
DOMAIN: 0000 passpw: enabled
scan_static_bus for Root Device done
done
POST: 0x66
found VGA at PCI: 02:00.0
Setting up VGA for PCI: 02:00.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
APIC: 01 missing read_resources
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0 done
PCI: 00:02.0 read_resources bus 2 link: 0
PCI: 00:02.0 read_resources bus 2 link: 0 done
PCI: 00:03.0 read_resources bus 3 link: 0
PCI: 00:03.0 read_resources bus 3 link: 0 done
PCI: 00:03.1 read_resources bus 4 link: 0
PCI: 00:03.1 read_resources bus 4 link: 0 done
PCI: 00:03.2 read_resources bus 5 link: 0
PCI: 00:03.2 read_resources bus 5 link: 0 done
PCI: 00:03.3 read_resources bus 6 link: 0
PCI: 00:03.3 read_resources bus 6 link: 0 done
PCI: 00:10.5 register 10(ffffffff), read-only ignoring it
PCI: 00:10.5 register 14(ffffffff), read-only ignoring it
PCI: 00:10.5 register 18(ffffffff), read-only ignoring it
PCI: 00:10.5 register 1c(ffffffff), read-only ignoring it
PCI: 00:10.5 register 20(ffffffff), read-only ignoring it
PCI: 00:10.5 register 24(ffffffff), read-only ignoring it
PCI: 00:10.5 register 30(ffffffff), read-only ignoring it
PCI: 00:11.0 read_resources bus 1 link: 0
I2C: 01:50 missing read_resources
I2C: 01:51 missing read_resources
I2C: 01:52 missing read_resources
I2C: 01:53 missing read_resources
PCI: 00:11.0 read_resources bus 1 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: 01
  DOMAIN: 0000 child on link 0 PCI: 00:18.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:18.0 child on link 0 PCI: 00:00.0
   PCI: 00:18.0 resource base fc0003 size 0 align 0 gran 0 limit ffff00 flags 1 index 1b8
   PCI: 00:18.0 resource base 3 size 0 align 0 gran 0 limit 1fff000 flags 1 index 1c0
   PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 0
   PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 2
   PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80200 index 1
   PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit ffffffff flags c0000200 index 4
    PCI: 00:00.0
    PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
    PCI: 00:00.1
    PCI: 00:00.2
    PCI: 00:00.3
    PCI: 00:00.4
    PCI: 00:00.5
    PCI: 00:00.5 resource base fecc0000 size 100 align 8 gran 8 limit fecc00ff flags f0000200 index 40
    PCI: 00:00.5 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 10000200 index 61
    PCI: 00:00.7
    PCI: 00:01.0
    PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
    PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
    PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 00:02.0 child on link 0 PCI: 02:00.0
    PCI: 00:02.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
    PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit fffffffff flags 81202 index 24
    PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 02:00.0
     PCI: 02:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 10
     PCI: 02:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 14
     PCI: 02:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 1c
     PCI: 02:00.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 24
     PCI: 02:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
    PCI: 00:03.0
    PCI: 00:03.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
    PCI: 00:03.0 resource base 0 size 0 align 20 gran 20 limit fffffffff flags 81202 index 24
    PCI: 00:03.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 00:03.1
    PCI: 00:03.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
    PCI: 00:03.1 resource base 0 size 0 align 20 gran 20 limit fffffffff flags 81202 index 24
    PCI: 00:03.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 00:03.2 child on link 0 PCI: 05:00.0
    PCI: 00:03.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
    PCI: 00:03.2 resource base 0 size 0 align 20 gran 20 limit fffffffff flags 81202 index 24
    PCI: 00:03.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 05:00.0
     PCI: 05:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
     PCI: 05:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 18
     PCI: 05:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30
    PCI: 00:03.3
    PCI: 00:03.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
    PCI: 00:03.3 resource base 0 size 0 align 20 gran 20 limit fffffffff flags 81202 index 24
    PCI: 00:03.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 00:0d.0
    PCI: 00:0d.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 10
    PCI: 00:0f.0
    PCI: 00:0f.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
    PCI: 00:0f.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
    PCI: 00:0f.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
    PCI: 00:0f.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
    PCI: 00:0f.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
    PCI: 00:0f.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 24
    PCI: 00:0f.1
    PCI: 00:0f.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
    PCI: 00:10.0
    PCI: 00:10.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
    PCI: 00:10.1
    PCI: 00:10.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
    PCI: 00:10.2
    PCI: 00:10.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
    PCI: 00:10.3
    PCI: 00:10.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
    PCI: 00:10.4
    PCI: 00:10.4 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
    PCI: 00:10.5
    PCI: 00:11.0 child on link 0 I2C: 01:50
    PCI: 00:11.0 resource base 500 size 80 align 0 gran 0 limit ffff flags f0000100 index 88
    PCI: 00:11.0 resource base 4d0 size 2 align 0 gran 0 limit ffff flags f0000100 index 3
    PCI: 00:11.0 resource base 400 size 10 align 0 gran 0 limit ffff flags f0000100 index d0
    PCI: 00:11.0 resource base fec00000 size 100 align 8 gran 8 limit ffffffff flags f0000200 index 44
    PCI: 00:11.0 resource base ff000000 size 1000000 align 0 gran 0 limit ffffffff flags f0000200 index 4
    PCI: 00:11.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
     I2C: 01:50
     I2C: 01:51
     I2C: 01:52
     I2C: 01:53
     PNP: 002e.0
     PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
     PNP: 002e.1
     PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.1 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
     PNP: 002e.2
     PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.3
     PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.5
     PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
     PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 62
     PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 72
     PNP: 002e.106
     PNP: 002e.106 resource base 100 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.106 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.7
     PNP: 002e.107
     PNP: 002e.107 resource base 201 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
     PNP: 002e.207
     PNP: 002e.207 resource base 330 size 2 align 1 gran 1 limit 7ff flags c0000100 index 62
     PNP: 002e.207 resource base a size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.307
     PNP: 002e.8
     PNP: 002e.9
     PNP: 002e.109
     PNP: 002e.209
     PNP: 002e.309
     PNP: 002e.a
     PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.b
     PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit 7ff flags c0000100 index 60
     PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PCI: 00:11.5
    PCI: 00:11.5 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
    PCI: 00:11.6
    PCI: 00:11.6 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
    PCI: 00:12.0
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94
DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:02.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 02:00.0 24 *  [0x0 - 0x7f] io
PCI: 00:02.0 compute_resources_io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:03.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:03.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:03.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:03.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:03.2 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 05:00.0 18 *  [0x0 - 0xff] io
PCI: 00:03.2 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:03.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:03.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:02.0 1c *  [0x0 - 0xfff] io
PCI: 00:03.2 1c *  [0x1000 - 0x1fff] io
PCI: 00:0f.0 24 *  [0x2000 - 0x20ff] io
PCI: 00:11.5 10 *  [0x2400 - 0x24ff] io
PCI: 00:11.6 10 *  [0x2800 - 0x28ff] io
PCI: 00:0d.0 10 *  [0x2c00 - 0x2c3f] io
PCI: 00:10.0 20 *  [0x2c40 - 0x2c5f] io
PCI: 00:10.1 20 *  [0x2c60 - 0x2c7f] io
PCI: 00:10.2 20 *  [0x2c80 - 0x2c9f] io
PCI: 00:10.3 20 *  [0x2ca0 - 0x2cbf] io
PCI: 00:0f.0 20 *  [0x2cc0 - 0x2ccf] io
PCI: 00:0f.1 20 *  [0x2cd0 - 0x2cdf] io
PCI: 00:0f.0 10 *  [0x2ce0 - 0x2ce7] io
PCI: 00:0f.0 18 *  [0x2ce8 - 0x2cef] io
PCI: 00:0f.0 14 *  [0x2cf0 - 0x2cf3] io
PCI: 00:0f.0 1c *  [0x2cf4 - 0x2cf7] io
PCI: 00:18.0 compute_resources_io: base: 2cf8 size: 3000 align: 12 gran: 12 limit: ffff done
PCI: 00:18.0 00 *  [0x0 - 0x2fff] io
DOMAIN: 0000 compute_resources_io: base: 3000 size: 3000 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffff
PCI: 02:00.0 14 *  [0x0 - 0xfffffff] prefmem
PCI: 00:02.0 compute_resources_prefmem: base: 10000000 size: 10000000 align: 28 gran: 20 limit: fffffffff done
PCI: 00:03.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffff
PCI: 00:03.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffff done
PCI: 00:03.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffff
PCI: 00:03.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffff done
PCI: 00:03.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffff
PCI: 00:03.2 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffff done
PCI: 00:03.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffff
PCI: 00:03.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: fffffffff done
PCI: 00:00.0 10 *  [0x0 - 0xfffffff] prefmem
PCI: 00:02.0 24 *  [0x10000000 - 0x1fffffff] prefmem
PCI: 00:18.0 compute_resources_prefmem: base: 20000000 size: 20000000 align: 28 gran: 20 limit: ffffffff done
PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 10 *  [0x0 - 0xffffff] mem
PCI: 02:00.0 1c *  [0x1000000 - 0x1ffffff] mem
PCI: 02:00.0 30 *  [0x2000000 - 0x201ffff] mem
PCI: 00:02.0 compute_resources_mem: base: 2020000 size: 2100000 align: 24 gran: 20 limit: ffffffff done
PCI: 00:03.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:03.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:03.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:03.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:03.2 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 05:00.0 30 *  [0x0 - 0x1ffff] mem
PCI: 05:00.0 10 *  [0x20000 - 0x23fff] mem
PCI: 00:03.2 compute_resources_mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:03.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:03.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:00.5 61 *  [0x0 - 0xfffffff] mem
PCI: 00:02.0 20 *  [0x10000000 - 0x120fffff] mem
PCI: 00:03.2 20 *  [0x12100000 - 0x121fffff] mem
PCI: 00:10.4 10 *  [0x12200000 - 0x122000ff] mem
PCI: 00:18.0 compute_resources_mem: base: 12200100 size: 12300000 align: 28 gran: 20 limit: ffffffff done
PCI: 00:18.0 02 *  [0x0 - 0x1fffffff] prefmem
PCI: 00:18.0 01 *  [0x20000000 - 0x322fffff] mem
PCI: 00:18.3 94 *  [0x34000000 - 0x37ffffff] mem
DOMAIN: 0000 compute_resources_mem: base: 38000000 size: 38000000 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: DOMAIN: 0000
constrain_resources: PCI: 00:18.0
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:00.1
constrain_resources: PCI: 00:00.2
constrain_resources: PCI: 00:00.3
constrain_resources: PCI: 00:00.4
constrain_resources: PCI: 00:00.5
constrain_resources: PCI: 00:00.7
constrain_resources: PCI: 00:01.0
constrain_resources: PCI: 00:02.0
constrain_resources: PCI: 02:00.0
constrain_resources: PCI: 00:03.0
constrain_resources: PCI: 00:03.1
constrain_resources: PCI: 00:03.2
constrain_resources: PCI: 05:00.0
constrain_resources: PCI: 00:03.3
constrain_resources: PCI: 00:0d.0
constrain_resources: PCI: 00:0f.0
constrain_resources: PCI: 00:0f.1
constrain_resources: PCI: 00:10.0
constrain_resources: PCI: 00:10.1
constrain_resources: PCI: 00:10.2
constrain_resources: PCI: 00:10.3
constrain_resources: PCI: 00:10.4
constrain_resources: PCI: 00:10.5
constrain_resources: PCI: 00:11.0
constrain_resources: I2C: 01:50
constrain_resources: I2C: 01:51
constrain_resources: I2C: 01:52
constrain_resources: I2C: 01:53
constrain_resources: PNP: 002e.0
constrain_resources: PNP: 002e.1
constrain_resources: PNP: 002e.2
constrain_resources: PNP: 002e.107
constrain_resources: PNP: 002e.207
constrain_resources: PNP: 002e.9
constrain_resources: PNP: 002e.309
constrain_resources: PNP: 002e.b
constrain_resources: PCI: 00:11.5
constrain_resources: PCI: 00:11.6
constrain_resources: PCI: 00:18.1
constrain_resources: PCI: 00:18.2
constrain_resources: PCI: 00:18.3
avoid_fixed_resources2: DOMAIN: 0000 at 10000000 limit 0000ffff
	lim->base 00001000 lim->limit 0000ffff
avoid_fixed_resources2: DOMAIN: 0000 at 10000100 limit ffffffff
	lim->base 000c0000 lim->limit febfffff
Setting resources...
DOMAIN: 0000 allocate_resources_io: base:1000 size:3000 align:12 gran:0 limit:ffff
Assigned: PCI: 00:18.0 00 *  [0x1000 - 0x3fff] io
DOMAIN: 0000 allocate_resources_io: next_base: 4000 size: 3000 align: 12 gran: 0 done
PCI: 00:18.0 allocate_resources_io: base:1000 size:3000 align:12 gran:12 limit:ffff
Assigned: PCI: 00:02.0 1c *  [0x1000 - 0x1fff] io
Assigned: PCI: 00:03.2 1c *  [0x2000 - 0x2fff] io
Assigned: PCI: 00:0f.0 24 *  [0x3000 - 0x30ff] io
Assigned: PCI: 00:11.5 10 *  [0x3400 - 0x34ff] io
Assigned: PCI: 00:11.6 10 *  [0x3800 - 0x38ff] io
Assigned: PCI: 00:0d.0 10 *  [0x3c00 - 0x3c3f] io
Assigned: PCI: 00:10.0 20 *  [0x3c40 - 0x3c5f] io
Assigned: PCI: 00:10.1 20 *  [0x3c60 - 0x3c7f] io
Assigned: PCI: 00:10.2 20 *  [0x3c80 - 0x3c9f] io
Assigned: PCI: 00:10.3 20 *  [0x3ca0 - 0x3cbf] io
Assigned: PCI: 00:0f.0 20 *  [0x3cc0 - 0x3ccf] io
Assigned: PCI: 00:0f.1 20 *  [0x3cd0 - 0x3cdf] io
Assigned: PCI: 00:0f.0 10 *  [0x3ce0 - 0x3ce7] io
Assigned: PCI: 00:0f.0 18 *  [0x3ce8 - 0x3cef] io
Assigned: PCI: 00:0f.0 14 *  [0x3cf0 - 0x3cf3] io
Assigned: PCI: 00:0f.0 1c *  [0x3cf4 - 0x3cf7] io
PCI: 00:18.0 allocate_resources_io: next_base: 3cf8 size: 3000 align: 12 gran: 12 done
PCI: 00:01.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:01.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:02.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff
Assigned: PCI: 02:00.0 24 *  [0x1000 - 0x107f] io
PCI: 00:02.0 allocate_resources_io: next_base: 1080 size: 1000 align: 12 gran: 12 done
PCI: 00:03.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:03.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:03.1 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:03.1 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:03.2 allocate_resources_io: base:2000 size:1000 align:12 gran:12 limit:ffff
Assigned: PCI: 05:00.0 18 *  [0x2000 - 0x20ff] io
PCI: 00:03.2 allocate_resources_io: next_base: 2100 size: 1000 align: 12 gran: 12 done
PCI: 00:03.3 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:03.3 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 allocate_resources_mem: base:c0000000 size:38000000 align:28 gran:0 limit:febfffff
Assigned: PCI: 00:18.0 02 *  [0xc0000000 - 0xdfffffff] prefmem
Assigned: PCI: 00:18.0 01 *  [0xe0000000 - 0xf22fffff] mem
Assigned: PCI: 00:18.3 94 *  [0xf4000000 - 0xf7ffffff] mem
DOMAIN: 0000 allocate_resources_mem: next_base: f8000000 size: 38000000 align: 28 gran: 0 done
PCI: 00:18.0 allocate_resources_prefmem: base:c0000000 size:20000000 align:28 gran:20 limit:febfffff
Assigned: PCI: 00:00.0 10 *  [0xc0000000 - 0xcfffffff] prefmem
Assigned: PCI: 00:02.0 24 *  [0xd0000000 - 0xdfffffff] prefmem
PCI: 00:18.0 allocate_resources_prefmem: next_base: e0000000 size: 20000000 align: 28 gran: 20 done
PCI: 00:01.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:01.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:02.0 allocate_resources_prefmem: base:d0000000 size:10000000 align:28 gran:20 limit:febfffff
Assigned: PCI: 02:00.0 14 *  [0xd0000000 - 0xdfffffff] prefmem
PCI: 00:02.0 allocate_resources_prefmem: next_base: e0000000 size: 10000000 align: 28 gran: 20 done
PCI: 00:03.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:03.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:03.1 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:03.1 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:03.2 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:03.2 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:03.3 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:03.3 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:18.0 allocate_resources_mem: base:e0000000 size:12300000 align:28 gran:20 limit:febfffff
Assigned: PCI: 00:00.5 61 *  [0xe0000000 - 0xefffffff] mem
Assigned: PCI: 00:02.0 20 *  [0xf0000000 - 0xf20fffff] mem
Assigned: PCI: 00:03.2 20 *  [0xf2100000 - 0xf21fffff] mem
Assigned: PCI: 00:10.4 10 *  [0xf2200000 - 0xf22000ff] mem
PCI: 00:18.0 allocate_resources_mem: next_base: f2200100 size: 12300000 align: 28 gran: 20 done
PCI: 00:01.0 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:01.0 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:02.0 allocate_resources_mem: base:f0000000 size:2100000 align:24 gran:20 limit:febfffff
Assigned: PCI: 02:00.0 10 *  [0xf0000000 - 0xf0ffffff] mem
Assigned: PCI: 02:00.0 1c *  [0xf1000000 - 0xf1ffffff] mem
Assigned: PCI: 02:00.0 30 *  [0xf2000000 - 0xf201ffff] mem
PCI: 00:02.0 allocate_resources_mem: next_base: f2020000 size: 2100000 align: 24 gran: 20 done
PCI: 00:03.0 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:03.0 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:03.1 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:03.1 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:03.2 allocate_resources_mem: base:f2100000 size:100000 align:20 gran:20 limit:febfffff
Assigned: PCI: 05:00.0 30 *  [0xf2100000 - 0xf211ffff] mem
Assigned: PCI: 05:00.0 10 *  [0xf2120000 - 0xf2123fff] mem
PCI: 00:03.2 allocate_resources_mem: next_base: f2124000 size: 100000 align: 20 gran: 20 done
PCI: 00:03.3 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:03.3 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
0: mmio_basek=00300000, basek=00000300, limitk=00100000
CBMEM region 3ffe0000-3fffffff (cbmem_late_set_table)
DOMAIN: 0000 assign_resources, bus 0 link: 0
amdk8_set_resource, enabling legacy VGA IO forwarding for PCI: 00:18.0 link 0x0
PCI: 00:18.0 1c0 <- [0x0000001000 - 0x0000003fff] size 0x00003000 gran 0x0c io <node 0 link 0>
PCI: 00:18.0 1b8 <- [0x00c0000000 - 0x00dfffffff] size 0x20000000 gran 0x14 prefmem <node 0 link 0>
PCI: 00:18.0 1b0 <- [0x00e0000000 - 0x00f22fffff] size 0x12300000 gran 0x14 mem <node 0 link 0>
PCI: 00:18.0 1a8 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem <node 0 link 0>
PCI: 00:18.0 assign_resources, bus 0 link: 0
PCI: 00:00.0 10 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:02.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 02 io
PCI: 00:02.0 24 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x14 bus 02 prefmem
PCI: 00:02.0 20 <- [0x00f0000000 - 0x00f20fffff] size 0x02100000 gran 0x14 bus 02 mem
PCI: 00:02.0 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00f0000000 - 0x00f0ffffff] size 0x01000000 gran 0x18 mem
PCI: 02:00.0 14 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 02:00.0 1c <- [0x00f1000000 - 0x00f1ffffff] size 0x01000000 gran 0x18 mem64
PCI: 02:00.0 24 <- [0x0000001000 - 0x000000107f] size 0x00000080 gran 0x07 io
PCI: 02:00.0 30 <- [0x00f2000000 - 0x00f201ffff] size 0x00020000 gran 0x11 romem
PCI: 00:02.0 assign_resources, bus 2 link: 0
PCI: 00:03.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:03.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:03.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 03 mem
PCI: 00:03.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 00:03.1 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:03.1 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 04 mem
PCI: 00:03.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 05 io
PCI: 00:03.2 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 05 prefmem
PCI: 00:03.2 20 <- [0x00f2100000 - 0x00f21fffff] size 0x00100000 gran 0x14 bus 05 mem
PCI: 00:03.2 assign_resources, bus 5 link: 0
PCI: 05:00.0 10 <- [0x00f2120000 - 0x00f2123fff] size 0x00004000 gran 0x0e mem64
PCI: 05:00.0 18 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 05:00.0 30 <- [0x00f2100000 - 0x00f211ffff] size 0x00020000 gran 0x11 romem
PCI: 00:03.2 assign_resources, bus 5 link: 0
PCI: 00:03.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 06 io
PCI: 00:03.3 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 06 prefmem
PCI: 00:03.3 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 06 mem
PCI: 00:0d.0 10 <- [0x0000003c00 - 0x0000003c3f] size 0x00000040 gran 0x06 io
PCI: 00:0f.0 10 <- [0x0000003ce0 - 0x0000003ce7] size 0x00000008 gran 0x03 io
PCI: 00:0f.0 14 <- [0x0000003cf0 - 0x0000003cf3] size 0x00000004 gran 0x02 io
PCI: 00:0f.0 18 <- [0x0000003ce8 - 0x0000003cef] size 0x00000008 gran 0x03 io
PCI: 00:0f.0 1c <- [0x0000003cf4 - 0x0000003cf7] size 0x00000004 gran 0x02 io
PCI: 00:0f.0 20 <- [0x0000003cc0 - 0x0000003ccf] size 0x00000010 gran 0x04 io
PCI: 00:0f.0 24 <- [0x0000003000 - 0x00000030ff] size 0x00000100 gran 0x08 io
PCI: 00:0f.1 20 <- [0x0000003cd0 - 0x0000003cdf] size 0x00000010 gran 0x04 io
PCI: 00:10.0 20 <- [0x0000003c40 - 0x0000003c5f] size 0x00000020 gran 0x05 io
PCI: 00:10.1 20 <- [0x0000003c60 - 0x0000003c7f] size 0x00000020 gran 0x05 io
PCI: 00:10.2 20 <- [0x0000003c80 - 0x0000003c9f] size 0x00000020 gran 0x05 io
PCI: 00:10.3 20 <- [0x0000003ca0 - 0x0000003cbf] size 0x00000020 gran 0x05 io
PCI: 00:10.4 10 <- [0x00f2200000 - 0x00f22000ff] size 0x00000100 gran 0x08 mem
PCI: 00:11.0 assign_resources, bus 1 link: 0
PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
PNP: 002e.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
PNP: 002e.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
PNP: 002e.1 74 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 drq
PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.107 60 <- [0x0000000201 - 0x0000000201] size 0x00000001 gran 0x00 io
PNP: 002e.207 62 <- [0x0000000330 - 0x0000000331] size 0x00000002 gran 0x01 io
PNP: 002e.207 70 <- [0x000000000a - 0x000000000a] size 0x00000001 gran 0x00 irq
PNP: 002e.b 60 <- [0x0000000290 - 0x0000000291] size 0x00000002 gran 0x01 io
PNP: 002e.b 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
PCI: 00:11.0 assign_resources, bus 1 link: 0
PCI: 00:11.5 10 <- [0x0000003400 - 0x00000034ff] size 0x00000100 gran 0x08 io
PCI: 00:11.6 10 <- [0x0000003800 - 0x00000038ff] size 0x00000100 gran 0x08 io
PCI: 00:18.0 assign_resources, bus 0 link: 0
PCI: 00:18.3 94 <- [0x00f4000000 - 0x00f7ffffff] size 0x04000000 gran 0x1a mem <gart>
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: 01
  DOMAIN: 0000 child on link 0 PCI: 00:18.0
  DOMAIN: 0000 resource base 1000 size 3000 align 12 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base c0000000 size 38000000 align 28 gran 0 limit febfffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
  DOMAIN: 0000 resource base c0000 size 3ff40000 align 0 gran 0 limit 0 flags e0004200 index 20
   PCI: 00:18.0 child on link 0 PCI: 00:00.0
   PCI: 00:18.0 resource base 1000 size 3000 align 12 gran 12 limit ffff flags 60080100 index 1c0
   PCI: 00:18.0 resource base c0000000 size 20000000 align 28 gran 20 limit febfffff flags 60081200 index 1b8
   PCI: 00:18.0 resource base e0000000 size 12300000 align 28 gran 20 limit febfffff flags 60080200 index 1b0
   PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit ffffffff flags e0000200 index 1a8
    PCI: 00:00.0
    PCI: 00:00.0 resource base c0000000 size 10000000 align 28 gran 28 limit febfffff flags 60001200 index 10
    PCI: 00:00.1
    PCI: 00:00.2
    PCI: 00:00.3
    PCI: 00:00.4
    PCI: 00:00.5
    PCI: 00:00.5 resource base fecc0000 size 100 align 8 gran 8 limit fecc00ff flags f0000200 index 40
    PCI: 00:00.5 resource base e0000000 size 10000000 align 28 gran 28 limit febfffff flags 70000200 index 61
    PCI: 00:00.7
    PCI: 00:01.0
    PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
    PCI: 00:01.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
    PCI: 00:01.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
    PCI: 00:02.0 child on link 0 PCI: 02:00.0
    PCI: 00:02.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
    PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 20 limit febfffff flags 60081202 index 24
    PCI: 00:02.0 resource base f0000000 size 2100000 align 24 gran 20 limit febfffff flags 60080202 index 20
     PCI: 02:00.0
     PCI: 02:00.0 resource base f0000000 size 1000000 align 24 gran 24 limit febfffff flags 60000200 index 10
     PCI: 02:00.0 resource base d0000000 size 10000000 align 28 gran 28 limit febfffff flags 60001201 index 14
     PCI: 02:00.0 resource base f1000000 size 1000000 align 24 gran 24 limit febfffff flags 60000201 index 1c
     PCI: 02:00.0 resource base 1000 size 80 align 7 gran 7 limit ffff flags 60000100 index 24
     PCI: 02:00.0 resource base f2000000 size 20000 align 17 gran 17 limit febfffff flags 60002200 index 30
    PCI: 00:03.0
    PCI: 00:03.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
    PCI: 00:03.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
    PCI: 00:03.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
    PCI: 00:03.1
    PCI: 00:03.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
    PCI: 00:03.1 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
    PCI: 00:03.1 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
    PCI: 00:03.2 child on link 0 PCI: 05:00.0
    PCI: 00:03.2 resource base 2000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
    PCI: 00:03.2 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
    PCI: 00:03.2 resource base f2100000 size 100000 align 20 gran 20 limit febfffff flags 60080202 index 20
     PCI: 05:00.0
     PCI: 05:00.0 resource base f2120000 size 4000 align 14 gran 14 limit febfffff flags 60000201 index 10
     PCI: 05:00.0 resource base 2000 size 100 align 8 gran 8 limit ffff flags 60000100 index 18
     PCI: 05:00.0 resource base f2100000 size 20000 align 17 gran 17 limit febfffff flags 60002200 index 30
    PCI: 00:03.3
    PCI: 00:03.3 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
    PCI: 00:03.3 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
    PCI: 00:03.3 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
    PCI: 00:0d.0
    PCI: 00:0d.0 resource base 3c00 size 40 align 6 gran 6 limit ffff flags 60000100 index 10
    PCI: 00:0f.0
    PCI: 00:0f.0 resource base 3ce0 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
    PCI: 00:0f.0 resource base 3cf0 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
    PCI: 00:0f.0 resource base 3ce8 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
    PCI: 00:0f.0 resource base 3cf4 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
    PCI: 00:0f.0 resource base 3cc0 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
    PCI: 00:0f.0 resource base 3000 size 100 align 8 gran 8 limit ffff flags 60000100 index 24
    PCI: 00:0f.1
    PCI: 00:0f.1 resource base 3cd0 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
    PCI: 00:10.0
    PCI: 00:10.0 resource base 3c40 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
    PCI: 00:10.1
    PCI: 00:10.1 resource base 3c60 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
    PCI: 00:10.2
    PCI: 00:10.2 resource base 3c80 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
    PCI: 00:10.3
    PCI: 00:10.3 resource base 3ca0 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
    PCI: 00:10.4
    PCI: 00:10.4 resource base f2200000 size 100 align 8 gran 8 limit febfffff flags 60000200 index 10
    PCI: 00:10.5
    PCI: 00:11.0 child on link 0 I2C: 01:50
    PCI: 00:11.0 resource base 500 size 80 align 0 gran 0 limit ffff flags f0000100 index 88
    PCI: 00:11.0 resource base 4d0 size 2 align 0 gran 0 limit ffff flags f0000100 index 3
    PCI: 00:11.0 resource base 400 size 10 align 0 gran 0 limit ffff flags f0000100 index d0
    PCI: 00:11.0 resource base fec00000 size 100 align 8 gran 8 limit ffffffff flags f0000200 index 44
    PCI: 00:11.0 resource base ff000000 size 1000000 align 0 gran 0 limit ffffffff flags f0000200 index 4
    PCI: 00:11.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
     I2C: 01:50
     I2C: 01:51
     I2C: 01:52
     I2C: 01:53
     PNP: 002e.0
     PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
     PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
     PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
     PNP: 002e.1
     PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
     PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
     PNP: 002e.1 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
     PNP: 002e.2
     PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
     PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
     PNP: 002e.3
     PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.5
     PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
     PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 62
     PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 72
     PNP: 002e.106
     PNP: 002e.106 resource base 100 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.106 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.7
     PNP: 002e.107
     PNP: 002e.107 resource base 201 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
     PNP: 002e.207
     PNP: 002e.207 resource base 330 size 2 align 1 gran 1 limit 7ff flags e0000100 index 62
     PNP: 002e.207 resource base a size 1 align 0 gran 0 limit 0 flags e0000400 index 70
     PNP: 002e.307
     PNP: 002e.8
     PNP: 002e.9
     PNP: 002e.109
     PNP: 002e.209
     PNP: 002e.309
     PNP: 002e.a
     PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.b
     PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit 7ff flags e0000100 index 60
     PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PCI: 00:11.5
    PCI: 00:11.5 resource base 3400 size 100 align 8 gran 8 limit ffff flags 60000100 index 10
    PCI: 00:11.6
    PCI: 00:11.6 resource base 3800 size 100 align 8 gran 8 limit ffff flags 60000100 index 10
    PCI: 00:12.0
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.3 resource base f4000000 size 4000000 align 26 gran 26 limit febfffff flags 60000200 index 94
Done allocating resources.
POST: 0x88
Enabling resources...
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1043/0000
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1043/0000
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 cmd <- 00
PCI: 00:00.0 subsystem <- 1043/0000
PCI: 00:00.0 cmd <- 06
PCI: 00:00.1 cmd <- 06
PCI: 00:00.2 cmd <- 06
PCI: 00:00.3 cmd <- 06
PCI: 00:00.4 cmd <- 06
PCI: 00:00.5 cmd <- 06
PCI: 00:00.7 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 0017
PCI: 00:01.0 cmd <- 04
PCI: 00:02.0 bridge ctrl <- 000b
PCI: 00:02.0 cmd <- 07
PCI: 00:03.0 bridge ctrl <- 0003
PCI: 00:03.0 cmd <- 00
PCI: 00:03.1 bridge ctrl <- 0003
PCI: 00:03.1 cmd <- 00
PCI: 00:03.2 bridge ctrl <- 0003
PCI: 00:03.2 cmd <- 07
PCI: 00:03.3 bridge ctrl <- 0003
PCI: 00:03.3 cmd <- 00
PCI: 00:0d.0 cmd <- 01
PCI: 00:0f.0 cmd <- 01
PCI: 00:0f.1 cmd <- 81
PCI: 00:10.0 cmd <- 01
PCI: 00:10.1 cmd <- 01
PCI: 00:10.2 cmd <- 01
PCI: 00:10.3 cmd <- 01
PCI: 00:10.4 cmd <- 02
PCI: 00:10.5 cmd <- ffff
PCI: 00:11.0 subsystem <- 1043/0000
PCI: 00:11.0 cmd <- 07
PCI: 00:11.5 cmd <- 01
PCI: 00:11.6 cmd <- 01
PCI: 02:00.0 cmd <- 03
PCI: 05:00.0 cmd <- 03
W83627EHG HWM SMBus enabled
done.
POST: 0x89
Initializing devices...
Root Device init
CPU_CLUSTER: 0 init
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor AMD device 20f32
CPU: family 0f, model 23, stepping 02
POST: 0x60
Enabling cache
CPU ID 0x80000001: 20f32
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000040000000 size 0x3ff40000 type 6
0x0000000040000000 - 0x0000000100000000 size 0xc0000000 type 0
MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
MTRR: default type WB/UC MTRR counts: 2/1.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x000000ffc0000000 type 6

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
microcode: equivalent rev id  = 0x0210, current patch id = 0x00000000
microcode: rev id (4a) does not match this patch.
microcode: Not updated! Fix microcode_updates[] 
microcode: rev id (150) does not match this patch.
microcode: Not updated! Fix microcode_updates[] 
microcode: patch id to apply = 0x0000004d
microcode: updated to patch id = 0x0000004d  success

CPU model Dual Core AMD Opteron(tm) Processor 180
Setting up local apic... apic_id: 0x00 done.
POST: 0x9b
Scrubbing Disabled
Clearing memory 2048K - 1048576K: --------------- done
CPU #0 initialized
CPU1: stack_base 0013c000, stack_end 0013cff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
Waiting for 1 CPUS to stop
CPU: vendor AMD device 20f32
CPU: family 0f, model 23, stepping 02
POST: 0x60
Enabling cache
CPU ID 0x80000001: 20f32
MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
MTRR: 0 base 0x0000000000000000 mask 0x000000ffc0000000 type 6

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
microcode: equivalent rev id  = 0x0210, current patch id = 0x00000000
microcode: rev id (4a) does not match this patch.
microcode: Not updated! Fix microcode_updates[] 
microcode: rev id (150) does not match this patch.
microcode: Not updated! Fix microcode_updates[] 
microcode: patch id to apply = 0x0000004d
microcode: updated to patch id = 0x0000004d  success

CPU model Dual Core AMD Opteron(tm) Processor 180
Setting up local apic... apic_id: 0x01 done.
POST: 0x9b
CPU #1 initialized
All AP CPUs stopped (10732 loops)
CPU1: stack: 0013c000 - 0013d000, lowest used address 0013cbc8, stack used: 1080 bytes
PCI: 00:18.0 init
PCI: 00:18.1 init
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffc00/0x80000
CBFS: CBFS location: 0x0~0x7fc20, align: 64
CBFS: Looking for 'pci1022,1101.rom' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS:  (unmatched file @0x0: cmos_layout.bin)
CBFS:  - load entry 0x740 file name (32 bytes)...
CBFS:  (unmatched file @0x740: fallback/romstage)
CBFS:  - load entry 0xb200 file name (32 bytes)...
CBFS:  (unmatched file @0xb200: fallback/coreboot_ram)
CBFS:  - load entry 0x19e80 file name (32 bytes)...
CBFS:  (unmatched file @0x19e80: fallback/payload)
CBFS:  - load entry 0x25880 file name (16 bytes)...
CBFS:  (unmatched file @0x25880: config)
CBFS:  - load entry 0x26840 file name (16 bytes)...
CBFS:  (unmatched file @0x26840: )
CBFS: ERROR: No file header found at 0x7fbc0 - try next aligned address: 0x7fc00.
CBFS: ERROR: No file header found at 0x7fc00 - try next aligned address: 0x7fc40.
CBFS: WARNING: 'pci1022,1101.rom' not found.
CBFS: Could not find file 'pci1022,1101.rom'.
PCI: 00:18.2 init
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffc00/0x80000
CBFS: CBFS location: 0x0~0x7fc20, align: 64
CBFS: Looking for 'pci1022,1102.rom' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS:  (unmatched file @0x0: cmos_layout.bin)
CBFS:  - load entry 0x740 file name (32 bytes)...
CBFS:  (unmatched file @0x740: fallback/romstage)
CBFS:  - load entry 0xb200 file name (32 bytes)...
CBFS:  (unmatched file @0xb200: fallback/coreboot_ram)
CBFS:  - load entry 0x19e80 file name (32 bytes)...
CBFS:  (unmatched file @0x19e80: fallback/payload)
CBFS:  - load entry 0x25880 file name (16 bytes)...
CBFS:  (unmatched file @0x25880: config)
CBFS:  - load entry 0x26840 file name (16 bytes)...
CBFS:  (unmatched file @0x26840: )
CBFS: ERROR: No file header found at 0x7fbc0 - try next aligned address: 0x7fc00.
CBFS: ERROR: No file header found at 0x7fc00 - try next aligned address: 0x7fc40.
CBFS: WARNING: 'pci1022,1102.rom' not found.
CBFS: Could not find file 'pci1022,1102.rom'.
PCI: 00:18.3 init
NB: Function 3 Misc Control.. done.
PCI: 00:00.4 init
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffc00/0x80000
CBFS: CBFS location: 0x0~0x7fc20, align: 64
CBFS: Looking for 'pci1106,4238.rom' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS:  (unmatched file @0x0: cmos_layout.bin)
CBFS:  - load entry 0x740 file name (32 bytes)...
CBFS:  (unmatched file @0x740: fallback/romstage)
CBFS:  - load entry 0xb200 file name (32 bytes)...
CBFS:  (unmatched file @0xb200: fallback/coreboot_ram)
CBFS:  - load entry 0x19e80 file name (32 bytes)...
CBFS:  (unmatched file @0x19e80: fallback/payload)
CBFS:  - load entry 0x25880 file name (16 bytes)...
CBFS:  (unmatched file @0x25880: config)
CBFS:  - load entry 0x26840 file name (16 bytes)...
CBFS:  (unmatched file @0x26840: )
CBFS: ERROR: No file header found at 0x7fbc0 - try next aligned address: 0x7fc00.
CBFS: ERROR: No file header found at 0x7fc00 - try next aligned address: 0x7fc40.
CBFS: WARNING: 'pci1106,4238.rom' not found.
CBFS: Could not find file 'pci1106,4238.rom'.
PCI: 00:00.7 init
K8x8xx: Initializing V-Link to VT8237R sb:  Done
 VIA_X_7 device dump:
00: 06 11 38 72 06 00 00 02 00 00 00 06 00 00 00 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 
40: 64 3b 88 82 82 44 00 30 a3 39 88 80 82 44 00 00 
50: 00 00 00 00 00 00 01 40 08 00 01 80 ff ff ff ff 
60: 00 ff ff f0 00 00 00 00 00 00 00 00 00 00 00 00 
70: c2 48 ee 01 24 0f 50 08 01 00 00 00 7f 00 02 02 
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
b0: 06 01 00 e1 57 88 88 61 89 98 77 11 00 00 00 00 
c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 00 00 00 00 00 00 19 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
PCI: 00:0d.0 init
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffc00/0x80000
CBFS: CBFS location: 0x0~0x7fc20, align: 64
CBFS: Looking for 'pci1274,1371.rom' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS:  (unmatched file @0x0: cmos_layout.bin)
CBFS:  - load entry 0x740 file name (32 bytes)...
CBFS:  (unmatched file @0x740: fallback/romstage)
CBFS:  - load entry 0xb200 file name (32 bytes)...
CBFS:  (unmatched file @0xb200: fallback/coreboot_ram)
CBFS:  - load entry 0x19e80 file name (32 bytes)...
CBFS:  (unmatched file @0x19e80: fallback/payload)
CBFS:  - load entry 0x25880 file name (16 bytes)...
CBFS:  (unmatched file @0x25880: config)
CBFS:  - load entry 0x26840 file name (16 bytes)...
CBFS:  (unmatched file @0x26840: )
CBFS: ERROR: No file header found at 0x7fbc0 - try next aligned address: 0x7fc00.
CBFS: ERROR: No file header found at 0x7fc00 - try next aligned address: 0x7fc40.
CBFS: WARNING: 'pci1274,1371.rom' not found.
CBFS: Could not find file 'pci1274,1371.rom'.
PCI: 00:0f.0 init
Configuring VIA SATA controller
PCI: 00:0f.1 init
Primary IDE interface enabled
Secondary IDE interface enabled
Enables in reg 0x40 read back as 0x3b
Enables in reg 0x42 read back as 0x9
PCI: 00:10.0 init
PCI: 00:10.1 init
PCI: 00:10.2 init
PCI: 00:10.3 init
PCI: 00:10.4 init
PCI: 00:10.5 init
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffc00/0x80000
CBFS: CBFS location: 0x0~0x7fc20, align: 64
CBFS: Looking for 'pci1106,d104.rom' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS:  (unmatched file @0x0: cmos_layout.bin)
CBFS:  - load entry 0x740 file name (32 bytes)...
CBFS:  (unmatched file @0x740: fallback/romstage)
CBFS:  - load entry 0xb200 file name (32 bytes)...
CBFS:  (unmatched file @0xb200: fallback/coreboot_ram)
CBFS:  - load entry 0x19e80 file name (32 bytes)...
CBFS:  (unmatched file @0x19e80: fallback/payload)
CBFS:  - load entry 0x25880 file name (16 bytes)...
CBFS:  (unmatched file @0x25880: config)
CBFS:  - load entry 0x26840 file name (16 bytes)...
CBFS:  (unmatched file @0x26840: )
CBFS: ERROR: No file header found at 0x7fbc0 - try next aligned address: 0x7fc00.
CBFS: ERROR: No file header found at 0x7fc00 - try next aligned address: 0x7fc40.
CBFS: WARNING: 'pci1106,d104.rom' not found.
CBFS: Could not find file 'pci1106,d104.rom'.
PCI: 00:11.0 init
Entering vt8237r_init.
RTC Init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
  reg 0x0000: 0x02000000
  reg 0x0001: 0x00178003
  reg 0x0002: 0x00000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
Keyboard init...
Leaving vt8237r_init.
And taking a dump:
00: 06 11 27 32 87 00 10 02 00 00 01 06 00 00 80 00 
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 00 00 
30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 
40: 44 7f f8 0b 00 00 10 00 8c 20 00 00 44 00 00 08 
50: 00 ad 09 00 00 00 00 00 43 80 00 0b 00 00 00 00 
60: 00 00 00 00 00 00 00 04 00 00 00 00 80 00 00 00 
70: 43 10 00 00 00 00 00 00 00 00 00 00 20 00 00 00 
80: 20 84 49 00 b2 30 00 00 01 05 00 00 00 18 00 00 
90: 00 00 5f 88 a0 cc 07 00 00 4f 00 00 00 00 00 00 
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 
d0: 01 04 01 00 00 00 00 00 00 00 00 00 00 00 00 00 
e0: 00 00 00 00 04 09 00 00 00 00 00 00 00 00 00 00 
f0: 00 00 00 00 00 00 09 00 00 00 00 00 00 00 00 00 
PCI: 00:11.5 init
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffc00/0x80000
CBFS: CBFS location: 0x0~0x7fc20, align: 64
CBFS: Looking for 'pci1106,3059.rom' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS:  (unmatched file @0x0: cmos_layout.bin)
CBFS:  - load entry 0x740 file name (32 bytes)...
CBFS:  (unmatched file @0x740: fallback/romstage)
CBFS:  - load entry 0xb200 file name (32 bytes)...
CBFS:  (unmatched file @0xb200: fallback/coreboot_ram)
CBFS:  - load entry 0x19e80 file name (32 bytes)...
CBFS:  (unmatched file @0x19e80: fallback/payload)
CBFS:  - load entry 0x25880 file name (16 bytes)...
CBFS:  (unmatched file @0x25880: config)
CBFS:  - load entry 0x26840 file name (16 bytes)...
CBFS:  (unmatched file @0x26840: )
CBFS: ERROR: No file header found at 0x7fbc0 - try next aligned address: 0x7fc00.
CBFS: ERROR: No file header found at 0x7fc00 - try next aligned address: 0x7fc40.
CBFS: WARNING: 'pci1106,3059.rom' not found.
CBFS: Could not find file 'pci1106,3059.rom'.
PCI: 00:11.6 init
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffc00/0x80000
CBFS: CBFS location: 0x0~0x7fc20, align: 64
CBFS: Looking for 'pci1106,3068.rom' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS:  (unmatched file @0x0: cmos_layout.bin)
CBFS:  - load entry 0x740 file name (32 bytes)...
CBFS:  (unmatched file @0x740: fallback/romstage)
CBFS:  - load entry 0xb200 file name (32 bytes)...
CBFS:  (unmatched file @0xb200: fallback/coreboot_ram)
CBFS:  - load entry 0x19e80 file name (32 bytes)...
CBFS:  (unmatched file @0x19e80: fallback/payload)
CBFS:  - load entry 0x25880 file name (16 bytes)...
CBFS:  (unmatched file @0x25880: config)
CBFS:  - load entry 0x26840 file name (16 bytes)...
CBFS:  (unmatched file @0x26840: )
CBFS: ERROR: No file header found at 0x7fbc0 - try next aligned address: 0x7fc00.
CBFS: ERROR: No file header found at 0x7fc00 - try next aligned address: 0x7fc40.
CBFS: WARNING: 'pci1106,3068.rom' not found.
CBFS: Could not find file 'pci1106,3068.rom'.
PCI: 02:00.0 init
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffc00/0x80000
CBFS: CBFS location: 0x0~0x7fc20, align: 64
CBFS: Looking for 'pci10de,0092.rom' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS:  (unmatched file @0x0: cmos_layout.bin)
CBFS:  - load entry 0x740 file name (32 bytes)...
CBFS:  (unmatched file @0x740: fallback/romstage)
CBFS:  - load entry 0xb200 file name (32 bytes)...
CBFS:  (unmatched file @0xb200: fallback/coreboot_ram)
CBFS:  - load entry 0x19e80 file name (32 bytes)...
CBFS:  (unmatched file @0x19e80: fallback/payload)
CBFS:  - load entry 0x25880 file name (16 bytes)...
CBFS:  (unmatched file @0x25880: config)
CBFS:  - load entry 0x26840 file name (16 bytes)...
CBFS:  (unmatched file @0x26840: )
CBFS: ERROR: No file header found at 0x7fbc0 - try next aligned address: 0x7fc00.
CBFS: ERROR: No file header found at 0x7fc00 - try next aligned address: 0x7fc40.
CBFS: WARNING: 'pci10de,0092.rom' not found.
CBFS: Could not find file 'pci10de,0092.rom'.
Option ROM address for PCI: 02:00.0 = f2000000
PCI expansion ROM, signature 0xaa55, INIT size 0xfc00, data ptr 0x0104
PCI ROM image, vendor ID 10de, device ID 0092,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from f2000000 to 0xc0000, 0xfc00 bytes
Real mode stub @00000600: 867 bytes
Calling Option ROM...
... Option ROM returned.
PCI: 05:00.0 init
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffc00/0x80000
CBFS: CBFS location: 0x0~0x7fc20, align: 64
CBFS: Looking for 'pci11ab,4362.rom' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS:  (unmatched file @0x0: cmos_layout.bin)
CBFS:  - load entry 0x740 file name (32 bytes)...
CBFS:  (unmatched file @0x740: fallback/romstage)
CBFS:  - load entry 0xb200 file name (32 bytes)...
CBFS:  (unmatched file @0xb200: fallback/coreboot_ram)
CBFS:  - load entry 0x19e80 file name (32 bytes)...
CBFS:  (unmatched file @0x19e80: fallback/payload)
CBFS:  - load entry 0x25880 file name (16 bytes)...
CBFS:  (unmatched file @0x25880: config)
CBFS:  - load entry 0x26840 file name (16 bytes)...
CBFS:  (unmatched file @0x26840: )
CBFS: ERROR: No file header found at 0x7fbc0 - try next aligned address: 0x7fc00.
CBFS: ERROR: No file header found at 0x7fc00 - try next aligned address: 0x7fc40.
CBFS: WARNING: 'pci11ab,4362.rom' not found.
CBFS: Could not find file 'pci11ab,4362.rom'.
Option ROM address for PCI: 05:00.0 = f2100000
PCI expansion ROM, signature 0xffff, INIT size 0x1fe00, data ptr 0xffff
Incorrect expansion ROM header signature ffff
PNP: 002e.0 init
PNP: 002e.1 init
PNP: 002e.2 init
PNP: 002e.107 init
PNP: 002e.207 init
PNP: 002e.9 init
PNP: 002e.309 init
PNP: 002e.b init
base = 0x0295, reg = 0x40, value = 0x81
base = 0x0295, reg = 0x48, value = 0x2a
Devices initialized
Show all devs...After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:0f.1: enabled 1
PCI: 00:11.0: enabled 1
I2C: 01:50: enabled 1
I2C: 01:51: enabled 1
I2C: 01:52: enabled 1
I2C: 01:53: enabled 1
PNP: 002e.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 0
PNP: 002e.5: enabled 0
PNP: 002e.106: enabled 0
PNP: 002e.7: enabled 0
PNP: 002e.107: enabled 1
PNP: 002e.207: enabled 1
PNP: 002e.307: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.9: enabled 1
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 1
PNP: 002e.a: enabled 0
PNP: 002e.b: enabled 1
PCI: 00:12.0: enabled 0
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
APIC: 01: enabled 1
PCI: 00:00.1: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:00.3: enabled 1
PCI: 00:00.4: enabled 1
PCI: 00:00.5: enabled 1
PCI: 00:00.7: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 1
PCI: 00:03.1: enabled 1
PCI: 00:03.2: enabled 1
PCI: 00:03.3: enabled 1
PCI: 00:0d.0: enabled 1
PCI: 00:0f.0: enabled 1
PCI: 00:10.0: enabled 1
PCI: 00:10.1: enabled 1
PCI: 00:10.2: enabled 1
PCI: 00:10.3: enabled 1
PCI: 00:10.4: enabled 1
PCI: 00:10.5: enabled 1
PCI: 00:11.5: enabled 1
PCI: 00:11.6: enabled 1
PCI: 02:00.0: enabled 1
PCI: 05:00.0: enabled 1
POST: 0x8a
CBMEM region 3ffe0000-3fffffff (cbmem_reinit)
CBMEM region 3ffe0000-3fffffff (cbmem_init)
Adding CBMEM entry as no. 1
Moving GDT to 3ffe0200...ok
CBMEM Base is 3ffe0000.
POST: 0x9b
Wrote the mp table end at: 000f0010 - 000f02ac
Adding CBMEM entry as no. 2
Wrote the mp table end at: 3ffe0410 - 3ffe06ac
MP table: 684 bytes.
POST: 0x9c
Adding CBMEM entry as no. 3
ACPI: Writing ACPI tables at 3ffe1400...
ACPI:     * FACS
ACPI:     * DSDT @ 3ffe1508 Length 44e
ACPI:     * FADT
ACPI: added table 1/32, length now 40
ACPI:    * MADT
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:    * SRAT
SRAT: lapic cpu_index=00, node_id=00, apic_id=00
SRAT: lapic cpu_index=01, node_id=00, apic_id=01
set_srat_mem: dev DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
set_srat_mem: dev DOMAIN: 0000, res->index=0020 startk=00000300, sizek=000ffd00
ACPI: added table 4/32, length now 52
ACPI: done.
ACPI tables: 1946 bytes.
Adding CBMEM entry as no. 4
smbios_write_tables: 3ffec800
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffc00/0x80000
Root Device (ASUS A8V-E Deluxe)
CPU_CLUSTER: 0 (AMD K8 Root Complex)
APIC: 00 (Socket 939 CPU)
DOMAIN: 0000 (AMD K8 Root Complex)
PCI: 00:18.0 (AMD K8 Northbridge)
PCI: 00:00.0 (VIA VT8237R Southbridge)
PCI: 00:0f.1 (VIA VT8237R Southbridge)
PCI: 00:11.0 (VIA VT8237R Southbridge)
I2C: 01:50 (unknown)
I2C: 01:51 (unknown)
I2C: 01:52 (unknown)
I2C: 01:53 (unknown)
PNP: 002e.0 (Winbond W83627EHG Super I/O)
PNP: 002e.1 (Winbond W83627EHG Super I/O)
PNP: 002e.2 (Winbond W83627EHG Super I/O)
PNP: 002e.3 (Winbond W83627EHG Super I/O)
PNP: 002e.5 (Winbond W83627EHG Super I/O)
PNP: 002e.106 (Winbond W83627EHG Super I/O)
PNP: 002e.7 (Winbond W83627EHG Super I/O)
PNP: 002e.107 (Winbond W83627EHG Super I/O)
PNP: 002e.207 (Winbond W83627EHG Super I/O)
PNP: 002e.307 (Winbond W83627EHG Super I/O)
PNP: 002e.8 (Winbond W83627EHG Super I/O)
PNP: 002e.9 (Winbond W83627EHG Super I/O)
PNP: 002e.109 (Winbond W83627EHG Super I/O)
PNP: 002e.209 (Winbond W83627EHG Super I/O)
PNP: 002e.309 (Winbond W83627EHG Super I/O)
PNP: 002e.a (Winbond W83627EHG Super I/O)
PNP: 002e.b (Winbond W83627EHG Super I/O)
PCI: 00:12.0 (VIA VT8237R Southbridge)
PCI: 00:18.1 (AMD K8 Northbridge)
PCI: 00:18.2 (AMD K8 Northbridge)
PCI: 00:18.3 (AMD K8 Northbridge)
APIC: 01 (unknown)
PCI: 00:00.1 (unknown)
PCI: 00:00.2 (unknown)
PCI: 00:00.3 (unknown)
PCI: 00:00.4 (unknown)
PCI: 00:00.5 (unknown)
PCI: 00:00.7 (unknown)
PCI: 00:01.0 (unknown)
PCI: 00:02.0 (unknown)
PCI: 00:03.0 (unknown)
PCI: 00:03.1 (unknown)
PCI: 00:03.2 (unknown)
PCI: 00:03.3 (unknown)
PCI: 00:0d.0 (unknown)
PCI: 00:0f.0 (unknown)
PCI: 00:10.0 (unknown)
PCI: 00:10.1 (unknown)
PCI: 00:10.2 (unknown)
PCI: 00:10.3 (unknown)
PCI: 00:10.4 (unknown)
PCI: 00:10.5 (unknown)
PCI: 00:11.5 (unknown)
PCI: 00:11.6 (unknown)
PCI: 02:00.0 (unknown)
PCI: 05:00.0 (unknown)
SMBIOS tables: 300 bytes.
POST: 0x9e
POST: 0x9d
Adding CBMEM entry as no. 5
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum efdf
Table forward entry ends at 0x00000528.
... aligned to 0x00001000
Writing coreboot table at 0x3ffed000
rom_table_end = 0x3ffed000
... aligned to 0x3fff0000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-000000003ffdffff: RAM
 3. 000000003ffe0000-000000003fffffff: CONFIGURATION TABLES
 4. 00000000e0000000-00000000efffffff: RESERVED
 5. 00000000fec00000-00000000fec00fff: RESERVED
 6. 00000000fecc0000-00000000fecc0fff: RESERVED
 7. 00000000ff000000-00000000ffffffff: RESERVED
Wrote coreboot table at: 3ffed000, 0x218 bytes, checksum 9c2b
coreboot table: 560 bytes.
POST: 0x9d
Multiboot Information structure has been written.
FREE SPACE  0. 3fff5000 0000b000
GDT         1. 3ffe0200 00000200
SMP TABLE   2. 3ffe0400 00001000
ACPI        3. 3ffe1400 0000b400
SMBIOS      4. 3ffec800 00000800
COREBOOT    5. 3ffed000 00008000
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffc00/0x80000
CBFS: CBFS location: 0x0~0x7fc20, align: 64
CBFS: Looking for 'fallback/payload' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS:  (unmatched file @0x0: cmos_layout.bin)
CBFS:  - load entry 0x740 file name (32 bytes)...
CBFS:  (unmatched file @0x740: fallback/romstage)
CBFS:  - load entry 0xb200 file name (32 bytes)...
CBFS:  (unmatched file @0xb200: fallback/coreboot_ram)
CBFS:  - load entry 0x19e80 file name (32 bytes)...
CBFS: Found file (offset=0x19eb8, len=47548).
Loading segment from rom address 0xfff99eb8
  code (compression=1)
  New segment dstaddr 0xe93e8 memsize 0x16c18 srcaddr 0xfff99ef0 filesize 0xb984
  (cleaned up) New segment addr 0xe93e8 size 0x16c18 offset 0xfff99ef0 filesize 0xb984
Loading segment from rom address 0xfff99ed4
  Entry Point 0x000fc93f
Loading Segment: addr: 0x00000000000e93e8 memsz: 0x0000000000016c18 filesz: 0x000000000000b984
lb: [0x0000000000100000, 0x000000000017e038)
Post relocation: addr: 0x00000000000e93e8 memsz: 0x0000000000016c18 filesz: 0x000000000000b984
using LZMA
[ 0x000e93e8, 00100000, 0x00100000) <- fff99ef0
dest 000e93e8, end 00100000, bouncebuffer 3fee3f90
Loaded segments
Jumping to boot code at 000fc93f
POST: 0xf8
CPU0: stack: 0013d000 - 0013e000, lowest used address 0013d984, stack used: 1660 bytes
entry    = 0x000fc93f
lb_start = 0x00100000
lb_size  = 0x0007e038
buffer   = 0x3fee3f90
Start bios (version rel-1.7.0-76-g12c991e-20120706_220430-laptop1)
Found mainboard ASUS A8V-E Deluxe
Ram Size=0x3ffe0000 (0x0000000000000000 high)
Relocating low data from 0x000e9ab0 to 0x000ef790 (size 2153)
Relocating init from 0x000ea319 to 0x3ffc7420 (size 35507)
Found CBFS header at 0xfffffc00
CPU Mhz=2402
Found 30 PCI devices (max PCI bus is 06)
Found 2 cpu(s) max supported 2 cpu(s)
Copying MPTABLE from 0x3ffe0400/3ffe0410 to 0x000fd940
Copying ACPI RSDP from 0x3ffe1400 to 0x000fd920
Copying SMBIOS entry point from 0x3ffec800 to 0x000fd900
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.7.0-76-g12c991e-20120706_220430-laptop1)

EHCI init on dev 00:10.4 (regs=0xf2200010)
Found 1 serial ports
ATA controller 1 at 3ce0/3cf0/3cc0 (irq 0 dev 78)
ATA controller 2 at 3ce8/3cf4/3cc8 (irq 0 dev 78)
ATA controller 3 at 1f0/3f4/3cd0 (irq 14 dev 79)
ATA controller 4 at 170/374/3cd8 (irq 15 dev 79)
DVD/CD [ata1-0: ATAPI   iHDS118   2 ATAPI-6 DVD/CD]
Searching bootorder for: /pci at i0cf8/*@f/drive at 1/disk at 0
ata2-0: ST380021A ATA-5 Hard-Disk (74 GiBytes)
Searching bootorder for: /pci at i0cf8/*@f,1/drive at 2/disk at 0
PS2 keyboard initialized
All threads complete.
Scan for option roms
Press F12 for boot menu.

drive 0x000fd860: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=156301488
Space available for UMB: 000cf000-000ee800
Returned 65536 bytes of ZoneHigh
e820 map has 9 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 000000003ffe0000 = 1 RAM
  4: 000000003ffe0000 - 0000000040000000 = 2 RESERVED
  5: 00000000e0000000 - 00000000f0000000 = 2 RESERVED
  6: 00000000fec00000 - 00000000fec01000 = 2 RESERVED
  7: 00000000fecc0000 - 00000000fecc1000 = 2 RESERVED
  8: 00000000ff000000 - 0000000100000000 = 2 RESERVED
enter handle_19:
  NULL
Booting from DVD/CD...
Device reports MEDIUM NOT PRESENT
scsi_is_ready returned -1
Boot failed: Could not read from CDROM (code 0003)
enter handle_18:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00
-------------- next part --------------


coreboot-4.0-4742-g553fe1c Sun Oct 20 19:33:38 CEST 2013 starting...
now booting... romstage


coreboot-4.0-4742-g553fe1c Sun Oct 20 19:33:38 CEST 2013 starting...
now booting... real_main
Enabling routing table for node 00 done.
Enabling UP settings
coherent_ht_finalize
done
core0 started: 
now booting... Core0 started
started ap apicid: * AP 01started

SBLink=00
NC node|link=00
entering optimize_link_incoherent_ht
sysinfo->link_pair_num=0x1
entering ht_optimize_link
pos=0x8a, unfiltered freq_cap=0x8075
pos=0x8a, filtered freq_cap=0x75
pos=0x6e, unfiltered freq_cap=0x75
pos=0x6e, filtered freq_cap=0x75
freq_cap1=0x75, freq_cap2=0x75
dev1 old_freq=0x0, freq=0x6, needs_reset=0x1
dev2 old_freq=0x0, freq=0x6, needs_reset=0x1
width_cap1=0x11, width_cap2=0x11
dev1 input ln_width1=0x4, ln_width2=0x4
dev1 input width=0x1
dev1 output ln_width1=0x4, ln_width2=0x4
dev1 input|output width=0x11
old dev1 input|output width=0x11
dev2 input|output width=0x11
old dev2 input|output width=0x11
after ht_optimize_link for link pair 0, reset_needed=0x1
after optimize_link_read_pointers_chain, reset_needed=0x1
K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 06 VIA HT caps: 0075
ht reset -
soft r

coreboot-4.0-4742-g553fe1c Sun Oct 20 19:33:38 CEST 2013 starting...
now booting... romstage


coreboot-4.0-4742-g553fe1c Sun Oct 20 19:33:38 CEST 2013 starting...
now booting... real_main
Enabling routing table for node 00 done.
Enabling UP settings
coherent_ht_finalize
done
core0 started: 
now booting... Core0 started
started ap apicid: * AP 01started

SBLink=00
NC node|link=00
entering optimize_link_incoherent_ht
sysinfo->link_pair_num=0x1
entering ht_optimize_link
pos=0x8a, unfiltered freq_cap=0x8075
pos=0x8a, filtered freq_cap=0x75
pos=0x6e, unfiltered freq_cap=0x75
pos=0x6e, filtered freq_cap=0x75
freq_cap1=0x75, freq_cap2=0x75
dev1 old_freq=0x6, freq=0x6, needs_reset=0x0
dev2 old_freq=0x6, freq=0x6, needs_reset=0x0
width_cap1=0x11, width_cap2=0x11
dev1 input ln_width1=0x4, ln_width2=0x4
dev1 input width=0x1
dev1 output ln_width1=0x4, ln_width2=0x4
dev1 input|output width=0x11
old dev1 input|output width=0x11
dev2 input|output width=0x11
old dev2 input|output width=0x11
after ht_optimize_link for link pair 0, reset_needed=0x0
after optimize_link_read_pointers_chain, reset_needed=0x0
K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 06 VIA HT caps: 0075
Current fid_cur: 0x10, fid_max: 0x10
Requested fid_new: 0x10
Ram1.00
setting up CPU00 northbridge registers
done.
Ram2.00
Device error
Device error
Enabling dual channel memory
Registered
200MHz
Interleaved
RAM end at 0x00200000 kB
Lower RAM end at 0x00200000 kB
Ram3
ECC enabled
Initializing memory:  done
Ram4
v_esp=000cff08
testx = 5a5a5a5a
Copying data from cache to RAM -- switching to use RAM as stack... Clearing initial memory region: Done
Loading image.
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffffc00/0x80000
CBFS: CBFS location: 0x0~0x7fc20, align: 64
CBFS: Looking for 'fallback/coreboot_ram' starting from 0x0.
CBFS:  - load entry 0x0 file name (16 bytes)...
CBFS:  (unmatched file @0x0: cmos_layout.bin)
CBFS:  - load entry 0x740 file name (32 bytes)...
CBFS:  (unmatched file @0x740: fallback/romstage)
CBFS:  - load entry 0xb200 file name (32 bytes)...
CBFS: Found file (offset=0xb238, len=60432).
CBFS: loading stage fallback/coreboot_ram @ 0x100000 (516152 bytes), entry @ 0x100000
CBFS: stage loaded.
Jumping to image.
-------------- next part --------------
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