[coreboot] Intel FSP on Bayley Bay CRB: No output

[Peter Stuge]

Martin Roth wrote:
> Eh, it's code...  It's going to have issues and bugs.

I disagree with that attitude. A platform vendor writing platform
init code doesn't really have a valid excuse for producing buggy code.

"Release early, release often" can't be an excuse to push the
consequences of one's own shortcomings onto others. That's just poor
programmer's moral.

I obviously disagree with letting shortcomings in other code generate
issues in coreboot.


> We're all interested in getting these things to the highest quality,

It doesn't seem to me that Intel is interested in that at all.

They're making themselves the only actor in the world capable of
producing correct platform init code for their platforms, yet they
don't. My guess as to why is that time to market is quite short.


> They're still actively developing the code and working to improve
> things, so in that way it's definitely better than getting a single
> source code drop that never gets updated again.

That's a joke, right?

Source code without updates is clearly better than no source code.

Maybe I'm getting too old to waste my life on closed source nonsense?


//Peter