[coreboot] State of xHCI driver, specifically for Baytrail

Martin Roth martin.roth at se-eng.com
Fri Jun 13 22:55:43 CEST 2014


Hi Mike,
   the FSP is configuring the XHCI controller.  Coreboot is not touching 
it - this is at Intel's request.

Enabling both the XHCI and EHCI controllers in devicetree sets XHCI off 
and EHCI on.  You'll see the state of all of the devices that gets 
passed into the FSP very early in the boot sequence if you have the 
console set to debug or spew.

I saw the same hang in SeaBIOS when I used the default SeaBIOS built by 
coreboot.  When I built it separately, It still didn't boot from the 
XHCI device, but it did identify it, and didn't hang.  I'm including the 
SeaBIOS .config that I used.

Martin

On 06/13/2014 04:21 AM, Mike Hibbett wrote:
> Does anyone have a view on the state of xHCI on baytrail_fsp platforms?
>
> I've enabled xHCI ( and disabled eHCI ) in devicetree.cb, but the resulting build with SeaBIOS as a payload will not go further than displaying the SeaBIOS header string.
>
> With both xHCI and eHCI enabled in devicetree.cb - which the comments in that file say I should not do - SeaBIOS loads, and can recognize a DVD drive attached to a USB3 USB hub.
>
> I'm not sure whether this is a safe combination, or whether there are other settings I should change.
>
> Cheers,
>
> Mike

-------------- next part --------------
#
# Automatically generated file; DO NOT EDIT.
# SeaBIOS Configuration
#

#
# General Features
#
CONFIG_COREBOOT=y
# CONFIG_QEMU is not set
# CONFIG_CSM is not set
# CONFIG_QEMU_HARDWARE is not set
CONFIG_THREADS=y
CONFIG_RELOCATE_INIT=y
CONFIG_BOOTMENU=y
# CONFIG_BOOTSPLASH is not set
CONFIG_BOOTORDER=y
CONFIG_COREBOOT_FLASH=y
CONFIG_LZMA=y
CONFIG_CBFS_LOCATION=0
CONFIG_FLASH_FLOPPY=y
CONFIG_ENTRY_EXTRASTACK=y
# CONFIG_MALLOC_UPPERMEMORY is not set
CONFIG_ROM_SIZE=0

#
# Hardware support
#
# CONFIG_ATA is not set
CONFIG_AHCI=y
# CONFIG_MEGASAS is not set
# CONFIG_FLOPPY is not set
CONFIG_PS2PORT=y
CONFIG_USB=y
CONFIG_USB_UHCI=y
CONFIG_USB_OHCI=y
CONFIG_USB_EHCI=y
CONFIG_USB_XHCI=y
CONFIG_USB_MSC=y
# CONFIG_USB_UAS is not set
CONFIG_USB_HUB=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_MOUSE=y
CONFIG_SERIAL=y
CONFIG_LPT=y
CONFIG_PMTIMER=y

#
# BIOS interfaces
#
CONFIG_DRIVES=y
CONFIG_CDROM_BOOT=y
CONFIG_CDROM_EMU=y
CONFIG_PCIBIOS=y
CONFIG_APMBIOS=y
CONFIG_PNPBIOS=y
CONFIG_OPTIONROMS=y
CONFIG_PMM=y
CONFIG_BOOT=y
CONFIG_KEYBOARD=y
CONFIG_KBD_CALL_INT15_4F=y
CONFIG_MOUSE=y
CONFIG_S3_RESUME=y
CONFIG_VGAHOOKS=y
CONFIG_DISABLE_A20=y

#
# VGA ROM
#
CONFIG_NO_VGABIOS=y
# CONFIG_VGA_GEODEGX2 is not set
# CONFIG_VGA_GEODELX is not set
# CONFIG_VGA_COREBOOT is not set
# CONFIG_BUILD_VGABIOS is not set
CONFIG_VGA_EXTRA_STACK_SIZE=512

#
# Debugging
#
CONFIG_DEBUG_LEVEL=2
CONFIG_DEBUG_SERIAL=y
CONFIG_DEBUG_SERIAL_PORT=0x3f8
CONFIG_DEBUG_COREBOOT=y


More information about the coreboot mailing list