[coreboot] GSoC-2014 Coreboot project

Vladimir 'φ-coder/phcoder' Serbinenko phcoder at gmail.com
Thu Mar 20 13:03:51 CET 2014


On 20.03.2014 11:25, Allen Yan wrote:
> Hi, David,
>    When at AsusTek Suzhou, my work is mainly responsible for bios
> porting and fixing bug. There were four mainboards P5KPL-S, P5QL-E,
> P5QL-SE, P5QL. All based on Intel platform and AMI Legacy BIOS Core
>    In the second half year of 2008, I worked on pre-development of
> EFI-BIOS for ASUS mainboard. I wrote a Dual bootblock module and added
> NTFS support(read only) for AutoRecovery module using AMI Apito
> platform (based on EFI).
> 
Do I understand it correctly, that you've had access to proprietary BIOS
code? If so which papers did you sign and under what license did you get
them? Depending on the answers it may partially or fully disqualify you
from contributing to coreboot.
> Interesting experience, but memories will fade! Details can't be
> remembered clearly.
> 
>> As Vladimir said, if the chipset is unsupported then writing MRC for it will be a very long and difficult process. If the chipset is supported then adding mainboard support may be a relatively simple task that not sufficient for GSoC.
>  Do we need to write MRC by ourselves in coreboot? Isn't MRC code
> supported by Intel?
> 
>> If you have experience with UEFI, perhaps you can implement features that are missing in our Tianocore support: http://www.coreboot.org/TianoCore .
> 
> Implementing UEFI CBFS driver and GOP driver are very clear goal.
> questions: I don't know whether coreboot or some payload implement
> common flash interface for flash programming software. If not, why?
> 
>> https://trello.com/b/pEdlwYTb/tiano-payload
> It seems that Tiano payload is a very activity project. I think I can
> try my best to implement one feature or twp for the project! Like use
> a seperate Fv in CBFS as Fault Tolerant Variable Storage
> 
> Look forward to your kind advice!
> 
> 
> 
> On 3/20/14, David Hendricks <dhendrix at google.com> wrote:
>> Hi Jinyi,
>> Can you provide more details about your work as a BIOS engineer?
>>
>> As Vladimir said, if the chipset is unsupported then writing MRC for it
>> will be a very long and difficult process. If the chipset is supported then
>> adding mainboard support may be a relatively simple task that not
>> sufficient for GSoC.
>>
>> If you have experience with UEFI, perhaps you can implement features that
>> are missing in our Tianocore support: http://www.coreboot.org/TianoCore .
>>
>>
>> On Wed, Mar 19, 2014 at 6:06 AM, Allen Yan <lexkde at gmail.com> wrote:
>>
>>> Hi,
>>> I am Jinyi Yan , a second year PhD candidate from Shanghai Institute
>>> of Micro-system and Information Technology, Chinese Academy of
>>> Sciences. I used to be a mainboard BIOS engineer in ASUS Technology
>>> Suzhou Co., Ltd for about two years (2007.7~2009.2). My major now is
>>> optoelectronics. But I have a lot of fun while programming, in my
>>> heart the working experience of being a BIOS engineer is still very
>>> exciting.
>>> I think GsoC is a nice platform for me to participate the open source
>>> community. When I search the GsoC projects and organizations, the
>>> coreboot and flashrom projects are definitely the right choices for
>>> me. I have a spare ASUS P5KPL PC at my hand, but the chipset is not in
>>> the support list of coreboot project.
>>> As Stefan Tauner's suggestion, maybe porting coreboot to new mainboard
>>> or implementing advanced coreboot features on exsiting mainboards are
>>> nice too.
>>> Now I'm not very familiar with the program structure of coreboot, so I
>>> expect your guidence and hope to contribute for coreboot and flashrom
>>> even if my application is not accpeted.
>>> Thanks! Look forward to your kind advice!
>>> Regards,
>>> Jinyi Yan
>>>
>>> --
>>> coreboot mailing list: coreboot at coreboot.org
>>> http://www.coreboot.org/mailman/listinfo/coreboot
>>>
>>
>>
>>
>> --
>> David Hendricks (dhendrix)
>> Systems Software Engineer, Google Inc.
>>
> 


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