Hi,

My lspci O/P is as below, which seems to have 6 slots, 4 on bus 0 and
2 on bus 1. I hope this interpretation is correct.

****lspci O/P*****
00:00.0 Host bridge: Intel Corporation 82810E GMCH [Graphics Memory Controller Hub] (rev 03)
00:01.0 VGA compatible controller: Intel Corporation 82810E CGC [Chipset Graphics Controller] (rev 03)
00:1e.0 PCI bridge: Intel Corporation 82801AA 82810 PCI Bridge (rev 02)
00:1f.0 ISA bridge: Intel Corporation 82801AA 82810 Chipset ISA Bridge (LPC) (rev 02)
00:1f.1 IDE interface: Intel Corporation 82801AA 82810 Chipset IDE (rev 02)
00:1f.2 USB Controller: Intel Corporation 82801AA 82810 Chipset USB (rev 02)
00:1f.3 SMBus: Intel Corporation 82801AA 82810 Chipset SMBus (rev 02)
01:04.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139 (rev 10)
01:05.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139 (rev 10)
****lspci O/P*****

And the irq_tables.c O/P after getpir is as below :

****getpir O/P*****
/* This file was generated by getpir.c, do not modify!
   (but if you do, please run checkpir on it to verify)
   Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up

   Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
*/

#include <arch/pirq_routing.h>

const struct irq_routing_table intel_irq_routing_table = {
        PIRQ_SIGNATURE, /* u32 signature */
        PIRQ_VERSION,   /* u16 version   */
        32+16*4,        /* there can be total 4 devices on the bus */
        0,           /* Where the interrupt router lies (bus) */
        0xf8,           /* Where the interrupt router lies (dev) */
        0x1c00,         /* IRQs devoted exclusively to PCI usage */
        0x8086,         /* Vendor */
        0x7000,         /* Device */
        0,         /* Crap (miniport) */
        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
        0xa9,         /*  u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
        {
                {0,0x80, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}}, 0x2, 0},
                {0,0x8, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0, 0},
                {0,0xf9, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0, 0},
                {0x40,0, {{0, 0}, {0, 0}, {0, 0}, {0, 0}}, 0, 0},
        }
};

****getpir O/P*****

It does not seem to list the details of the bus 1 for ethernet controller.
Any suggestions.

Regards
Deepak


