<div>use max_lapicid() + 1 as apicid_base is not good.</div>
<div> </div>
<div>esp for apic id lifting.</div>
<div> </div>
<div>for 8 way dual core system, max_lapicid() will be 0x0f with lifting, and with lifting it will be 0x1f.</div>
<div> </div>
<div>YH</div>
<div> </div>
<div><br><br> </div>
<div><span class="gmail_quote">On 9/2/05, <b class="gmail_sendername">jason schildt</b> <<a href="mailto:jschildt@lnxi.com">jschildt@lnxi.com</a>> wrote:</span>
<blockquote class="gmail_quote" style="PADDING-LEFT: 1ex; MARGIN: 0px 0px 0px 0.8ex; BORDER-LEFT: #ccc 1px solid">DESCRIPTION:<br>----------------------------------------------<br>## lnxi-patch-14 ##<br><br>src/mainboard/arima/hdama/mptable.c
<br> Removed: max_apicid() renamed it to max_lapicid() and moved it into<br>generic code<br> /cpu/x86/lapic/lapic.c (See next)<br><br>src/cpu/x86/lapic/lapic.c<br> Added: generic max_lapicid() to replace get_apicid_base()
<br><br>src/mainboard/.../mptable.c<br> Replaced: get_apicid_base() with max_lapicid()<br> tyan/s2850/mptable.c<br> tyan/s2881/mptable.c<br> tyan/s2882/mptable.c<br> tyan/s2891/mptable.c
<br> tyan/s4880/mptable.c<br> tyan/s2892/mptable.c<br> tyan/s2875/mptable.c<br> tyan/s4882/mptable.c<br> tyan/s2885/mptable.c<br> tyan/s2895/mptable.c
<br><br><br>DIFFSTAT:<br>----------------------------------------------<br>../cpu/x86/lapic/lapic.c | 24 +++++<br>arima/hdama/mptable.c | 198<br>++++++++++++++++++++++++++++++++++++-----------<br>tyan/s2850/mptable.c | 6 -
<br>tyan/s2875/mptable.c | 6 -<br>tyan/s2881/mptable.c | 6 -<br>tyan/s2882/mptable.c | 6 -<br>tyan/s2885/mptable.c | 7 -<br>tyan/s2891/mptable.c | 6 -<br>tyan/s2892/mptable.c | 6 -
<br>tyan/s2895/mptable.c | 6 -<br>tyan/s4880/mptable.c | 6 -<br>tyan/s4882/mptable.c | 2<br>12 files changed, 187 insertions(+), 92 deletions(-)<br><br><br>PATCH:<br>----------------------------------------------
<br><br>Index: tyan/s2850/mptable.c<br>===================================================================<br>--- tyan/s2850/mptable.c (revision 1105)<br>+++ tyan/s2850/mptable.c (working copy)<br>@@ -107,11 +107,7 @@
<br><br><br>/*I/O APICs: APIC ID Version State Address*/<br>-#if CONFIG_LOGICAL_CPUS==1<br>- apicid_base = get_apicid_base(1);<br>-#else<br>- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;<br>-#endif<br>+ apicid_base = max_lapicid() + 1;
<br> apicid_8111 = apicid_base+0;<br><br> smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);<br>Index: tyan/s2875/mptable.c<br>===================================================================<br>--- tyan/s2875/mptable.c (revision 1105)
<br>+++ tyan/s2875/mptable.c (working copy)<br>@@ -123,11 +123,7 @@<br> smp_write_bus(mc, bus_isa, "ISA ");<br><br>/*I/O APICs: APIC ID Version State Address*/<br>-#if CONFIG_LOGICAL_CPUS==1
<br>- apicid_base = get_apicid_base(1);<br>-#else<br>- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;<br>-#endif<br>+ apicid_base = max_lapicid() + 1;<br> apicid_8111 = apicid_base+0;<br> smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
<br><br>Index: tyan/s2881/mptable.c<br>===================================================================<br>--- tyan/s2881/mptable.c (revision 1105)<br>+++ tyan/s2881/mptable.c (working copy)<br>@@ -136,11 +136,7 @@
<br><br><br>/*I/O APICs: APIC ID Version State Address*/<br>-#if CONFIG_LOGICAL_CPUS<br>- apicid_base = get_apicid_base(3);<br>-#else<br>- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;<br>-#endif<br>+ apicid_base = max_lapicid() + 1;
<br> apicid_8111 = apicid_base+0;<br> apicid_8131_1 = apicid_base+1;<br> apicid_8131_2 = apicid_base+2;<br>Index: tyan/s2882/mptable.c<br>===================================================================
<br>--- tyan/s2882/mptable.c (revision 1105)<br>+++ tyan/s2882/mptable.c (working copy)<br>@@ -134,11 +134,7 @@<br><br><br>/*I/O APICs: APIC ID Version State Address*/<br>-#if CONFIG_LOGICAL_CPUS==1
<br>- apicid_base = get_apicid_base(3);<br>-#else<br>- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;<br>-#endif<br>+ apicid_base = max_lapicid() + 1;<br> apicid_8111 = apicid_base+0;<br> apicid_8131_1 = apicid_base+1;
<br> apicid_8131_2 = apicid_base+2;<br>Index: tyan/s2885/mptable.c<br>===================================================================<br>--- tyan/s2885/mptable.c (revision 1105)<br>+++ tyan/s2885/mptable.c (working copy)
<br>@@ -158,14 +158,11 @@<br> smp_write_bus(mc, bus_isa, "ISA ");<br><br>/*I/O APICs: APIC ID Version State Address*/<br>-#if CONFIG_LOGICAL_CPUS==1<br>- apicid_base = get_apicid_base(3);
<br>-#else<br>- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;<br>-#endif<br>+ apicid_base = max_lapicid() + 1;<br> apicid_8111 = apicid_base+0;<br> apicid_8131_1 = apicid_base+1;<br> apicid_8131_2 = apicid_base+2;
<br>+<br> smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000); //8111<br> {<br> device_t dev;<br>Index: tyan/s2891/mptable.c<br>===================================================================
<br>--- tyan/s2891/mptable.c (revision 1105)<br>+++ tyan/s2891/mptable.c (working copy)<br>@@ -204,11 +204,7 @@<br> smp_write_bus(mc, bus_isa, "ISA ");<br><br>/*I/O APICs: APIC ID Version State Address*/
<br>-#if CONFIG_LOGICAL_CPUS==1<br>- apicid_base = get_apicid_base(3);<br>-#else<br>- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;<br>-#endif<br>+ apicid_base = max_lapicid() + 1;<br> apicid_ck804 = apicid_base;
<br> apicid_8131_1 = apicid_base+1;<br> apicid_8131_2 = apicid_base+2;<br>Index: tyan/s2892/mptable.c<br>===================================================================<br>--- tyan/s2892/mptable.c (revision 1105)
<br>+++ tyan/s2892/mptable.c (working copy)<br>@@ -204,11 +204,7 @@<br> smp_write_bus(mc, bus_isa, "ISA ");<br><br>/*I/O APICs: APIC ID Version State Address*/<br>-#if CONFIG_LOGICAL_CPUS==1
<br>- apicid_base = get_apicid_base(3);<br>-#else<br>- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;<br>-#endif<br>+ apicid_base = max_lapicid() + 1;<br> apicid_ck804 = apicid_base;<br> apicid_8131_1 = apicid_base+1;
<br> apicid_8131_2 = apicid_base+2;<br>Index: tyan/s2895/mptable.c<br>===================================================================<br>--- tyan/s2895/mptable.c (revision 1105)<br>+++ tyan/s2895/mptable.c (working copy)
<br>@@ -284,11 +284,7 @@<br> smp_write_bus(mc, bus_isa, "ISA ");<br><br>/*I/O APICs: APIC ID Version State Address*/<br>-#if CONFIG_LOGICAL_CPUS==1<br>- apicid_base = get_apicid_base(4);
<br>-#else<br>- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;<br>-#endif<br>+ apicid_base = max_lapicid() + 1;<br> apicid_ck804 = apicid_base;<br> apicid_8131_1 = apicid_base+1;<br> apicid_8131_2 = apicid_base+2;
<br>Index: tyan/s4880/mptable.c<br>===================================================================<br>--- tyan/s4880/mptable.c (revision 1105)<br>+++ tyan/s4880/mptable.c (working copy)<br>@@ -135,11 +135,7 @@
<br><br><br>/*I/O APICs: APIC ID Version State Address*/<br>-#if CONFIG_LOGICAL_CPUS==1<br>- apicid_base = get_apicid_base(3);<br>-#else<br>- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;<br>-#endif<br>+ apicid_base = max_lapicid() + 1;
<br> apicid_8111 = apicid_base+0;<br> apicid_8131_1 = apicid_base+1;<br> apicid_8131_2 = apicid_base+2;<br>Index: tyan/s4882/mptable.c<br>===================================================================
<br>--- tyan/s4882/mptable.c (revision 1105)<br>+++ tyan/s4882/mptable.c (working copy)<br>@@ -94,7 +94,7 @@<br><br>/*I/O APICs: APIC ID Version State Address*/<br>#if CONFIG_LOGICAL_CPUS==1<br>- apicid_base = get_apicid_base(3);
<br>+ apicid_base = max_lapicid() + 1;<br>#else<br> apicid_base = CONFIG_MAX_PHYSICAL_CPUS;<br>#endif<br>Index: ../cpu/x86/lapic/lapic.c<br>===================================================================
<br>--- ../cpu/x86/lapic/lapic.c (revision 1105)<br>+++ ../cpu/x86/lapic/lapic.c (working copy)<br>@@ -3,6 +3,8 @@<br>#include <cpu/x86/msr.h><br>#include <cpu/x86/mtrr.h><br><br>+#include <arch/cpu.h>
<br>+<br>void setup_lapic(void)<br>{<br> /* this is so interrupts work. This is very limited scope --<br>@@ -70,3 +72,25 @@<br> printk_info("done.\n");<br> post_code(0x9b);<br>}<br>+<br>+unsigned max_lapicid(void)
<br>+{<br>+ /* Walk through the device tree and find the<br>+ maximum local apic id.<br>+ We use this when assigning apic ids to the<br>+ IOAPICs.<br>+ */<br>+<br>+ unsigned max_lapicid;
<br>+ device_t dev;<br>+ max_lapicid = 0;<br>+ for(dev = all_devices; dev; dev = dev->next) {<br>+ if (dev->path.type != DEVICE_PATH_APIC)<br>+ continue;<br>+ if (dev->
path.u.apic.apic_id > max_lapicid) {<br>+ max_lapicid = dev->path.u.apic.apic_id;<br>+ }<br>+ }<br>+ return max_lapicid;<br>+}<br>+<br>Index: arima/hdama/mptable.c<br>
===================================================================<br>--- arima/hdama/mptable.c (revision 1105)<br>+++ arima/hdama/mptable.c (working copy)<br>@@ -3,7 +3,61 @@<br>#include <device/pci.h>
<br>#include <string.h><br>#include <stdint.h><br>+#include <cpu/x86/lapic.h><br>+#include <arch/cpu.h><br>+#include <arch/io.h><br><br>+#define HT_INIT_CONTROL 0x6c<br>+#define HTIC_BIOSR_Detect (1<<5)
<br>+<br>+/* If we assume a symmetric processor configuration we can<br>+ * get all of the information we need to write the processor<br>+ * entry from the bootstrap processor.<br>+ * Plus I don't think linux really even cares.
<br>+ * Having the proper apicid's in the table so the non-bootstrap<br>+ * processors can be woken up should be enough.<br>+ */<br>+void smp_write_processors_inorder(struct mp_config_table *mc)<br>+{<br>+ int boot_apic_id;
<br>+ int order_id;<br>+ unsigned apic_version;<br>+ unsigned cpu_features;<br>+ unsigned cpu_feature_flags;<br>+ struct cpuid_result result;<br>+ device_t cpu;<br>+<br>+ boot_apic_id = lapicid();
<br>+ apic_version = lapic_read(LAPIC_LVR) & 0xff;<br>+ result = cpuid(1);<br>+ cpu_features = result.eax;<br>+ cpu_feature_flags = result.edx;<br>+ /* order the output of the cpus to fix a bug in kernel 6 11 */
<br>+ for(order_id = 0;order_id <256; order_id++) {<br>+ for(cpu = all_devices; cpu; cpu = cpu->next) {<br>+ unsigned long cpu_flag;<br>+ if ((cpu->path.type != DEVICE_PATH_APIC) ||
<br>+ (cpu->bus->dev->path.type !=<br>DEVICE_PATH_APIC_CLUSTER))<br>+ {<br>+ continue;<br>+ }<br>+ if (!cpu->enabled) {
<br>+ continue;<br>+ }<br>+ cpu_flag = MPC_CPU_ENABLED;<br>+ if (boot_apic_id == cpu->path.u.apic.apic_id) {<br>+ cpu_flag = MPC_CPU_ENABLED |
<br>MPC_CPU_BOOTPROCESSOR;<br>+ }<br>+ if(cpu->path.u.apic.apic_id == order_id) {<br>+ smp_write_processor(mc,<br>+ cpu->path.u.apic.apic_id, apic_version,
<br>+ cpu_flag, cpu_features, cpu_feature_flags);<br>+ break;<br>+ }<br>+ }<br>+ }<br>+}<br>+<br>static unsigned node_link_to_bus(unsigned node, unsigned link)
<br>{<br> device_t dev;<br>@@ -50,6 +104,10 @@<br> unsigned char bus_8131_1;<br> unsigned char bus_8131_2;<br> unsigned char bus_8111_1;<br>+ unsigned apicid_base;<br>+ unsigned apicid_8111;
<br>+ unsigned apicid_8131_1;<br>+ unsigned apicid_8131_2;<br><br> mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);<br> memset(mc, 0, sizeof(*mc));<br>@@ -68,8 +126,12 @@<br> mc->mpe_checksum = 0;
<br> mc->reserved = 0;<br><br>- smp_write_processors(mc);<br>+ smp_write_processors_inorder(mc);<br><br>+ apicid_base = max_lapicid() + 1;<br>+ apicid_8111 = apicid_base;<br>+ apicid_8131_1 = apicid_base + 1;
<br>+ apicid_8131_2 = apicid_base + 2;<br> {<br> device_t dev;<br><br>@@ -124,7 +186,7 @@<br> smp_write_bus(mc, bus_isa, "ISA ");<br><br> /* IOAPIC handling */<br>- smp_write_ioapic(mc, 2, 0x11, 0xfec00000);
<br>+ smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);<br> {<br> device_t dev;<br> struct resource *res;<br>@@ -133,7 +195,7 @@<br> if (dev) {<br> res = find_resource(dev, PCI_BASE_ADDRESS_0);
<br> if (res) {<br>- smp_write_ioapic(mc, 0x03, 0x11, res->base);<br>+ smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);<br> }
<br> }<br> /* 8131 apic 4 */<br>@@ -141,44 +203,44 @@<br> if (dev) {<br> res = find_resource(dev, PCI_BASE_ADDRESS_0);<br> if (res) {<br>
- smp_write_ioapic(mc, 0x04, 0x11, res->base);<br>+ smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);<br> }<br> }<br>
}<br><br> /* ISA backward compatibility interrupts */<br> smp_write_intsrc(mc, mp_ExtINT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,<br>- bus_isa, 0x00, 0x02, 0x00);<br>+ bus_isa, 0x00, apicid_8111, 0x00);
<br> smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,<br>- bus_isa, 0x01, 0x02, 0x01);<br>+ bus_isa, 0x01, apicid_8111, 0x01);<br> smp_write_intsrc(mc, mp_INT,
<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,<br>- bus_isa, 0x00, 0x02, 0x02);<br>+ bus_isa, 0x00, apicid_8111, 0x02);<br> smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
<br>- bus_isa, 0x03, 0x02, 0x03);<br>+ bus_isa, 0x03, apicid_8111, 0x03);<br> smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,<br>- bus_isa, 0x04, 0x02, 0x04);
<br>+ bus_isa, 0x04, apicid_8111, 0x04);<br> smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,<br>- bus_isa, 0x05, 0x02, 0x05);<br>+ bus_isa, 0x05, apicid_8111, 0x05);
<br> smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,<br>- bus_isa, 0x06, 0x02, 0x06);<br>+ bus_isa, 0x06, apicid_8111, 0x06);<br> smp_write_intsrc(mc, mp_INT,
<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,<br>- bus_isa, 0x07, 0x02, 0x07);<br>+ bus_isa, 0x07, apicid_8111, 0x07);<br> smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
<br>- bus_isa, 0x08, 0x02, 0x08);<br>+ bus_isa, 0x08, apicid_8111, 0x08);<br> smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,<br>- bus_isa, 0x09, 0x02, 0x09);
<br>+ bus_isa, 0x09, apicid_8111, 0x09);<br> smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,<br>- bus_isa, 0x0a, 0x02, 0x0a);<br>+ bus_isa, 0x0a, apicid_8111, 0x0a);
<br> smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,<br>- bus_isa, 0x0b, 0x02, 0x0b);<br>+ bus_isa, 0x0b, apicid_8111, 0x0b);<br> smp_write_intsrc(mc, mp_INT,
<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,<br>- bus_isa, 0x0c, 0x02, 0x0c);<br>+ bus_isa, 0x0c, apicid_8111, 0x0c);<br> smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
<br>- bus_isa, 0x0d, 0x02, 0x0d);<br>+ bus_isa, 0x0d, apicid_8111, 0x0d);<br> smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,<br>- bus_isa, 0x0e, 0x02, 0x0e);
<br>+ bus_isa, 0x0e, apicid_8111, 0x0e);<br> smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,<br>- bus_isa, 0x0f, 0x02, 0x0f);<br>+ bus_isa, 0x0f, apicid_8111, 0x0f);
<br><br> /* Standard local interrupt assignments */<br> smp_write_lintsrc(mc, mp_ExtINT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,<br>@@ -188,46 +250,48 @@<br><br> /* PCI Ints: Type Trigger
<br>Polarity Bus ID PCIDEVNUM|IRQ APIC ID PIN# */<br> /* On board nics */<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x03<<2)|0,
<br>0x02, 0x13);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x04<<2)|0,<br>0x02, 0x13);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x03<<2)|0,
<br>apicid_8111, 0x13);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x04<<2)|0,<br>apicid_8111, 0x13);<br>+ /* On board SATA */<br>+ smp_write_intsrc(mc, mp_INT,
<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x05<<2)|0,<br>apicid_8111, 0x11);<br><br> /* PCI Slot 1 */<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|0,
<br>0x02, 0x11);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|1,<br>0x02, 0x12);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|2,
<br>0x02, 0x13);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|3,<br>0x02, 0x10);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|0,
<br>apicid_8111, 0x11);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|1,<br>apicid_8111, 0x12);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|2,
<br>apicid_8111, 0x13);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|3,<br>apicid_8111, 0x10);<br><br> /* PCI Slot 2 */<br>- smp_write_intsrc(mc, mp_INT,
<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|0,<br>0x02, 0x12);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|1,<br>
0x02, 0x13);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|2,<br>0x02, 0x10);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|3,
<br>0x02, 0x11);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|0,<br>apicid_8111, 0x12);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|1,
<br>apicid_8111, 0x13);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|2,<br>apicid_8111, 0x10);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|3,
<br>apicid_8111, 0x11);<br><br> /* PCI Slot 3 */<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|0,<br>0x02, 0x11);<br>- smp_write_intsrc(mc, mp_INT,
<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|1,<br>0x02, 0x12);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|2,<br>
0x02, 0x13);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|3,<br>0x02, 0x10);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|0,
<br>apicid_8111, 0x11);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|1,<br>apicid_8111, 0x12);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|2,
<br>apicid_8111, 0x13);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|3,<br>apicid_8111, 0x10);<br><br> /* PCI Slot 4 */<br>- smp_write_intsrc(mc, mp_INT,
<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|0,<br>0x02, 0x12);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|1,<br>
0x02, 0x13);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|2,<br>0x02, 0x10);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|3,
<br>0x02, 0x11);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|0,<br>apicid_8111, 0x12);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|1,
<br>apicid_8111, 0x13);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|2,<br>apicid_8111, 0x10);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|3,
<br>apicid_8111, 0x11);<br><br> /* PCI Slot 5 */<br>#warning "FIXME get the irqs right, it's just hacked to work for now"<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|0,
<br>0x02, 0x11);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|1,<br>0x02, 0x12);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|2,
<br>0x02, 0x13);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|3,<br>0x02, 0x10);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|0,
<br>apicid_8111, 0x11);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|1,<br>apicid_8111, 0x12);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|2,
<br>apicid_8111, 0x13);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|3,<br>apicid_8111, 0x10);<br><br> /* PCI Slot 6 */<br>#warning "FIXME get the irqs right, it's just hacked to work for now"
<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|0,<br>0x02, 0x10);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|1,
<br>0x02, 0x11);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|2,<br>0x02, 0x12);<br>- smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|3,
<br>0x02, 0x13);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|0,<br>apicid_8111, 0x10);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|1,
<br>apicid_8111, 0x11);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|2,<br>apicid_8111, 0x12);<br>+ smp_write_intsrc(mc, mp_INT,<br>MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|3,
<br>apicid_8111, 0x13);<br><br> /* There is no extension information... */<br><br>@@ -239,9 +303,51 @@<br> return smp_next_mpe_entry(mc);<br>}<br><br>+void reboot_if_hotswap(void)<br>+{<br>+ /* Hack patch work around for hot swap enable 33mhz problem */
<br>+ device_t dev;<br>+ uint32_t data;<br>+ unsigned long htic;<br>+ int reset;<br>+ int i;<br>+<br>+ reset = 0;<br>+ printk_debug("Looking for bad PCIX MHz input\n");<br>
+ dev = dev_find_slot(1, PCI_DEVFN(0x02,0));<br>+ data = pci_read_config32(dev, 0xa0);<br>+ if(!(((data>>16)&0x03)==0x03)) {<br>+ reset=1;<br>+ printk_debug("Bad PCIX MHz - Reset\n");
<br>+ }<br>+ printk_debug("Looking for bad Hot Swap Enable\n");<br>+ dev = dev_find_slot(1, PCI_DEVFN(0x01,0));<br>+ data = pci_read_config32(dev, 0x48);<br>+ if(data & 0x0c) {<br>
+ reset=1;<br>+ printk_debug("Bad Hot Swap start - Reset\n");<br>+ }<br>+ if(reset) {<br>+ /* enable cf9 */<br>+ dev = dev_find_slot(node_link_to_bus(0, 0), PCI_DEVFN(0x04,3));
<br>+ pci_write_config8(dev, 0x41, 0xf1);<br>+ /* reset */<br>+ dev = dev_find_slot(0, PCI_DEVFN(0x18,0));<br>+ htic = pci_read_config32(dev, HT_INIT_CONTROL);<br>+ htic &= ~HTIC_BIOSR_Detect;
<br>+ pci_write_config32(dev, HT_INIT_CONTROL, htic);<br>+ outb(0x0e, 0x0cf9);<br>+ }<br>+ else {<br>+ printk_debug("OK 133MHz & Hot Swap is off\n");<br>
+ }<br>+}<br>+<br>unsigned long write_smp_table(unsigned long addr)<br>{<br> void *v;<br>+ reboot_if_hotswap();<br>+<br> v = smp_write_floating_table(addr);<br> return (unsigned long)smp_write_config_table(v);
<br>}<br><br><br><br>--<br>Jason W. Schildt<br>LinuxBIOS Software Engineer<br>Linux Networx<br><br>--<br>LinuxBIOS mailing list<br><a href="mailto:LinuxBIOS@openbios.org">LinuxBIOS@openbios.org</a><br><a href="http://www.openbios.org/mailman/listinfo/linuxbios">
http://www.openbios.org/mailman/listinfo/linuxbios</a><br></blockquote></div><br>