While we're on the 'error handling' track, I also had an issue where
'ht_optimize_link()' was continually indicating that a reset was
required and causing an endless reset loop. The culprit was the code
which performs an 8 bit read to get the *current* frequency of the link
and doesn't mask off the error bits next to the frequency bits (bits
0-4 are frequency, and bits 5-7 are error status). <br>
<br>
Once again, this was triggered by a transient error on the link (likely due to link retraining). <br>
<br>
Heres the patch:<br>
<br>
****START CUT****<br>
Index: incoherent_ht.c<br>
===================================================================<br>
--- incoherent_ht.c (revision 2064)<br>
+++ incoherent_ht.c (working copy)<br>
<br>
@@ -198,12 +206,12 @@<br>
freq = log2(freq_cap1 & freq_cap2);<br>
<br>
/* See if I am changing the link freqency */<br>
- old_freq = pci_read_config8(dev1, pos1 + LINK_FREQ(offs1));<br>
+ old_freq =
(pci_read_config8(dev1, pos1 + LINK_FREQ(offs1)) & 0x0f); // Mask
off error bits<br>
needs_reset |= old_freq != freq;<br>
- old_freq = pci_read_config8(dev2, pos2 + LINK_FREQ(offs2));<br>
+ old_freq =
(pci_read_config8(dev2, pos2 + LINK_FREQ(offs2)) & 0x0f); // Mask
off error bits<br>
needs_reset |= old_freq != freq;<br>
<br>
- /* Set the Calulcated link frequency */<br>
+ /* Set the Calculated link frequency */<br>
pci_write_config8(dev1, pos1 + LINK_FREQ(offs1), freq);<br>
pci_write_config8(dev2, pos2 + LINK_FREQ(offs2), freq);<br>
***END CUT****<br>