LinuxBIOS-1.1.8.0Fallback T juuli 25 17:56:41 EEST 2006 starting... LinuxBIOS-1.1.8.0Fallback T juuli 25 17:56:41 EEST 2006 starting... done cpuRegInit Ram2.00 Ram3 DRAM controller init done. Ram4 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.1.8.0Fallback T juuli 25 17:56:41 EEST 2006 booting... end 1a911290, start 0 32-bit delta 201 calibrate_tsc 32-bit result is 201 clocks_per_usec: 201 Enumerating buses... scan_static_bus for Root Device gx2 north: enable_dev DEVICE_PATH_APIC_CLUSTER gx2 north: end enable_dev APIC_CLUSTER: 0 enabled gx2 north: enable_dev DEVICE_PATH_PCI_DOMAIN Enter northbridgeinit writeglmsr: write msr 0x10000020, val 0x20000000:0x000fff80 writeglmsr: AFTER write msr 0x10000020, val 0x20000000:0x000fff80 writeglmsr: write msr 0x10000021, val 0x20000000:0x080fffe0 writeglmsr: AFTER write msr 0x10000021, val 0x20000000:0x080fffe0 writeglmsr: write msr 0x1000002c, val 0x20000000:0x00000003 writeglmsr: AFTER write msr 0x1000002c, val 0x20000000:0x00000003 sizeram: 00005012:05002b00 sizeram: sizem 0x80 SysmemInit: enable for 128m bytes SysmemInit: AFTER write msr 0x10000028, val 0x20000007:0xfdf00100 sizeram: 00005012:05002b00 sizeram: sizem 0x80 sizeram: 00005012:05002b00 sizeram: sizem 0x80 SMMGL0Init: 134086656 bytes SMMGL0Init: offset is 0xc7be0000 SMMGL0Init: AFTER write msr 0x10000026, val 0xfc7be040:0x400fffe0 writeglmsr: write msr 0x10000080, val 0x00000000:0x00000003 writeglmsr: AFTER write msr 0x10000080, val 0x00000000:0x00000003 writeglmsr: write msr 0x40000020, val 0x20000000:0x000fff80 writeglmsr: AFTER write msr 0x40000020, val 0x20000000:0x000fff80 writeglmsr: write msr 0x40000021, val 0x20000000:0x080fffe0 writeglmsr: AFTER write msr 0x40000021, val 0x20000000:0x080fffe0 sizeram: 00005012:05002b00 sizeram: sizem 0x80 SysmemInit: enable for 128m bytes SysmemInit: AFTER write msr 0x40000029, val 0x20000007:0xfdf00100 SMMGL1Init: SMMGL1Init: AFTER write msr 0x40000023, val 0x20000040:0x400fffe0 writeglmsr: write msr 0x40000080, val 0x00000000:0x00000001 writeglmsr: AFTER write msr 0x40000080, val 0x00000000:0x00000001 writeglmsr: write msr 0x400000e3, val 0x60000000:0x033000f0 writeglmsr: AFTER write msr 0x400000e3, val 0x60000000:0x033000f0 GeodeLinkPriority: MSR 0x00002001 is 0x00000000:0x00000320 GeodeLinkPriority: MSR 0x00002001 will be set to 0x00000000:0x00000220 GeodeLinkPriority: MSR 0x80002001 is 0x00000000:0x00000000 GeodeLinkPriority: MSR 0x80002001 will be set to 0x00000000:0x00000720 GeodeLinkPriority: MSR 0xa0002001 is 0x00000000:0x00000000 GeodeLinkPriority: MSR 0xa0002001 will be set to 0x00000000:0x00000010 GeodeLinkPriority: MSR 0x50002001 is 0x00000000:0x00000000 GeodeLinkPriority: MSR 0x50002001 will be set to 0x00000000:0x00000027 GeodeLinkPriority: MSR 0x4c002001 is 0x00000000:0x00000000 GeodeLinkPriority: MSR 0x4c002001 will be set to 0x00000000:0x00000001 GeodeLinkPriority: MSR 0x54002001 is 0x00000000:0x00000000 GeodeLinkPriority: MSR 0x54002001 will be set to 0x00000000:0x00000622 GeodeLinkPriority: MSR 0x58002001 is 0x00000000:0x00000000 GeodeLinkPriority: MSR 0x58002001 will be set to 0x00000000:0x00000013 GLPCI r1: system msr.lo 0xfdf00100 msr.hi 0x20000007 GLPCI r1: system msr.lo 0x00100130 msr.hi 0x07fdf000 ClockGatingInit: MSR 0x10002004 is 0x00000000:0x00000005 ClockGatingInit: MSR 0x10002004 will be set to 0x00000000:0x00000005 ClockGatingInit: MSR 0x20002004 is 0x00000000:0x00000001 ClockGatingInit: MSR 0x20002004 will be set to 0x00000000:0x00000001 ClockGatingInit: MSR 0x40002004 is 0x00000000:0x00000005 ClockGatingInit: MSR 0x40002004 will be set to 0x00000000:0x00000005 ClockGatingInit: MSR 0x80002004 is 0x00000000:0x00000015 ClockGatingInit: MSR 0x80002004 will be set to 0x00000000:0x00000015 ClockGatingInit: MSR 0xa0002004 is 0x00000000:0x00000001 ClockGatingInit: MSR 0xa0002004 will be set to 0x00000000:0x00000001 ClockGatingInit: MSR 0x4c002004 is 0x00000000:0x00000015 ClockGatingInit: MSR 0x4c002004 will be set to 0x00000000:0x00000015 ClockGatingInit: MSR 0x50002004 is 0x00000000:0x00000015 ClockGatingInit: MSR 0x50002004 will be set to 0x00000000:0x00000015 Exit northbridgeinit is_5536: msr.lo is 0x5(==5 means 5536) is_5536: msr.lo is 0x5(==5 means 5536) is_5536: msr.lo is 0x5(==5 means 5536) NOT DOING ChipsetFlashSetup()!!!!!!!!!!!!!!!!!! is_5536: msr.lo is 0x5(==5 means 5536) sizeram: 00005012:05002b00 sizeram: sizem 0x80 setup_gx2_cache: enable for 131072 KB msr 0x00001808 will be set to 25fff002:107fe000 MSR 0x10000028 is now 0x20000007:0xfdf00100 MSR 0x40000029 is now 0x20000007:0xfdf00100 MSR 0x10000026 is now 0x2c7be040:0x400fffe0 do_vsmbios compressed file len is supposed to be 50314 bytes computed len is 50314, file len is 50314 buf 00060000 *buf 186 buf[256k] 0 buf[0x20] signature is b0:10:e6:80 Call real_mode_switch_call_vsm biosint: INT# 0x15 biosint: eax 0xbea7 ebx 0x4e53 ecx 0x10000026 edx 0x10000028 biosint: ebp 0x15f3c esp 0xff0 edi 0x240000 esi 0x38 biosint: ip 0x5b3 cs 0x6000 flags 0x46 biosint: gs 0x0 fs 0x0 ds 0x6000 es 0x0 handleint21, eax 0xbea7 biosint: INT# 0x15 biosint: eax 0xbea4 ebx 0x4e53 ecx 0x10000026 edx 0x10000028 biosint: ebp 0x15f3c esp 0xfee edi 0x240000 esi 0x38 biosint: ip 0x5c1 cs 0x6000 flags 0x46 biosint: gs 0x0 fs 0x0 ds 0x6000 es 0x0 handleint21, eax 0xbea4 OLPC REVA ENTER irq_init Finding PCI configuration type. PCI: Using configuration type 1 sizeram: 00005012:05002b00 sizeram: sizem 0x80 gx2 north: end enable_dev PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 0 PCI: devfn 0x0, bad id 0xffffffff gx2 north: enable_dev gx2 north: end enable_dev PCI: 00:01.0 [1022/2080] enabled gx2 north: enable_dev gx2 north: end enable_dev Disabling static device: PCI: 00:01.1 malloc Enter, size 668, free_mem_ptr 00016000 malloc 0x00016000 PCI: 00:01.2 [1022/2082] enabled PCI: devfn 0xb, bad id 0xffffffff PCI: devfn 0xc, bad id 0xffffffff PCI: devfn 0xd, bad id 0xffffffff PCI: devfn 0xe, bad id 0xffffffff PCI: devfn 0xf, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff southbridge_enable: dev is 0000fcc0 southbridge_enable: enable uarta, msr MDD_IRQM_YHIGH(51400021) southbridge_enable: enable_ide_nand_flash is 1 cs5536: enable_ide_nand_flash MDD_LBAR_FLSH0 was 0x0000000000000000 MDD_LBAR_FLSH0 is 0xfffff00720000000 MDD_PIN_OPT was 0x0000000000000071 MDD_LBAR_FLSH0 is 0x0000000000000070 MDD_NANDF_DATA was 0x0000000007770777 MDD_NANDF_DATA is 0x0000000000100010 MDD_NADF_CNTL was 0x0000000000000777 MDD_NADF_CNTL is 0x0000000000000010 cs5536: EXIT enable_ide_nand_flash pci_level_irq: current ints are 0x0 pci_level_irq: try to set ints 0x20 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 pci_level_irq: current ints are 0x20 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 PCI: 00:0d.0 [10ec/8139] enabled PCI: devfn 0x70, bad id 0xffffffff southbridge_enable: dev is 0000fa20 southbridge_enable: enable uarta, msr MDD_IRQM_YHIGH(51400021) southbridge_enable: enable_ide_nand_flash is 1 cs5536: enable_ide_nand_flash MDD_LBAR_FLSH0 is 0xfffff00720000000 MDD_LBAR_FLSH0 is 0x0000000000000070 MDD_NANDF_DATA is 0x0000000000100010 MDD_NADF_CNTL is 0x0000000000000010 cs5536: EXIT enable_ide_nand_flash pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 PCI: 00:0f.0 [1022/2090] bus ops southbridge_enable: dev is 0000fa20 southbridge_enable: enable uarta, msr MDD_IRQM_YHIGH(51400021) southbridge_enable: enable_ide_nand_flash is 1 cs5536: enable_ide_nand_flash MDD_LBAR_FLSH0 is 0xfffff00720000000 MDD_LBAR_FLSH0 is 0x0000000000000070 MDD_NANDF_DATA is 0x0000000000100010 MDD_NADF_CNTL is 0x0000000000000010 cs5536: EXIT enable_ide_nand_flash pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 PCI: 00:0f.0 [1022/2090] enabled malloc Enter, size 668, free_mem_ptr 0001629c malloc 0x0001629c PCI: 00:0f.1 [1022/2091] enabled southbridge_enable: dev is 0000f780 southbridge_enable: enable uarta, msr MDD_IRQM_YHIGH(51400021) southbridge_enable: enable_ide_nand_flash is 1 cs5536: enable_ide_nand_flash MDD_LBAR_FLSH0 is 0xfffff00720000000 MDD_LBAR_FLSH0 is 0x0000000000000070 MDD_NANDF_DATA is 0x0000000000100010 MDD_NADF_CNTL is 0x0000000000000010 cs5536: EXIT enable_ide_nand_flash pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 PCI: 00:0f.2 [1022/209a] enabled southbridge_enable: dev is 0000f4e0 southbridge_enable: enable uarta, msr MDD_IRQM_YHIGH(51400021) southbridge_enable: enable_ide_nand_flash is 1 cs5536: enable_ide_nand_flash MDD_LBAR_FLSH0 is 0xfffff00720000000 MDD_LBAR_FLSH0 is 0x0000000000000070 MDD_NANDF_DATA is 0x0000000000100010 MDD_NADF_CNTL is 0x0000000000000010 cs5536: EXIT enable_ide_nand_flash pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 PCI: 00:0f.3 [1022/2093] enabled southbridge_enable: dev is 0000f240 southbridge_enable: enable uarta, msr MDD_IRQM_YHIGH(51400021) southbridge_enable: enable_ide_nand_flash is 1 cs5536: enable_ide_nand_flash MDD_LBAR_FLSH0 is 0xfffff00720000000 MDD_LBAR_FLSH0 is 0x0000000000000070 MDD_NANDF_DATA is 0x0000000000100010 MDD_NADF_CNTL is 0x0000000000000010 cs5536: EXIT enable_ide_nand_flash pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 PCI: 00:0f.4 [1022/2094] enabled southbridge_enable: dev is 0000efa0 southbridge_enable: enable uarta, msr MDD_IRQM_YHIGH(51400021) southbridge_enable: enable_ide_nand_flash is 1 cs5536: enable_ide_nand_flash MDD_LBAR_FLSH0 is 0xfffff00720000000 MDD_LBAR_FLSH0 is 0x0000000000000070 MDD_NANDF_DATA is 0x0000000000100010 MDD_NADF_CNTL is 0x0000000000000010 cs5536: EXIT enable_ide_nand_flash pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 PCI: 00:0f.5 [1022/2095] enabled malloc Enter, size 668, free_mem_ptr 00016538 malloc 0x00016538 PCI: 00:0f.6 [1022/2096] enabled malloc Enter, size 668, free_mem_ptr 000167d4 malloc 0x000167d4 PCI: 00:0f.7 [1022/2097] enabled PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff scan_static_bus for PCI: 00:0f.0 scan_static_bus for PCI: 00:0f.0 done PCI: pci_scan_bus returning with max=00 scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 northbridge.c:pci_domain_read_resources() PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:0d.0 10 * [0x00000400 - 0x000004ff] io PCI: 00:0f.0 14 * [0x00000800 - 0x000008ff] io PCI: 00:0f.0 20 * [0x00000c00 - 0x00000c7f] io PCI: 00:0f.3 10 * [0x00000c80 - 0x00000cff] io PCI: 00:0f.0 18 * [0x00001000 - 0x0000103f] io PCI: 00:0f.0 24 * [0x00001040 - 0x0000107f] io PCI: 00:0f.0 1c * [0x00001080 - 0x0000109f] io PCI: 00:0f.0 10 * [0x000010a0 - 0x000010a7] io PCI: 00:01.0 10 * [0x000010b0 - 0x000010b3] io Root Device compute_allocate_io: base: 000010b4 size: 00000cb4 align: 8 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:01.2 10 * [0x00000000 - 0x00003fff] mem PCI: 00:0f.6 10 * [0x00004000 - 0x00005fff] mem PCI: 00:0f.4 10 * [0x00006000 - 0x00006fff] mem PCI: 00:0f.5 10 * [0x00007000 - 0x00007fff] mem PCI: 00:0f.7 10 * [0x00008000 - 0x00008fff] mem PCI: 00:0d.0 14 * [0x00009000 - 0x000090ff] mem Root Device compute_allocate_mem: base: 00009100 size: 00009100 align: 14 gran: 0 done Done reading resources. Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00000cb4 align: 8 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:0d.0 10 * [0x00001000 - 0x000010ff] io PCI: 00:0f.0 14 * [0x00001400 - 0x000014ff] io PCI: 00:0f.0 20 * [0x00001800 - 0x0000187f] io PCI: 00:0f.3 10 * [0x00001880 - 0x000018ff] io PCI: 00:0f.0 18 * [0x00001c00 - 0x00001c3f] io PCI: 00:0f.0 24 * [0x00001c40 - 0x00001c7f] io PCI: 00:0f.0 1c * [0x00001c80 - 0x00001c9f] io PCI: 00:0f.0 10 * [0x00001ca0 - 0x00001ca7] io PCI: 00:01.0 10 * [0x00001cb0 - 0x00001cb3] io Root Device compute_allocate_io: base: 00001cb4 size: 00000cb4 align: 8 gran: 0 done Root Device compute_allocate_mem: base: febf4000 size: 00009100 align: 14 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:01.2 10 * [0xfebf4000 - 0xfebf7fff] mem PCI: 00:0f.6 10 * [0xfebf8000 - 0xfebf9fff] mem PCI: 00:0f.4 10 * [0xfebfa000 - 0xfebfafff] mem PCI: 00:0f.5 10 * [0xfebfb000 - 0xfebfbfff] mem PCI: 00:0f.7 10 * [0xfebfc000 - 0xfebfcfff] mem PCI: 00:0d.0 14 * [0xfebfd000 - 0xfebfd0ff] mem Root Device compute_allocate_mem: base: febfd100 size: 00009100 align: 14 gran: 0 done Root Device assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resources... PCI: 00:01.0 subsystem <- 00/00 PCI: 00:01.0 cmd <- 145 PCI: 00:01.2 cmd <- 140 PCI: 00:0d.0 subsystem <- 00/00 PCI: 00:0d.0 cmd <- 140 cs5536.c: cs5536_pci_dev_enable_resources() PCI: 00:0f.0 cmd <- 149 PCI: 00:0f.1 cmd <- 140 PCI: 00:0f.2 subsystem <- 00/00 PCI: 00:0f.2 cmd <- 140 PCI: 00:0f.3 subsystem <- 00/00 PCI: 00:0f.3 cmd <- 140 PCI: 00:0f.4 subsystem <- 00/00 PCI: 00:0f.4 cmd <- 140 PCI: 00:0f.5 subsystem <- 00/00 PCI: 00:0f.5 cmd <- 140 PCI: 00:0f.6 cmd <- 140 PCI: 00:0f.7 cmd <- 140 done. Initializing devices... Root Device init OLPC REVA ENTER init OLPC REVA EXIT init APIC_CLUSTER: 0 init malloc Enter, size 668, free_mem_ptr 00016a70 malloc 0x00016a70 Initializing CPU #0 CPU: vendor AMD device 5a2 Unknown cpu