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<br><br>> Date: Wed, 3 Oct 2007 01:54:50 +0200<br>> From: uwe@hermann-uwe.de<br>> To: idwer_v@hotmail.com<br>> CC: linuxbios@linuxbios.org<br>> Subject: Re: FW: [LinuxBIOS] 440BX progress / superio w83977tf-aw<br>> <br>> On Tue, Oct 02, 2007 at 01:21:23PM +0000, Idwer Vollering wrote:<br>> > http://linuxbios.org/pipermail/linuxbios/2006-November/017262.html<br>> > <br>> > It boots (v2 r2811), but serial outputs says 'Can not load ELF Image.' which is correct because i didn't yet manage to get filo appended as a payload from targets/asus/p2b/Config.lb.<br>> > <br>> > What options in Config.lb must be set to create enough space to include filo.elf (about 94 KB) using both normal and fallback sections; option ROM_IMAGE_SIZE = (some_substracted_size) * 1024 ?<br>> <br>> No changes needed in Config.lb, I suggest you simply make filo smaller<br>> for now. Disable all unneeded options (ReiserFS, CDROM support, XFS<br>> support, all debugging, etc). You only need very few of the options.<br>> My filo.elf is 54KB, which is small enough for pretty much all boards.<br>> <br>> <br>> > Also, superio (from r2811) won't recognize the onboard winbond w83977tf-aw.<br>> <br>> It is (partly) recognized, otherwise you wouldn't get any serial output.<br>> <br>> The Config.lb stuff below is only executed very late in the boot<br>> process, but the serial console init (which needs the Super I/O) happens<br>> earlier. As you have serial output, that code works ok.<br>> <br>> <br>> > chip northbridge/intel/i440bx<br>> > device pci_domain 0 on<br>> > device pci 0.0 on end # host bridge<br>> > device pci 1.0 on end # pci bridge / agp device/bridge<br>> > chip southbridge/intel/i82371eb # southbridge<br>> > device pci 4.0 on end # isa bridge<br>> > chip superio/winbond/w83977tf # superio, winbond w83977tf-aw<br>> > device pci 4.1 on end # ide interface<br>> > device pci 4.2 on end # usb controller<br>> > device pci 4.3 on end # acpi bridge<br><br>according to src/mainboard/tyan/s1846/Config.lb, this should be it:<br><br>chip northbridge/intel/i440bx # northbridge<br> device pci_domain 0 on<br> device pci 0.0 on end # host bridge<br> device pci 1.0 on end # agp bridge<br><br> chip southbridge/intel/i82371eb # southbridge<br> device pci 4.0 on # isa bridge<br> chip superio/winbond/w83977tf # superio, winbond w83977tf-aw<br> end<br> end<br><br> device pci 4.1 on end # ide interface<br> device pci 4.2 on end # usb controller<br> device pci 4.3 on end # acpi bridge<br> register "ide0_enable" = "1"<br> register "ide1_enable" = "1"<br> end<br> end<br><br> chip cpu/intel/slot_2<br> end<br>end<br><br>> <br>> This looks broken. The PCI devices should not be inside the Super I/O section.<br>> Instead the superio-related stuff should be there. Have a look at some<br>> other boards for examples. The output of 'lspnp -v' (from original BIOS,<br>> and with all hardware attached, e.g. PS/2 keyboard, PS/2 mouse, etc)<br>> should give you some hints (please also post it here).<br><br>"lspnp: /proc/bus/pnp not available" (asus p2b bios v1012)<br><br>The kernel used is compiled with CONFIG_PNPBIOS=y <br>> <br>> <br>> I'll try to dig out my P2B tomorrow or so and see how far I get, and<br>> maybe post some patch to improve it a bit. Please note that the 440BX<br>> code is still not very generic, it'll probably not work for this board<br>> (only the Tyan S1846 is confirmed to work so far). Fixing this is on<br>> my (huge) TODO list.<br><br>Where can i change the (hardcoded i believe) ramspeed/timings ?<br><br>> <br>> <br>> Uwe.<br>> -- <br>> http://www.hermann-uwe.de | http://www.holsham-traders.de<br>> http://www.crazy-hacks.org | http://www.unmaintained-free-software.org<br><br /><hr />Publiceer JOUW leven online met Windows Live Spaces: weblog, foto, video en muziek! Het is gratis! <a href='http://clk.atdmt.com/MSN/go/msnnksac0030000001msn/direct/01/?href=http://www.imagine-msn.com/spaces' target='_new'>Het is gratis!</a></body>
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