/*ldoptions*/
HAVE_MOVNTI = 0;
CONFIG_USE_INIT = 0;
HAVE_FALLBACK_BOOT = 1;
HAVE_FAILOVER_BOOT = 0;
ROM_IMAGE_SIZE = 0x10000;
PAYLOAD_SIZE = 0x30000;
_ROMBASE = 0xffff0000;
_RESET = 0xffff0000;
_EXCEPTION_VECTORS = 0xffff0100;
STACK_SIZE = 0x2000;
HEAP_SIZE = 0x4000;
_RAMBASE = 0x4000;
USE_DCACHE_RAM = 0;
DCACHE_RAM_BASE = 0xc0000;
DCACHE_RAM_SIZE = 0x1000;
DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0;
CONFIG_AP_CODE_IN_CAR = 0;
MEM_TRAIN_SEQ = 0;
WAIT_BEFORE_CPUS_INIT = 0;
CONFIG_COMPRESS = 1;
CONFIG_UNCOMPRESSED = 0;
CONFIG_LB_MEM_TOPK = 2048;
HAVE_OPTION_TABLE = 1;
USE_OPTION_TABLE = 0;
LB_CKS_RANGE_START = 49;
LB_CKS_RANGE_END = 125;
LB_CKS_LOC = 126;
DEBUG = 1;
CONFIG_CONSOLE_VGA = 0;
CONFIG_CONSOLE_VGA_MULTI = 0;
CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST = 0;
CONFIG_CONSOLE_BTEXT = 0;
CONFIG_CONSOLE_LOGBUF = 0;
CONFIG_CONSOLE_SROM = 0;
CONFIG_CONSOLE_SERIAL8250 = 1;
CONFIG_USBDEBUG_DIRECT = 0;
DEFAULT_CONSOLE_LOGLEVEL = 8;
MAXIMUM_CONSOLE_LOGLEVEL = 8;
CONFIG_SERIAL_POST = 0;
TTYS0_BASE = 0x3f8;
TTYS0_BAUD = 115200;
TTYS0_LCS = 0x3;
CONFIG_USE_PRINTK_IN_CAR = 0;
MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0;
MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x0;
CONFIG_MAX_PCI_BUSES = 255;
CONFIG_SMP = 0;
CONFIG_MAX_CPUS = 1;
CONFIG_MAX_PHYSICAL_CPUS = 1;
CONFIG_LOGICAL_CPUS = 0;
SERIAL_CPU_INIT = 1;
APIC_ID_OFFSET = 0;
ENABLE_APIC_EXT_ID = 0;
LIFT_BSP_APIC_ID = 0;
CONFIG_IDE_PAYLOAD = 0;
CONFIG_ROM_PAYLOAD = 1;
CONFIG_ROM_PAYLOAD_START = 0xfffc0000;
CONFIG_COMPRESSED_PAYLOAD_NRV2B = 0;
CONFIG_COMPRESSED_PAYLOAD_LZMA = 0;
CONFIG_PRECOMPRESSED_PAYLOAD = 0;
CONFIG_SERIAL_PAYLOAD = 0;
CONFIG_FS_PAYLOAD = 0;
CONFIG_FS_EXT2 = 0;
CONFIG_FS_ISO9660 = 0;
CONFIG_FS_FAT = 0;
AUTOBOOT_DELAY = 2;
USE_WATCHDOG_ON_BOOT = 0;
CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
CONFIG_AGP_PLUGIN_SUPPORT = 1;
CONFIG_CARDBUS_PLUGIN_SUPPORT = 1;
CONFIG_PCIX_PLUGIN_SUPPORT = 1;
CONFIG_PCIEXP_PLUGIN_SUPPORT = 1;
CONFIG_IDE = 0;
IDE_BOOT_DRIVE = 0;
IDE_OFFSET = 0;
PCI_IO_CFG_EXT = 0;
CONFIG_CHIP_NAME = 0;
HAVE_INIT_TIMER = 0;
MAX_REBOOT_CNT = 3;
FAKE_SPDROM = 0;
HAVE_ACPI_TABLES = 0;
ACPI_SSDTX_NUM = 0;
HT_CHAIN_UNITID_BASE = 1;
HT_CHAIN_END_UNITID_BASE = 32;
SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
SB_HT_CHAIN_ON_BUS0 = 0;
PCI_BUS_SEGN_BITS = 0;
MMCONF_SUPPORT = 0;
HW_MEM_HOLE_SIZEK = 0;
HW_MEM_HOLE_SIZE_AUTO_INC = 0;
K8_HT_FREQ_1G_SUPPORT = 0;
K8_REV_F_SUPPORT = 0;
CBB = 0;
CDB = 24;
DIMM_SUPPORT = 0x108;
CPU_SOCKET_TYPE = 16;
CPU_ADDR_BITS = 36;
CONFIG_PCI_ROM_RUN = 0;
CONFIG_PCI_64BIT_PREF_MEM = 0;
CONFIG_AGESA = 0;
HAVE_MP_TABLE = 0;
HAVE_PIRQ_TABLE = 1;
USE_FALLBACK_IMAGE = 0;
HAVE_HARD_RESET = 0;
IRQ_SLOT_COUNT = 6;
FALLBACK_SIZE = 0x20000;
ROM_SIZE = 0x40000;
ROM_SECTION_SIZE = 0x40000;
ROM_SECTION_OFFSET = 0x0;
XIP_ROM_SIZE = 0x8000;
XIP_ROM_BASE = 0xffff8000;
CONFIG_UDELAY_IO = 0;
USE_FAILOVER_IMAGE = 0;
/* /home/eswierk/LinuxBIOSv2-2976/src/arch/i386/init/ldscript.lb */
/*
 *	Memory map:
 *
 *	_RAMBASE		
 *				: data segment
 *				: bss segment
 *				: heap
 *				: stack
 *	_ROMBASE
 *				: linuxbios text 
 *				: readonly text
 */
/*
 * Bootstrap code for the STPC Consumer
 * Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
 *
 */

/*
 *	Written by Johan Rydberg, based on work by Daniel Kahlin.
 *      Rewritten by Eric Biederman
 */
/*
 *	We use ELF as output format. So that we can
 *	debug the code in some form. 
 */
OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)

/*
ENTRY(_start)
*/

TARGET(binary)
INPUT(linuxbios_ram.rom)
SECTIONS
{
	. = _ROMBASE;

	.ram . : {
		_ram = . ;
		linuxbios_ram.rom(*)
		_eram = . ;
	}

	/* This section might be better named .setup */
	.rom . : {
		_rom = .;
		*(.rom.text);
		*(.rom.data);
		*(.rom.data.*);
		. = ALIGN(16);
		_erom = .;
	}

	_lrom = LOADADDR(.rom);
	_elrom = LOADADDR(.rom) + SIZEOF(.rom);
	_iseg = _RAMBASE;
	_eiseg = _iseg + SIZEOF(.ram);
	_liseg = _ram;
	_eliseg = _eram;

	/DISCARD/ : {
		*(.comment)
		*(.note)
	}
}
/* /home/eswierk/LinuxBIOSv2-2976/src//cpu/x86/16bit/entry16.lds */
	gdtptr16_offset = gdtptr16 & 0xffff;
	_start_offset = _start & 0xffff;
/* /home/eswierk/LinuxBIOSv2-2976/src//cpu/x86/32bit/entry32.lds */
/* /home/eswierk/LinuxBIOSv2-2976/src//cpu/x86/16bit/reset16.lds */
/*
 *      _ROMTOP                 : The top of the rom used where we
 *				  need to put the reset vector.
 */

SECTIONS {
	/* Trigger an error if I have an unuseable start address */
	_bogus = ASSERT(_start >= 0xffff0000, "_start to low please decrease ROM_IMAGE_SIZE");
	_ROMTOP = 0xfffffff0;
	. = _ROMTOP;
	.reset . : {
		*(.reset)
		. = 15 ;
		BYTE(0x00);
	} 
}
/* /home/eswierk/LinuxBIOSv2-2976/src//arch/i386/lib/id.lds */
SECTIONS {
	. = (_ROMBASE + ROM_IMAGE_SIZE - 0x10) - (__id_end - __id_start);
	.id (.): {
		*(.id)
	}
}
