60: 01 01 01 01 01 01 01 01 00 00 00 00 00 00 00 00 70: 00 1f 02 38 00 00 00 00 00 00 00 38 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 80 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00 a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 ff ff ff ff 18 0c 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 f8 00 00 20 0f 00 00 00 00 00 00 Set register 0x50 to 0x0c Set register 0x51 to 0x80 Set register 0x52 to 0x00 Set register 0x53 to 0xff Set register 0x57 to 0x08 Set register 0x59 to 0x00 Set register 0x5a to 0x00 Set register 0x5b to 0x00 Set register 0x5c to 0x00 Set register 0x5d to 0x00 Set register 0x5e to 0x00 Set register 0x5f to 0x00 Set register 0x60 to 0x00 Set register 0x61 to 0x00 Set register 0x62 to 0x00 Set register 0x63 to 0x00 Set register 0x64 to 0x00 Set register 0x65 to 0x00 Set register 0x66 to 0x00 Set register 0x67 to 0x00 Set register 0x68 to 0x00 Set register 0x74 to 0x00 Set register 0x75 to 0x00 Set register 0x76 to 0x00 Set register 0x76 to 0x00 Set register 0x78 to 0x00 Set register 0x79 to 0xff Set register 0x7a to 0x00 Ram2.00 Ram3 RAM Enable 1: Apply NOP Sending RAM command 0x0023 to 0x00000000 RAM Enable 2: Precharge all Sending RAM command 0x0043 to 0x00000000 RAM Enable 3: CBR Sending RAM command 0x0083 to 0x00000000 Sending RAM command 0x0083 to 0x00000000 Sending RAM command 0x0083 to 0x00000000 Sending RAM command 0x0083 to 0x00000000 Sending RAM command 0x0083 to 0x00000000 Sending RAM command 0x0083 to 0x00000000 Sending RAM command 0x0083 to 0x00000000 Sending RAM command 0x0083 to 0x00000000 RAM Enable 4: Mode register set Sending RAM command 0x0063 to 0x000001d0 RAM Enable 5: Normal operation Sending RAM command 0x0003 to 0x00000000 RAM Enable 6: Enable refresh Enabling refresh (DRAMC = 0x09) for DIMM 00 Northbridge following SDRAM init: PCI: 00:00.00 00: 86 80 90 71 06 00 10 22 02 00 00 06 00 40 00 00 10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33 60: 08 08 08 08 08 08 08 08 00 03 00 00 00 00 00 00 70: 00 1f 02 38 01 00 03 00 23 01 10 38 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 80 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00 a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 ff ff ff ff 18 0c 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 f8 00 00 20 0f 00 00 00 00 00 00 Ram4 Copying LinuxBIOS to RAM. Jumping to LinuxBIOS. LinuxBIOS-2.0.0.0MERETHAN Tue Jan 15 19:42:45 CET 2008 booting... LinuxBIOS-2.0.0.0MERETHAN Tue Jan 15 19:42:45 CET 2008 starting... SMBus controller enabled Ram1.00 Northbridge prior to SDRAM init: PCI: 00:00.00 00: 86 80 90 71 06 00 10 22 02 00 00 06 00 00 00 00 10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 04 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 60: 01 01 01 01 01 01 01 01 00 00 00 00 00 00 00 00 70: 00 1f 02 38 00 00 00 00 00 00 00 38 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 80 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00 a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 ff ff ff ff 18 0c 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 f8 00 00 20 0f 00 00 00 00 00 00 Set register 0x50 to 0x0c Set register 0x51 to 0x80 Set register 0x52 to 0x00 Set register 0x53 to 0xff Set register 0x57 to 0x08 Set register 0x59 to 0x00 Set register 0x5a to 0x00 Set register 0x5b to 0x00 Set register 0x5c to 0x00 Set register 0x5d to 0x00 Set register 0x5e to 0x00 Set register 0x5f to 0x00 Set register 0x60 to 0x00 Set register 0x61 to 0x00 Set register 0x62 to 0x00 Set register 0x63 to 0x00 Set register 0x64 to 0x00 Set register 0x65 to 0x00 Set register 0x66 to 0x00 Set register 0x67 to 0x00 Set register 0x68 to 0x00 Set register 0x74 to 0x00 Set register 0x75 to 0x00 Set register 0x76 to 0x00 Set register 0x76 to 0x00 Set register 0x78 to 0x00 Set register 0x79 to 0xff Set register 0x7a to 0x00 Ram2.00 Ram3 RAM Enable 1: Apply NOP Sending RAM command 0x0023 to 0x00000000 RAM Enable 2: Precharge all Sending RAM command 0x0043 to 0x00000000 RAM Enable 3: CBR Sending RAM command 0x0083 to 0x00000000 Sending RAM command 0x0083 to 0x00000000 Sending RAM command 0x0083 to 0x00000000 Sending RAM command 0x0083 to 0x00000000 Sending RAM command 0x0083 to 0x00000000 Sending RAM command 0x0083 to 0x00000000 Sending RAM command 0x0083 to 0x00000000 Sending RAM command 0x0083 to 0x00000000 RAM Enable 4: Mode register set Sending RAM command 0x0063 to 0x000001d0 RAM Enable 5: Normal operation Sending RAM command 0x0003 to 0x00000000 RAM Enable 6: Enable refresh Enabling refresh (DRAMC = 0x09) for DIMM 00 Northbridge following SDRAM init: PCI: 00:00.00 00: 86 80 90 71 06 00 10 22 02 00 00 06 00 40 00 00 10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 0c 80 00 ff 00 00 00 09 03 30 33 33 33 33 33 33 60: 08 08 08 08 08 08 08 08 00 03 00 00 00 00 00 00 70: 00 1f 02 38 01 00 03 00 23 01 10 38 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 80 00 00 00 04 61 00 00 00 05 00 00 00 00 00 00 a0: 02 00 10 00 03 02 00 1f 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 ff ff ff ff 18 0c 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 f8 00 00 20 0f 00 00 00 00 00 00 Ram4 Copying LinuxBIOS to RAM. Jumping to LinuxBIOS. LinuxBIOS-2.0.0.0MERETHAN Tue Jan 15 19:42:45 CET 2008 booting... end 4d15505f, start 0 32-bit delta 1071 calibrate_tsc 32-bit result is 1071 clocks_per_usec: 1071 Enumerating buses... scan_static_bus for Root Device APIC_CLUSTER: 0 enabled Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/7190] ops PCI: 00:00.0 [8086/7190] enabled PCI: 00:01.0 [8086/7191] enabled PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: 00:07.0 [8086/7110] bus ops PCI: 00:07.0 [8086/7110] enabled PCI: 00:07.1 [8086/7111] ops PCI: 00:07.1 [8086/7111] enabled PCI: 00:07.2 [8086/7112] ops PCI: 00:07.2 [8086/7112] enabled PCI: 00:07.3 [8086/7113] bus ops PCI: 00:07.3 [8086/7113] enabled PCI: devfn 0x3c, bad id 0xffffffff PCI: devfn 0x3d, bad id 0xffffffff PCI: devfn 0x3e, bad id 0xffffffff PCI: devfn 0x3f, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff ddrIPcueafeafdbffdfeafdddbf f sifCexe0P0 austP m, m0PNeP3dPeP0:1PCcass0 P1uiCes:P.le00g P0le i:Ie :s1n p_fR os c1oelb00 0ui0:lnCrs::db0P00o0ti10:1P0[0e rP u P7x 00nP0DoP.60tR cs 02oa : IdP._