diff -u southbridge/amd/cs5536/stage1.c southbridge/amd/cs5536/stage1.c
--- southbridge/amd/cs5536/stage1.c	(working copy)
+++ southbridge/amd/cs5536/stage1.c	(Arbeitskopie)
@@ -182,7 +182,7 @@
  *
  * See page 412 of the AMD Geode CS5536 Companion Device data book.
  */
-void cs5536_setup_onchipuart(void)
+void cs5536_setup_onchipuart1(void)
 {
 	struct msr msr;
 
@@ -255,6 +255,17 @@
 	wrmsr(MDD_UART2_CONF, msr);
 }
 
+void cs5536_setup_onchipuart(int uart)
+{
+	switch (uart) {
+	case 1:
+		cs5536_setup_onchipuart1();
+		break;
+	case 2:
+		cs5536_setup_onchipuart2();
+		break;
+	}
+}
 
 /**
  * Board setup.
diff -u southbridge/amd/cs5536/cs5536.h southbridge/amd/cs5536/cs5536.h
--- southbridge/amd/cs5536/cs5536.h	(working copy)
+++ southbridge/amd/cs5536/cs5536.h	(Arbeitskopie)
@@ -443,8 +443,7 @@
 
 /* Function prototypes */
 void cs5536_disable_internal_uart(void);
-void cs5536_setup_onchipuart(void);
-void cs5536_setup_onchipuart2(void);
+void cs5536_setup_onchipuart(int uart);
 void cs5536_stage1(void);
 
 #endif /* SOUTHBRIDGE_AMD_CS5536_CS5536_H */
diff -u mainboard/artecgroup/dbe61/initram.c mainboard/artecgroup/dbe61/initram.c
--- mainboard/artecgroup/dbe61/initram.c	(working copy)
+++ mainboard/artecgroup/dbe61/initram.c	(Arbeitskopie)
@@ -102,9 +102,9 @@
 		for (i = 0; i < ARRAY_SIZE(spd_table); i++) {
 			if (spd_table[i].address == address) {
 				ret = spd_table[i].data;
+				break;
 			}
 		}
-
 		if (i == ARRAY_SIZE(spd_table))
 			printk(BIOS_DEBUG, " addr %02x does not exist in SPD table",
 				address);
diff -u mainboard/artecgroup/dbe62/initram.c mainboard/artecgroup/dbe62/initram.c
--- mainboard/artecgroup/dbe62/initram.c	(working copy)
+++ mainboard/artecgroup/dbe62/initram.c	(Arbeitskopie)
@@ -95,7 +95,6 @@
 				break;
 			}
 		}
-
 		if (i == ARRAY_SIZE(spd_table))
 			printk(BIOS_DEBUG, " addr %02x does not exist in SPD table",
 				address);
diff -u mainboard/artecgroup/dbe62/stage1.c mainboard/artecgroup/dbe62/stage1.c
--- mainboard/artecgroup/dbe62/stage1.c	(working copy)
+++ mainboard/artecgroup/dbe62/stage1.c	(Arbeitskopie)
@@ -58,7 +58,7 @@
 	 * NOTE: Must do this AFTER the early_setup! It is counting on some
 	 * early MSR setup for the CS5536.
 	 */
-	cs5536_setup_onchipuart2();
+	cs5536_setup_onchipuart(2);
 }
 
 void mainboard_pre_payload(void)
only in patch2:
unchanged:
--- mainboard/amd/norwich/stage1.c	(Revision 631)
+++ mainboard/amd/norwich/stage1.c	(Arbeitskopie)
@@ -42,7 +42,7 @@
 	 * early MSR setup for the CS5536. We do this early for debug. 
 	 * Real setup should be done in chipset init via dts settings.
 	 */
-	cs5536_setup_onchipuart();
+	cs5536_setup_onchipuart(1);
 }
 
 void mainboard_pre_payload(void)
only in patch2:
unchanged:
--- mainboard/artecgroup/dbe61/stage1.c	(Revision 631)
+++ mainboard/artecgroup/dbe61/stage1.c	(Arbeitskopie)
@@ -59,7 +59,7 @@
 	 * NOTE: Must do this AFTER the early_setup! It is counting on some
 	 * early MSR setup for the CS5536.
 	 */
-	cs5536_setup_onchipuart();
+	cs5536_setup_onchipuart(1);
 }
 
 void mainboard_pre_payload(void)
