Index: src/superio/fintek/f71805f/Config.lb
===================================================================
--- src/superio/fintek/f71805f/Config.lb	(revision 0)
+++ src/superio/fintek/f71805f/Config.lb	(revision 0)
@@ -0,0 +1,23 @@
+##
+## This file is part of the LinuxBIOS project.
+##
+## Copyright (C) 2005 Digital Design Corporation
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+config chip.h
+object superio.o
+
Index: src/superio/fintek/f71805f/superio.c
===================================================================
--- src/superio/fintek/f71805f/superio.c	(revision 0)
+++ src/superio/fintek/f71805f/superio.c	(revision 0)
@@ -0,0 +1,173 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2000 AG Electronics Ltd.
+ * Copyright (C) 2003-2004 Linux Networx
+ * Copyright (C) 2004 Tyan 
+ * Copyright (C) 2005 Digital Design Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+/* Datasheet: http://www.fintek.com.tw/files/productfiles/F71805F_V025.pdf */
+
+/* Ported from the SMSC LPC47B272 driver */
+
+/* RAM driver for SMSC F71805F Super I/O chip. */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <console/console.h>
+#include <device/smbus.h>
+#include <string.h>
+#include <bitops.h>
+#include <uart8250.h>
+#include <pc80/keyboard.h>
+#include "chip.h"
+#include "f71805f.h"
+
+static void enable_dev(device_t dev);
+void f71805f_pnp_set_resources(device_t dev);
+void f71805f_pnp_set_resources(device_t dev);
+void f71805f_pnp_enable_resources(device_t dev);
+void f71805f_pnp_enable(device_t dev);
+static void f71805f_init(device_t dev);
+
+static void pnp_enter_conf_state(device_t dev);
+static void pnp_exit_conf_state(device_t dev);
+//static void dump_pnp_device(device_t dev);
+
+struct chip_operations superio_fintek_f71805f_ops = {
+	CHIP_NAME("Fintek F71805f Super I/O")
+	.enable_dev = enable_dev
+};
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = f71805f_pnp_set_resources,
+	.enable_resources = f71805f_pnp_enable_resources,
+	.enable           = f71805f_pnp_enable,
+	.init             = f71805f_init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+	//{ &ops, F71805F_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+	{ &ops, F71805F_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, F71805F_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	//{ &ops, F71805F_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+	//{ &ops, F71805F_HWM,  PNP_IO0 | PNP_IRQ0  { 0xff8, 0}, },
+	//{ &ops, F71805F_GPIO, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, },
+	//{ &ops, F71805F_PME,  },
+};
+
+static void enable_dev(device_t dev)
+{
+	pnp_enable_devices(dev, &pnp_ops, 
+				sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), 
+								pnp_dev_info);
+}
+
+void f71805f_pnp_set_resources(device_t dev)
+{
+	pnp_enter_conf_state(dev);  
+	pnp_set_resources(dev);
+	pnp_exit_conf_state(dev);  
+}       
+
+void f71805f_pnp_enable_resources(device_t dev)
+{       
+	pnp_enter_conf_state(dev);
+	pnp_enable_resources(dev);
+	pnp_exit_conf_state(dev);
+}
+
+void f71805f_pnp_enable(device_t dev)
+{
+	pnp_enter_conf_state(dev);   
+	pnp_set_logical_device(dev);
+
+	if(dev->enabled) {
+		pnp_set_enable(dev, 1);
+	}
+	else {
+		pnp_set_enable(dev, 0);
+	}
+	pnp_exit_conf_state(dev);  
+}
+
+static void f71805f_init(device_t dev)
+{
+	struct superio_smsc_f71805f_config *conf = dev->chip_info;
+	struct resource *res0, *res1;
+
+	if (!dev->enabled)
+		return;
+	
+	switch(dev->path.u.pnp.device) {
+	case F71805F_SP1: 
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		//init_uart8250(res0->base, &conf->com1);
+		break;
+		
+	case F71805F_SP2:
+		res1 = find_resource(dev, PNP_IDX_IO0);
+		//init_uart8250(res0->base, &conf->com2);
+		break;
+		
+	/* No KBC on F71805f */
+	}
+}
+
+static void pnp_enter_conf_state(device_t dev) 
+{
+	outb(0x87, dev->path.u.pnp.port);
+}
+
+static void pnp_exit_conf_state(device_t dev) 
+{
+    outb(0xaa, dev->path.u.pnp.port);
+}
+#if 0 /* build fails over F71805F_MAX_CONFIG_REGISTER */
+#define F71805F_MAX_CONFIG_REGISTER = 0xFF //?
+static void dump_pnp_device(device_t dev)
+{
+    int register_index;
+    print_debug("\r\n");
+
+    for(register_index = 0; register_index <= F71805F_MAX_CONFIG_REGISTER; register_index++) {
+        uint8_t register_value;
+
+        if ((register_index & 0x0f) == 0) {
+                print_debug_hex8(register_index);
+                print_debug_char(':');
+        }
+
+		// Skip over 'register' that would cause exit from configuration mode
+	    if (register_index == 0xaa)
+			register_value = 0xaa;
+		else
+        	register_value = pnp_read_config(dev, register_index);
+
+        print_debug_char(' ');
+        print_debug_hex8(register_value);
+        if ((register_index & 0x0f) == 0x0f) {
+        	print_debug("\r\n");
+        }
+    }
+
+   	print_debug("\r\n");
+}
+#endif
