<br><br><div><span class="gmail_quote">2008/5/22, <a href="mailto:svn@coreboot.org">svn@coreboot.org</a> <<a href="mailto:svn@coreboot.org">svn@coreboot.org</a>>:</span><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
Author: hailfinger<br> Date: 2008-05-22 15:22:45 +0200 (Thu, 22 May 2008)<br> New Revision: 3344<br> <br> Modified:<br> trunk/util/flashrom/Makefile<br> trunk/util/flashrom/board_enable.c<br> trunk/util/flashrom/chipset_enable.c<br>
trunk/util/flashrom/flash.h<br> trunk/util/flashrom/flashrom.c<br> trunk/util/flashrom/it87spi.c<br> Log:<br> Changes to make flashrom compile (and work) on FreeBSD.<br> This patch addresses different argument order of outX() calls,<br>
FreeBSD-specific headers, difference in certain type names and system<br> interface names, and also FreeBSD-specific way of gaining IO port<br> access.<br> <br> Signed-off-by: Andriy Gapon <<a href="mailto:avg@icyb.net.ua">avg@icyb.net.ua</a>><br>
Acked-by: Carl-Daniel Hailfinger <<a href="mailto:c-d.hailfinger.devel.2006@gmx.net">c-d.hailfinger.devel.2006@gmx.net</a>><br> <br> <br> Modified: trunk/util/flashrom/Makefile<br> ===================================================================<br>
--- trunk/util/flashrom/Makefile 2008-05-21 22:10:38 UTC (rev 3343)<br> +++ trunk/util/flashrom/Makefile 2008-05-22 13:22:45 UTC (rev 3344)<br> @@ -19,6 +19,10 @@<br> LDFLAGS = -lpci -lz<br> STRIP_ARGS = -s<br>
endif<br> +ifeq ($(OS_ARCH), FreeBSD)<br> +CFLAGS += -I/usr/local/include<br> +LDFLAGS += -L/usr/local/lib<br> +endif<br> <br> OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.c \<br> sst28sf040.o am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o \<br>
<br> Modified: trunk/util/flashrom/board_enable.c<br> ===================================================================<br> --- trunk/util/flashrom/board_enable.c 2008-05-21 22:10:38 UTC (rev 3343)<br> +++ trunk/util/flashrom/board_enable.c 2008-05-22 13:22:45 UTC (rev 3344)<br>
@@ -37,36 +37,36 @@<br> /* Enter extended functions */<br> static void w836xx_ext_enter(uint16_t port)<br> {<br> - outb(0x87, port);<br> - outb(0x87, port);<br> + OUTB(0x87, port);<br> + OUTB(0x87, port);<br>
}<br> <br> /* Leave extended functions */<br> static void w836xx_ext_leave(uint16_t port)<br> {<br> - outb(0xAA, port);<br> + OUTB(0xAA, port);<br> }<br> <br> /* General functions for reading/writing Winbond Super I/Os. */<br>
static unsigned char wbsio_read(uint16_t index, uint8_t reg)<br> {<br> - outb(reg, index);<br> - return inb(index + 1);<br> + OUTB(reg, index);<br> + return INB(index + 1);<br> }<br> <br> static void wbsio_write(uint16_t index, uint8_t reg, uint8_t data)<br>
{<br> - outb(reg, index);<br> - outb(data, index + 1);<br> + OUTB(reg, index);<br> + OUTB(data, index + 1);<br> }<br> <br> static void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask)<br>
{<br> uint8_t tmp;<br> <br> - outb(reg, index);<br> - tmp = inb(index + 1) & ~mask;<br> - outb(tmp | (data & mask), index + 1);<br> + OUTB(reg, index);<br> + tmp = INB(index + 1) & ~mask;<br>
+ OUTB(tmp | (data & mask), index + 1);<br> }<br> <br> /**<br> @@ -172,9 +172,9 @@<br> base = pci_read_word(dev, 0x88) & 0xFF80;<br> <br> /* Enable GPIO15 which is connected to write protect. */<br>
- val = inb(base + 0x4D);<br> + val = INB(base + 0x4D);<br> val |= 0x80;<br> - outb(val, base + 0x4D);<br> + OUTB(val, base + 0x4D);<br> <br> return 0;<br> }<br> @@ -249,14 +249,14 @@<br>
<br> #define ASUSP5A_LOOP 5000<br> <br> - outb(0x00, 0xE807);<br> - outb(0xEF, 0xE803);<br> + OUTB(0x00, 0xE807);<br> + OUTB(0xEF, 0xE803);<br> <br> - outb(0xFF, 0xE800);<br> + OUTB(0xFF, 0xE800);<br>
<br> for (i = 0; i < ASUSP5A_LOOP; i++) {<br> - outb(0xE1, 0xFF);<br> - if (inb(0xE800) & 0x04)<br> + OUTB(0xE1, 0xFF);<br> + if (INB(0xE800) & 0x04)<br>
break;<br> }<br> <br> @@ -265,13 +265,13 @@<br> return -1;<br> }<br> <br> - outb(0x20, 0xE801);<br> - outb(0x20, 0xE1);<br> + OUTB(0x20, 0xE801);<br> + OUTB(0x20, 0xE1);<br>
<br> - outb(0xFF, 0xE802);<br> + OUTB(0xFF, 0xE802);<br> <br> for (i = 0; i < ASUSP5A_LOOP; i++) {<br> - tmp = inb(0xE800);<br> + tmp = INB(0xE800);<br> if (tmp & 0x70)<br>
break;<br> }<br> @@ -281,24 +281,24 @@<br> return -1;<br> }<br> <br> - tmp = inb(0xE804);<br> + tmp = INB(0xE804);<br> tmp &= ~0x02;<br> <br> - outb(0x00, 0xE807);<br>
- outb(0xEE, 0xE803);<br> + OUTB(0x00, 0xE807);<br> + OUTB(0xEE, 0xE803);<br> <br> - outb(tmp, 0xE804);<br> + OUTB(tmp, 0xE804);<br> <br> - outb(0xFF, 0xE800);<br> - outb(0xE1, 0xFF);<br>
+ OUTB(0xFF, 0xE800);<br> + OUTB(0xE1, 0xFF);<br> <br> - outb(0x20, 0xE801);<br> - outb(0x20, 0xE1);<br> + OUTB(0x20, 0xE801);<br> + OUTB(0x20, 0xE1);<br> <br> - outb(0xFF, 0xE802);<br>
+ OUTB(0xFF, 0xE802);<br> <br> for (i = 0; i < ASUSP5A_LOOP; i++) {<br> - tmp = inb(0xE800);<br> + tmp = INB(0xE800);<br> if (tmp & 0x70)<br> break;<br>
}<br> @@ -316,9 +316,9 @@<br> uint8_t byte;<br> <br> /* Set GPIO lines in the Broadcom HT-1000 southbridge. */<br> - outb(0x45, 0xcd6);<br> - byte = inb(0xcd7);<br> - outb(byte | 0x20, 0xcd7);<br>
+ OUTB(0x45, 0xcd6);<br> + byte = INB(0xcd7);<br> + OUTB(byte | 0x20, 0xcd7);<br> <br> return 0;<br> }<br> @@ -331,13 +331,13 @@<br> uint8_t tmp;<br> <br> /* Raise GPIO22. */<br> - tmp = inb(0x4036);<br>
- outb(tmp, 0xEB);<br> + tmp = INB(0x4036);<br> + OUTB(tmp, 0xEB);<br> <br> tmp |= 0x40;<br> <br> - outb(tmp, 0x4036);<br> - outb(tmp, 0xEB);<br> + OUTB(tmp, 0x4036);<br> + OUTB(tmp, 0xEB);<br>
<br> return 0;<br> }<br> @@ -360,10 +360,10 @@<br> /* Use GPIOBASE register to find where the GPIO is mapped. */<br> port = (pci_read_word(dev, 0x58) & 0xFFC0) + 0xE;<br> <br> - val = inb(port);<br>
+ val = INB(port);<br> val |= 0x80; /* Top Block Lock -- pin 8 of PLCC32 */<br> val |= 0x40; /* Lower Blocks Lock -- pin 7 of PLCC32 */<br> - outb(val, port);<br> + OUTB(val, port);<br> <br>
return 0;<br> }<br> @@ -449,7 +449,7 @@<br> /* Use GPIOBASE register to find where the GPIO is mapped. */<br> gpiobar = pci_read_word(dev, 0x48) & 0xfffc;<br> <br> - val = inl(gpiobar + ICH7_GPIO_LVL2); /* GP_LVL2 */<br>
+ val = INL(gpiobar + ICH7_GPIO_LVL2); /* GP_LVL2 */<br> printf_debug("\nGPIOBAR=0x%04x GP_LVL: 0x%08x\n", gpiobar, val);<br> <br> /* bit 2 (0x04) = 0 #TBL --> bootblock locking = 1<br>
@@ -462,7 +462,7 @@<br> */<br> val |= (1 << 2) | (1 << 3);<br> <br> - outl(val, gpiobar + ICH7_GPIO_LVL2);<br> + OUTL(val, gpiobar + ICH7_GPIO_LVL2);<br> <br> return 0;<br> }<br>
<br> Modified: trunk/util/flashrom/chipset_enable.c<br> ===================================================================<br> --- trunk/util/flashrom/chipset_enable.c 2008-05-21 22:10:38 UTC (rev 3343)<br> +++ trunk/util/flashrom/chipset_enable.c 2008-05-22 13:22:45 UTC (rev 3344)<br>
@@ -65,37 +65,37 @@<br> /* The same thing on SiS 950 Super I/O side... */<br> <br> /* First probe for Super I/O on config port 0x2e. */<br> - outb(0x87, 0x2e);<br> - outb(0x01, 0x2e);<br> - outb(0x55, 0x2e);<br>
- outb(0x55, 0x2e);<br> + OUTB(0x87, 0x2e);<br> + OUTB(0x01, 0x2e);<br> + OUTB(0x55, 0x2e);<br> + OUTB(0x55, 0x2e);<br> <br> - if (inb(0x2f) != 0x87) {<br> + if (INB(0x2f) != 0x87) {<br>
/* If that failed, try config port 0x4e. */<br> - outb(0x87, 0x4e);<br> - outb(0x01, 0x4e);<br> - outb(0x55, 0x4e);<br> - outb(0xaa, 0x4e);<br> - if (inb(0x4f) != 0x87) {<br>
+ OUTB(0x87, 0x4e);<br> + OUTB(0x01, 0x4e);<br> + OUTB(0x55, 0x4e);<br> + OUTB(0xaa, 0x4e);<br> + if (INB(0x4f) != 0x87) {<br> printf("Can not access SiS 950\n");<br>
return -1;<br> }<br> - outb(0x24, 0x4e);<br> - b = inb(0x4f) | 0xfc;<br> - outb(0x24, 0x4e);<br> - outb(b, 0x4f);<br> - outb(0x02, 0x4e);<br>
- outb(0x02, 0x4f);<br> + OUTB(0x24, 0x4e);<br> + b = INB(0x4f) | 0xfc;<br> + OUTB(0x24, 0x4e);<br> + OUTB(b, 0x4f);<br> + OUTB(0x02, 0x4e);<br>
+ OUTB(0x02, 0x4f);<br> }<br> <br> - outb(0x24, 0x2e);<br> - printf("2f is %#x\n", inb(0x2f));<br> - b = inb(0x2f) | 0xfc;<br> - outb(0x24, 0x2e);<br> - outb(b, 0x2f);<br>
+ OUTB(0x24, 0x2e);<br> + printf("2f is %#x\n", INB(0x2f));<br> + b = INB(0x2f) | 0xfc;<br> + OUTB(0x24, 0x2e);<br> + OUTB(b, 0x2f);<br> <br> - outb(0x02, 0x2e);<br> - outb(0x02, 0x2f);<br>
+ OUTB(0x02, 0x2e);<br> + OUTB(0x02, 0x2f);<br> <br> return 0;<br> }<br> @@ -522,13 +522,13 @@<br> pci_write_byte(dev, 0x48, tmp);<br> <br> /* Now become a bit silly. */<br> - tmp = inb(0xc6f);<br>
- outb(tmp, 0xeb);<br> - outb(tmp, 0xeb);<br> + tmp = INB(0xc6f);<br> + OUTB(tmp, 0xeb);<br> + OUTB(tmp, 0xeb);<br> tmp |= 0x40;<br> - outb(tmp, 0xc6f);<br> - outb(tmp, 0xeb);<br>
- outb(tmp, 0xeb);<br> + OUTB(tmp, 0xc6f);<br> + OUTB(tmp, 0xeb);<br> + OUTB(tmp, 0xeb);<br> <br> return 0;<br> }<br> <br> Modified: trunk/util/flashrom/flash.h<br> ===================================================================<br>
--- trunk/util/flashrom/flash.h 2008-05-21 22:10:38 UTC (rev 3343)<br> +++ trunk/util/flashrom/flash.h 2008-05-22 13:22:45 UTC (rev 3344)<br> @@ -30,6 +30,25 @@<br> #include <stdint.h><br> #include <stdio.h><br>
<br> +#ifdef __FreeBSD__<br> + #include <machine/cpufunc.h><br> + #define off64_t off_t<br> + #define lseek64 lseek<br> + #define OUTB(x, y) do { u_int tmp = (y); outb(tmp, (x)); } while (0)<br> + #define OUTW(x, y) do { u_int tmp = (y); outw(tmp, (x)); } while (0)<br>
+ #define OUTL(x, y) do { u_int tmp = (y); outl(tmp, (x)); } while (0)<br> + #define INB(x) __extension__ ({ u_int tmp = (x); inb(tmp); })<br> + #define INW(x) __extension__ ({ u_int tmp = (x); inw(tmp); })<br> + #define INL(x) __extension__ ({ u_int tmp = (x); inl(tmp); })<br>
+#else<br> + #define OUTB outb<br> + #define OUTW outw<br> + #define OUTL outl<br> + #define INB inb<br> + #define INW inw<br> + #define INL inl<br> +#endif<br> +<br> #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))<br>
<br> struct flashchip {<br> <br> Modified: trunk/util/flashrom/flashrom.c<br> ===================================================================<br> --- trunk/util/flashrom/flashrom.c 2008-05-21 22:10:38 UTC (rev 3343)<br>
+++ trunk/util/flashrom/flashrom.c 2008-05-22 13:22:45 UTC (rev 3344)<br> @@ -252,6 +252,9 @@<br> int option_index = 0;<br> int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0;<br> int ret = 0, i;<br>
+#ifdef __FreeBSD__<br> + int io_fd;<br> +#endif<br> <br> static struct option long_options[] = {<br> {"read", 0, 0, 'r'},<br> @@ -367,6 +370,8 @@<br> /* First get full io access */<br>
#if defined (__sun) && (defined(__i386) || defined(__amd64))<br> if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {<br> +#elif defined(__FreeBSD__)<br> + if ((io_fd = open("/dev/io", O_RDWR)) < 0) {<br>
#else<br> if (iopl(3) != 0) {<br> #endif<br> @@ -559,5 +564,8 @@<br> if (verify_it)<br> ret |= verify_flash(flash, buf);<br> <br> +#ifdef __FreeBSD__<br> + close(io_fd);<br> +#endif<br>
return ret;<br> }<br> <br> Modified: trunk/util/flashrom/it87spi.c<br> ===================================================================<br> --- trunk/util/flashrom/it87spi.c 2008-05-21 22:10:38 UTC (rev 3343)<br>
+++ trunk/util/flashrom/it87spi.c 2008-05-22 13:22:45 UTC (rev 3344)<br> @@ -40,14 +40,14 @@<br> /* Generic Super I/O helper functions */<br> uint8_t regval(uint16_t port, uint8_t reg)<br> {<br> - outb(reg, port);<br>
- return inb(port + 1);<br> + OUTB(reg, port);<br> + return INB(port + 1);<br> }<br> <br> void regwrite(uint16_t port, uint8_t reg, uint8_t val)<br> {<br> - outb(reg, port);<br> - outb(val, port + 1);<br>
+ OUTB(reg, port);<br> + OUTB(val, port + 1);<br> }<br> <br> /* Helper functions for most recent ITE IT87xx Super I/O chips */<br> @@ -55,13 +55,13 @@<br> #define CHIP_ID_BYTE2_REG 0x21<br> static void enter_conf_mode_ite(uint16_t port)<br>
{<br> - outb(0x87, port);<br> - outb(0x01, port);<br> - outb(0x55, port);<br> + OUTB(0x87, port);<br> + OUTB(0x01, port);<br> + OUTB(0x55, port);<br> if (port == ITE_SUPERIO_PORT1)<br>
- outb(0x55, port);<br> + OUTB(0x55, port);<br> else<br> - outb(0xaa, port);<br> + OUTB(0xaa, port);<br> }<br> <br> static void exit_conf_mode_ite(uint16_t port)<br>
@@ -129,7 +129,7 @@<br> int i;<br> <br> do {<br> - busy = inb(it8716f_flashport) & 0x80;<br> + busy = INB(it8716f_flashport) & 0x80;<br> } while (busy);<br> if (readcnt > 3) {<br>
printf("%s called with unsupported readcnt %i.\n",<br> @@ -138,27 +138,27 @@<br> }<br> switch (writecnt) {<br> case 1:<br> - outb(writearr[0], it8716f_flashport + 1);<br>
+ OUTB(writearr[0], it8716f_flashport + 1);<br> writeenc = 0x0;<br> break;<br> case 2:<br> - outb(writearr[0], it8716f_flashport + 1);<br> - outb(writearr[1], it8716f_flashport + 7);<br>
+ OUTB(writearr[0], it8716f_flashport + 1);<br> + OUTB(writearr[1], it8716f_flashport + 7);<br> writeenc = 0x1;<br> break;<br> case 4:<br> - outb(writearr[0], it8716f_flashport + 1);<br>
- outb(writearr[1], it8716f_flashport + 4);<br> - outb(writearr[2], it8716f_flashport + 3);<br> - outb(writearr[3], it8716f_flashport + 2);<br> + OUTB(writearr[0], it8716f_flashport + 1);<br>
+ OUTB(writearr[1], it8716f_flashport + 4);<br> + OUTB(writearr[2], it8716f_flashport + 3);<br> + OUTB(writearr[3], it8716f_flashport + 2);<br> writeenc = 0x2;<br>
break;<br> case 5:<br> - outb(writearr[0], it8716f_flashport + 1);<br> - outb(writearr[1], it8716f_flashport + 4);<br> - outb(writearr[2], it8716f_flashport + 3);<br>
- outb(writearr[3], it8716f_flashport + 2);<br> - outb(writearr[4], it8716f_flashport + 7);<br> + OUTB(writearr[0], it8716f_flashport + 1);<br> + OUTB(writearr[1], it8716f_flashport + 4);<br>
+ OUTB(writearr[2], it8716f_flashport + 3);<br> + OUTB(writearr[3], it8716f_flashport + 2);<br> + OUTB(writearr[4], it8716f_flashport + 7);<br> writeenc = 0x3;<br>
break;<br> default:<br> @@ -170,15 +170,15 @@<br> * Note:<br> * We can't use writecnt directly, but have to use a strange encoding.<br> */<br> - outb(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);<br>
+ OUTB(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);<br> <br> if (readcnt > 0) {<br> do {<br> - busy = inb(it8716f_flashport) & 0x80;<br>
+ busy = INB(it8716f_flashport) & 0x80;<br> } while (busy);<br> <br> for (i = 0; i < readcnt; i++) {<br> - readarr[i] = inb(it8716f_flashport + 5 + i);<br>
+ readarr[i] = INB(it8716f_flashport + 5 + i);<br> }<br> }<br> <br> @@ -190,12 +190,12 @@<br> int i;<br> <br> spi_write_enable();<br> - outb(0x06 , it8716f_flashport + 1);<br>
- outb(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);<br> + OUTB(0x06 , it8716f_flashport + 1);<br> + OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);<br> for (i = 0; i < 256; i++) {<br>
bios[256 * block + i] = buf[256 * block + i];<br> }<br> - outb(0, it8716f_flashport);<br> + OUTB(0, it8716f_flashport);<br> /* Wait until the Write-In-Progress bit is cleared.<br>
* This usually takes 1-10 ms, so wait in 1 ms steps.<br> */<br> @@ -221,7 +221,7 @@<br> myusec_delay(10);<br> }<br> /* resume normal ops... */<br> - outb(0x20, it8716f_flashport);<br>
+ OUTB(0x20, it8716f_flashport);<br> return 0;<br> }<br> <br><br> <br> <br> --<br> coreboot mailing list<br> <a href="mailto:coreboot@coreboot.org">coreboot@coreboot.org</a><br> <a href="http://www.coreboot.org/mailman/listinfo/coreboot">http://www.coreboot.org/mailman/listinfo/coreboot</a><br>
</blockquote></div><br><br>The dependencies from ports are: devel/libpci and devel/gmake (as tested on FreeBSD7).