
#line 11 "stdint.h"
typedef unsigned char uint8_t ; 
typedef signed char int8_t ; 

typedef unsigned short uint16_t ; 
typedef signed short int16_t ; 

typedef unsigned int uint32_t ; 
typedef signed int int32_t ; 







typedef unsigned char uint_least8_t ; 
typedef signed char int_least8_t ; 

typedef unsigned short uint_least16_t ; 
typedef signed short int_least16_t ; 

typedef unsigned int uint_least32_t ; 
typedef signed int int_least32_t ; 







typedef unsigned char uint_fast8_t ; 
typedef signed char int_fast8_t ; 

typedef unsigned int uint_fast16_t ; 
typedef signed int int_fast16_t ; 

typedef unsigned int uint_fast32_t ; 
typedef signed int int_fast32_t ; 







typedef int intptr_t ; 
typedef unsigned int uintptr_t ; 






typedef long int intmax_t ; 
typedef unsigned long int uintmax_t ; 




typedef uint8_t u8 ; 
typedef uint16_t u16 ; 
typedef uint32_t u32 ; 
#line 13 "io.h"
static inline void outb ( uint8_t value , uint16_t port ) 
{ 
        __builtin_outb ( value , port ) ; 
} 

static inline void outw ( uint16_t value , uint16_t port ) 
{ 
        __builtin_outw ( value , port ) ; 
} 

static inline void outl ( uint32_t value , uint16_t port ) 
{ 
        __builtin_outl ( value , port ) ; 
} 


static inline uint8_t inb ( uint16_t port ) 
{ 
        return __builtin_inb ( port ) ; 
} 


static inline uint16_t inw ( uint16_t port ) 
{ 
        return __builtin_inw ( port ) ; 
} 

static inline uint32_t inl ( uint16_t port ) 
{ 
        return __builtin_inl ( port ) ; 
} 








































static inline void outsb ( uint16_t port , const void * addr , unsigned long count ) 
{ 
        __asm__ __volatile__ ( 
                "cld ; rep ; outsb " 
                : "=S" ( addr ) , "=c" ( count ) 
                : "d" ( port ) , "0" ( addr ) , "1" ( count ) 
                ) ; 
} 

static inline void outsw ( uint16_t port , const void * addr , unsigned long count ) 
{ 
        __asm__ __volatile__ ( 
                "cld ; rep ; outsw " 
                : "=S" ( addr ) , "=c" ( count ) 
                : "d" ( port ) , "0" ( addr ) , "1" ( count ) 
                ) ; 
} 

static inline void outsl ( uint16_t port , const void * addr , unsigned long count ) 
{ 
        __asm__ __volatile__ ( 
                "cld ; rep ; outsl " 
                : "=S" ( addr ) , "=c" ( count ) 
                : "d" ( port ) , "0" ( addr ) , "1" ( count ) 
                ) ; 
} 


static inline void insb ( uint16_t port , void * addr , unsigned long count ) 
{ 
        __asm__ __volatile__ ( 
                "cld ; rep ; insb " 
                : "=D" ( addr ) , "=c" ( count ) 
                : "d" ( port ) , "0" ( addr ) , "1" ( count ) 
                ) ; 
} 

static inline void insw ( uint16_t port , void * addr , unsigned long count ) 
{ 
        __asm__ __volatile__ ( 
                "cld ; rep ; insw " 
                : "=D" ( addr ) , "=c" ( count ) 
                : "d" ( port ) , "0" ( addr ) , "1" ( count ) 
                ) ; 
} 

static inline void insl ( uint16_t port , void * addr , unsigned long count ) 
{ 
        __asm__ __volatile__ ( 
                "cld ; rep ; insl " 
                : "=D" ( addr ) , "=c" ( count ) 
                : "d" ( port ) , "0" ( addr ) , "1" ( count ) 
                ) ; 
} 

static inline void writeb ( uint8_t b , volatile void * addr ) 
{ 
        * ( volatile uint8_t * ) addr = b ; 
} 

static inline void writew ( uint16_t b , volatile void * addr ) 
{ 
        * ( volatile uint16_t * ) addr = b ; 
} 

static inline void writel ( uint32_t b , volatile void * addr ) 
{ 
        * ( volatile uint32_t * ) addr = b ; 
} 

static inline uint8_t readb ( const volatile void * addr ) 
{ 
        return * ( volatile uint8_t * ) addr ; 
} 

static inline uint16_t readw ( const volatile void * addr ) 
{ 
        return * ( volatile uint16_t * ) addr ; 
} 

static inline uint32_t readl ( const volatile void * addr ) 
{ 
        return * ( volatile uint32_t * ) addr ; 
} 
#line 7 "romcc_io.h"
static inline __attribute__ ( ( always_inline ) ) uint8_t read8 ( unsigned long addr ) 
{ 
        return * ( ( volatile uint8_t * ) ( addr ) ) ; 
} 

static inline __attribute__ ( ( always_inline ) ) uint16_t read16 ( unsigned long addr ) 
{ 
        return * ( ( volatile uint16_t * ) ( addr ) ) ; 
} 

static inline __attribute__ ( ( always_inline ) ) uint32_t read32 ( unsigned long addr ) 
{ 
        return * ( ( volatile uint32_t * ) ( addr ) ) ; 
} 

static inline __attribute__ ( ( always_inline ) ) void write8 ( unsigned long addr , uint8_t value ) 
{ 
        * ( ( volatile uint8_t * ) ( addr ) ) = value ; 
} 

static inline __attribute__ ( ( always_inline ) ) void write16 ( unsigned long addr , uint16_t value ) 
{ 
        * ( ( volatile uint16_t * ) ( addr ) ) = value ; 
} 

static inline __attribute__ ( ( always_inline ) ) void write32 ( unsigned long addr , uint32_t value ) 
{ 
        * ( ( volatile uint32_t * ) ( addr ) ) = value ; 
} 







static inline int log2 ( int value ) 
{ 
        unsigned int r = 0 ; 
        __asm__ volatile ( 
                "bsrl %1, %0\n\t" 
                "jnz 1f\n\t" 
                "movl $-1, %0\n\t" 
                "1:\n\t" 
                : "=r" ( r ) : "r" ( value ) ) ; 
        return r ; 

} 
static inline int log2f ( int value ) 
{ 
        unsigned int r = 0 ; 
        __asm__ volatile ( 
                "bsfl %1, %0\n\t" 
                "jnz 1f\n\t" 
                "movl $-1, %0\n\t" 
                "1:\n\t" 
                : "=r" ( r ) : "r" ( value ) ) ; 
        return r ; 

} 


















typedef unsigned device_t ; 






static inline __attribute__ ( ( always_inline ) ) uint8_t pci_io_read_config8 ( device_t dev , unsigned where ) 
{ 
        unsigned addr ; 

        addr = ( dev >> 4 ) | where ; 



        outl ( 0x80000000 | ( addr & ~ 3 ) , 0xCF8 ) ; 
        return inb ( 0xCFC + ( addr & 3 ) ) ; 
} 









static inline __attribute__ ( ( always_inline ) ) uint8_t pci_read_config8 ( device_t dev , unsigned where ) 
{ 



        return pci_io_read_config8 ( dev , where ) ; 

} 

static inline __attribute__ ( ( always_inline ) ) uint16_t pci_io_read_config16 ( device_t dev , unsigned where ) 
{ 
        unsigned addr ; 

        addr = ( dev >> 4 ) | where ; 



        outl ( 0x80000000 | ( addr & ~ 3 ) , 0xCF8 ) ; 
        return inw ( 0xCFC + ( addr & 2 ) ) ; 
} 










static inline __attribute__ ( ( always_inline ) ) uint16_t pci_read_config16 ( device_t dev , unsigned where ) 
{ 



        return pci_io_read_config16 ( dev , where ) ; 

} 


static inline __attribute__ ( ( always_inline ) ) uint32_t pci_io_read_config32 ( device_t dev , unsigned where ) 
{ 
        unsigned addr ; 

        addr = ( dev >> 4 ) | where ; 



        outl ( 0x80000000 | ( addr & ~ 3 ) , 0xCF8 ) ; 
        return inl ( 0xCFC ) ; 
} 










static inline __attribute__ ( ( always_inline ) ) uint32_t pci_read_config32 ( device_t dev , unsigned where ) 
{ 



        return pci_io_read_config32 ( dev , where ) ; 

} 

static inline __attribute__ ( ( always_inline ) ) void pci_io_write_config8 ( device_t dev , unsigned where , uint8_t value ) 
{ 
        unsigned addr ; 

        addr = ( dev >> 4 ) | where ; 



        outl ( 0x80000000 | ( addr & ~ 3 ) , 0xCF8 ) ; 
        outb ( value , 0xCFC + ( addr & 3 ) ) ; 
} 










static inline __attribute__ ( ( always_inline ) ) void pci_write_config8 ( device_t dev , unsigned where , uint8_t value ) 
{ 



        pci_io_write_config8 ( dev , where , value ) ; 

} 


static inline __attribute__ ( ( always_inline ) ) void pci_io_write_config16 ( device_t dev , unsigned where , uint16_t value ) 
{ 
        unsigned addr ; 

        addr = ( dev >> 4 ) | where ; 



        outl ( 0x80000000 | ( addr & ~ 3 ) , 0xCF8 ) ; 
        outw ( value , 0xCFC + ( addr & 2 ) ) ; 
} 










static inline __attribute__ ( ( always_inline ) ) void pci_write_config16 ( device_t dev , unsigned where , uint16_t value ) 
{ 



        pci_io_write_config16 ( dev , where , value ) ; 

} 


static inline __attribute__ ( ( always_inline ) ) void pci_io_write_config32 ( device_t dev , unsigned where , uint32_t value ) 
{ 
        unsigned addr ; 

        addr = ( dev >> 4 ) | where ; 



        outl ( 0x80000000 | ( addr & ~ 3 ) , 0xCF8 ) ; 
        outl ( value , 0xCFC ) ; 
} 










static inline __attribute__ ( ( always_inline ) ) void pci_write_config32 ( device_t dev , unsigned where , uint32_t value ) 
{ 



        pci_io_write_config32 ( dev , where , value ) ; 

} 


static device_t pci_io_locate_device ( unsigned pci_id , device_t dev ) 
{ 
        for ( ; dev <= ( ( ( ( 255 ) & 0xFFF ) << 20 ) | ( ( ( 31 ) & 0x1F ) << 15 ) | ( ( ( 7 ) & 0x07 ) << 12 ) ) ; dev += ( ( ( ( 0 ) & 0xFFF ) << 20 ) | ( ( ( 0 ) & 0x1F ) << 15 ) | ( ( ( 1 ) & 0x07 ) << 12 ) ) ) { 
                unsigned int id ; 
                id = pci_io_read_config32 ( dev , 0 ) ; 
                if ( id == pci_id ) { 
                        return dev ; 
                } 
        } 
        return ( 0xffffffffU ) ; 
} 

static device_t pci_locate_device ( unsigned pci_id , device_t dev ) 
{ 
        for ( ; dev <= ( ( ( ( 255 | ( ( ( 1 << 0 ) - 1 ) << 8 ) ) & 0xFFF ) << 20 ) | ( ( ( 31 ) & 0x1F ) << 15 ) | ( ( ( 7 ) & 0x07 ) << 12 ) ) ; dev += ( ( ( ( 0 ) & 0xFFF ) << 20 ) | ( ( ( 0 ) & 0x1F ) << 15 ) | ( ( ( 1 ) & 0x07 ) << 12 ) ) ) { 
                unsigned int id ; 
                id = pci_read_config32 ( dev , 0 ) ; 
                if ( id == pci_id ) { 
                        return dev ; 
                } 
        } 
        return ( 0xffffffffU ) ; 
} 

static device_t pci_locate_device_on_bus ( unsigned pci_id , unsigned bus ) 
{ 
        device_t dev , last ; 

        dev = ( ( ( ( bus ) & 0xFFF ) << 20 ) | ( ( ( 0 ) & 0x1F ) << 15 ) | ( ( ( 0 ) & 0x07 ) << 12 ) ) ; 
        last = ( ( ( ( bus ) & 0xFFF ) << 20 ) | ( ( ( 31 ) & 0x1F ) << 15 ) | ( ( ( 7 ) & 0x07 ) << 12 ) ) ; 

        for ( ; dev <= last ; dev += ( ( ( ( 0 ) & 0xFFF ) << 20 ) | ( ( ( 0 ) & 0x1F ) << 15 ) | ( ( ( 1 ) & 0x07 ) << 12 ) ) ) { 
                unsigned int id ; 
                id = pci_read_config32 ( dev , 0 ) ; 
                if ( id == pci_id ) { 
                        return dev ; 
                } 
        } 
        return ( 0xffffffffU ) ; 
} 


static inline __attribute__ ( ( always_inline ) ) void pnp_write_config ( device_t dev , uint8_t reg , uint8_t value ) 
{ 
        unsigned port = dev >> 8 ; 
        outb ( reg , port ) ; 
        outb ( value , port + 1 ) ; 
} 

static inline __attribute__ ( ( always_inline ) ) uint8_t pnp_read_config ( device_t dev , uint8_t reg ) 
{ 
        unsigned port = dev >> 8 ; 
        outb ( reg , port ) ; 
        return inb ( port + 1 ) ; 
} 

static inline __attribute__ ( ( always_inline ) ) void pnp_set_logical_device ( device_t dev ) 
{ 
        unsigned device = dev & 0xff ; 
        pnp_write_config ( dev , 0x07 , device ) ; 
} 

static inline __attribute__ ( ( always_inline ) ) void pnp_set_enable ( device_t dev , int enable ) 
{ 
        pnp_write_config ( dev , 0x30 , enable ? 0x1 : 0x0 ) ; 
} 

static inline __attribute__ ( ( always_inline ) ) int pnp_read_enable ( device_t dev ) 
{ 
        return ! ! pnp_read_config ( dev , 0x30 ) ; 
} 

static inline __attribute__ ( ( always_inline ) ) void pnp_set_iobase ( device_t dev , unsigned index , unsigned iobase ) 
{ 
        pnp_write_config ( dev , index + 0 , ( iobase >> 8 ) & 0xff ) ; 
        pnp_write_config ( dev , index + 1 , iobase & 0xff ) ; 
} 

static inline __attribute__ ( ( always_inline ) ) uint16_t pnp_read_iobase ( device_t dev , unsigned index ) 
{ 
        return ( ( uint16_t ) ( pnp_read_config ( dev , index ) ) << 8 ) | pnp_read_config ( dev , index + 1 ) ; 
} 

static inline __attribute__ ( ( always_inline ) ) void pnp_set_irq ( device_t dev , unsigned index , unsigned irq ) 
{ 
        pnp_write_config ( dev , index , irq ) ; 
} 

static inline __attribute__ ( ( always_inline ) ) void pnp_set_drq ( device_t dev , unsigned index , unsigned drq ) 
{ 
        pnp_write_config ( dev , index , drq & 0xff ) ; 
} 
#line 5 "hlt.h"
static void hlt ( void ) 
{ 
        __builtin_hlt ( ) ; 
} 
#line 47 "serial.c"
static int uart_can_tx_byte ( void ) 
{ 
        return inb ( 0x3f8 + 0x05 ) & 0x20 ; 
} 

static void uart_wait_to_tx_byte ( void ) 
{ 
        while ( ! uart_can_tx_byte ( ) ) 
        ; 
} 

static void uart_wait_until_sent ( void ) 
{ 
        while ( ! ( inb ( 0x3f8 + 0x05 ) & 0x40 ) ) 
        ; 
} 

static void uart_tx_byte ( unsigned char data ) 
{ 
        uart_wait_to_tx_byte ( ) ; 
        outb ( data , 0x3f8 + 0x00 ) ; 

        uart_wait_until_sent ( ) ; 
} 

static void uart_init ( void ) 
{ 

        outb ( 0x0 , 0x3f8 + 0x01 ) ; 

        outb ( 0x01 , 0x3f8 + 0x02 ) ; 

        outb ( 0x80 | 0x3 , 0x3f8 + 0x03 ) ; 









        outb ( ( 115200 / 115200 ) & 0xFF , 0x3f8 + 0x00 ) ; 
        outb ( ( ( 115200 / 115200 ) >> 8 ) & 0xFF , 0x3f8 + 0x01 ) ; 

        outb ( 0x3 , 0x3f8 + 0x03 ) ; 
} 
#line 4 "console.c"
static void __console_tx_byte ( unsigned char byte ) 
{ 
        uart_tx_byte ( byte ) ; 
} 
#line 2 "console_print.c"
static void __console_tx_nibble ( unsigned nibble ) 
{ 
        unsigned char digit ; 
        digit = nibble + '0' ; 
        if ( digit > '9' ) { 
                digit += 39 ; 
        } 
        __console_tx_byte ( digit ) ; 
} 

static void __console_tx_char ( int loglevel , unsigned char byte ) 
{ 
        if ( 7 > loglevel ) { 
                uart_tx_byte ( byte ) ; 
        } 
} 

static void __console_tx_hex8 ( int loglevel , unsigned char value ) 
{ 
        if ( 7 > loglevel ) { 
                __console_tx_nibble ( ( value >> 4U ) & 0x0fU ) ; 
                __console_tx_nibble ( value & 0x0fU ) ; 
        } 
} 

static void __console_tx_hex16 ( int loglevel , unsigned short value ) 
{ 
        if ( 7 > loglevel ) { 
                __console_tx_nibble ( ( value >> 12U ) & 0x0fU ) ; 
                __console_tx_nibble ( ( value >> 8U ) & 0x0fU ) ; 
                __console_tx_nibble ( ( value >> 4U ) & 0x0fU ) ; 
                __console_tx_nibble ( value & 0x0fU ) ; 
        } 
} 

static void __console_tx_hex32 ( int loglevel , unsigned int value ) 
{ 
        if ( 7 > loglevel ) { 
                __console_tx_nibble ( ( value >> 28U ) & 0x0fU ) ; 
                __console_tx_nibble ( ( value >> 24U ) & 0x0fU ) ; 
                __console_tx_nibble ( ( value >> 20U ) & 0x0fU ) ; 
                __console_tx_nibble ( ( value >> 16U ) & 0x0fU ) ; 
                __console_tx_nibble ( ( value >> 12U ) & 0x0fU ) ; 
                __console_tx_nibble ( ( value >> 8U ) & 0x0fU ) ; 
                __console_tx_nibble ( ( value >> 4U ) & 0x0fU ) ; 
                __console_tx_nibble ( value & 0x0fU ) ; 
        } 
} 

static void __console_tx_string ( int loglevel , const char * str ) 
{ 
        if ( 7 > loglevel ) { 
                unsigned char ch ; 
                while ( ( ch = * str ++ ) != '\0' ) { 
                        __console_tx_byte ( ch ) ; 
                } 
        } 
} 











static void print_emerg_char ( unsigned char byte ) { __console_tx_char ( 0 , byte ) ; } 
static void print_emerg_hex8 ( unsigned char value ) { __console_tx_hex8 ( 0 , value ) ; } 
static void print_emerg_hex16 ( unsigned short value ) { __console_tx_hex16 ( 0 , value ) ; } 
static void print_emerg_hex32 ( unsigned int value ) { __console_tx_hex32 ( 0 , value ) ; } 
static void print_emerg ( const char * str ) { __console_tx_string ( 0 , str ) ; } 

static void print_alert_char ( unsigned char byte ) { __console_tx_char ( 1 , byte ) ; } 
static void print_alert_hex8 ( unsigned char value ) { __console_tx_hex8 ( 1 , value ) ; } 
static void print_alert_hex16 ( unsigned short value ) { __console_tx_hex16 ( 1 , value ) ; } 
static void print_alert_hex32 ( unsigned int value ) { __console_tx_hex32 ( 1 , value ) ; } 
static void print_alert ( const char * str ) { __console_tx_string ( 1 , str ) ; } 

static void print_crit_char ( unsigned char byte ) { __console_tx_char ( 2 , byte ) ; } 
static void print_crit_hex8 ( unsigned char value ) { __console_tx_hex8 ( 2 , value ) ; } 
static void print_crit_hex16 ( unsigned short value ) { __console_tx_hex16 ( 2 , value ) ; } 
static void print_crit_hex32 ( unsigned int value ) { __console_tx_hex32 ( 2 , value ) ; } 
static void print_crit ( const char * str ) { __console_tx_string ( 2 , str ) ; } 

static void print_err_char ( unsigned char byte ) { __console_tx_char ( 3 , byte ) ; } 
static void print_err_hex8 ( unsigned char value ) { __console_tx_hex8 ( 3 , value ) ; } 
static void print_err_hex16 ( unsigned short value ) { __console_tx_hex16 ( 3 , value ) ; } 
static void print_err_hex32 ( unsigned int value ) { __console_tx_hex32 ( 3 , value ) ; } 
static void print_err ( const char * str ) { __console_tx_string ( 3 , str ) ; } 

static void print_warning_char ( unsigned char byte ) { __console_tx_char ( 4 , byte ) ; } 
static void print_warning_hex8 ( unsigned char value ) { __console_tx_hex8 ( 4 , value ) ; } 
static void print_warning_hex16 ( unsigned short value ) { __console_tx_hex16 ( 4 , value ) ; } 
static void print_warning_hex32 ( unsigned int value ) { __console_tx_hex32 ( 4 , value ) ; } 
static void print_warning ( const char * str ) { __console_tx_string ( 4 , str ) ; } 

static void print_notice_char ( unsigned char byte ) { __console_tx_char ( 5 , byte ) ; } 
static void print_notice_hex8 ( unsigned char value ) { __console_tx_hex8 ( 5 , value ) ; } 
static void print_notice_hex16 ( unsigned short value ) { __console_tx_hex16 ( 5 , value ) ; } 
static void print_notice_hex32 ( unsigned int value ) { __console_tx_hex32 ( 5 , value ) ; } 
static void print_notice ( const char * str ) { __console_tx_string ( 5 , str ) ; } 

static void print_info_char ( unsigned char byte ) { __console_tx_char ( 6 , byte ) ; } 
static void print_info_hex8 ( unsigned char value ) { __console_tx_hex8 ( 6 , value ) ; } 
static void print_info_hex16 ( unsigned short value ) { __console_tx_hex16 ( 6 , value ) ; } 
static void print_info_hex32 ( unsigned int value ) { __console_tx_hex32 ( 6 , value ) ; } 
static void print_info ( const char * str ) { __console_tx_string ( 6 , str ) ; } 

static void print_debug_char ( unsigned char byte ) { __console_tx_char ( 7 , byte ) ; } 
static void print_debug_hex8 ( unsigned char value ) { __console_tx_hex8 ( 7 , value ) ; } 
static void print_debug_hex16 ( unsigned short value ) { __console_tx_hex16 ( 7 , value ) ; } 
static void print_debug_hex32 ( unsigned int value ) { __console_tx_hex32 ( 7 , value ) ; } 
static void print_debug ( const char * str ) { __console_tx_string ( 7 , str ) ; } 

static void print_spew_char ( unsigned char byte ) { __console_tx_char ( 8 , byte ) ; } 
static void print_spew_hex8 ( unsigned char value ) { __console_tx_hex8 ( 8 , value ) ; } 
static void print_spew_hex16 ( unsigned short value ) { __console_tx_hex16 ( 8 , value ) ; } 
static void print_spew_hex32 ( unsigned int value ) { __console_tx_hex32 ( 8 , value ) ; } 
static void print_spew ( const char * str ) { __console_tx_string ( 8 , str ) ; } 
#line 28 "console.c"
static void console_init ( void ) 
{ 
        static const char console_test [ ] = 
                "\r\n\r\ncoreboot-" 
                         "2.0.0" 
                         ".0-fallback" 
                " " 
"Do 16. Okt 20:31:13 CEST 2008" 
                " starting...\r\n" ; 
        print_info ( console_test ) ; 
} 


static void die ( const char * str ) 
{ 
        print_emerg ( str ) ; 
        do { 
                hlt ( ) ; 
        } while ( 1 ) ; 
} 
#line 1 "ramtest.c"
static void write_phys ( unsigned long addr , unsigned long value ) 
{ 










        volatile unsigned long * ptr ; 
        ptr = ( void * ) addr ; 
        * ptr = value ; 

} 

static unsigned long read_phys ( unsigned long addr ) 
{ 
        volatile unsigned long * ptr ; 
        ptr = ( void * ) addr ; 
        return * ptr ; 
} 

static void ram_fill ( unsigned long start , unsigned long stop ) 
{ 
        unsigned long addr ; 






        print_debug ( "DRAM fill: " ) ; 
        print_debug_hex32 ( start ) ; 
        print_debug ( "-" ) ; 
        print_debug_hex32 ( stop ) ; 
        print_debug ( "\r\n" ) ; 

        for ( addr = start ; addr < stop ; addr += 4 ) { 

                if ( ! ( addr & 0xfffff ) ) { 



                        print_debug_hex32 ( addr ) ; 
                        print_debug ( " \r" ) ; 

                } 
                write_phys ( addr , addr ) ; 
        } ; 




        print_debug_hex32 ( addr ) ; 
        print_debug ( "\r\nDRAM filled\r\n" ) ; 

} 

static void ram_verify ( unsigned long start , unsigned long stop ) 
{ 
        unsigned long addr ; 
        int i = 0 ; 






        print_debug ( "DRAM verify: " ) ; 
        print_debug_hex32 ( start ) ; 
        print_debug_char ( '-' ) ; 
        print_debug_hex32 ( stop ) ; 
        print_debug ( "\r\n" ) ; 

        for ( addr = start ; addr < stop ; addr += 4 ) { 
                unsigned long value ; 

                if ( ! ( addr & 0xfffff ) ) { 



                        print_debug_hex32 ( addr ) ; 
                        print_debug ( " \r" ) ; 

                } 
                value = read_phys ( addr ) ; 
                if ( value != addr ) { 




                        print_err ( "Fail: @0x" ) ; 
                        print_err_hex32 ( addr ) ; 
                        print_err ( " Read value=0x" ) ; 
                        print_err_hex32 ( value ) ; 
                        print_err ( "\r\n" ) ; 

                        i ++ ; 
                        if ( i > 256 ) { 



                                print_debug ( "Aborting.\n\r" ) ; 

                                break ; 
                        } 
                } 
        } 




        print_debug_hex32 ( addr ) ; 


        if ( i ) { 



                print_debug ( "\r\nDRAM did _NOT_ verify!\r\n" ) ; 

                die ( "DRAM ERROR" ) ; 
        } 
        else { 



                print_debug ( "\r\nDRAM range verified.\r\n" ) ; 

        } 
} 


void ram_check ( unsigned long start , unsigned long stop ) 
{ 








        print_debug ( "Testing DRAM : " ) ; 
        print_debug_hex32 ( start ) ; 
        print_debug ( "-" ) ; 
        print_debug_hex32 ( stop ) ; 
        print_debug ( "\r\n" ) ; 

        ram_fill ( start , stop ) ; 
        ram_verify ( start , stop ) ; 



        print_debug ( "Done.\r\n" ) ; 

} 
#line 26 "raminit.h"
struct mem_controller { 
        device_t d0f0 , d0f2 , d0f3 , d0f4 , d0f7 , d1f0 ; 
        u8 channel0 [ 1 ] ; 
} ; 
#line 4 "cache.h"
static inline unsigned long read_cr0 ( void ) 
{ 
        unsigned long cr0 ; 
        asm volatile ( "movl %%cr0, %0" : "=r" ( cr0 ) ) ; 
        return cr0 ; 
} 

static inline void write_cr0 ( unsigned long cr0 ) 
{ 
        asm volatile ( "movl %0, %%cr0" : : "r" ( cr0 ) ) ; 
} 

static inline void invd ( void ) 
{ 
        asm volatile ( "invd" : : : "memory" ) ; 
} 
static inline void wbinvd ( void ) 
{ 
        asm volatile ( "wbinvd" ) ; 
} 

static inline void enable_cache ( void ) 
{ 
        unsigned long cr0 ; 
        cr0 = read_cr0 ( ) ; 
        cr0 &= 0x9fffffff ; 
        write_cr0 ( cr0 ) ; 
} 

static inline void disable_cache ( void ) 
{ 

        unsigned long cr0 ; 
        cr0 = read_cr0 ( ) ; 
        cr0 |= 0x40000000 ; 
        wbinvd ( ) ; 
        write_cr0 ( cr0 ) ; 
        wbinvd ( ) ; 
} 
#line 6 "msr.h"
typedef __builtin_msr_t msr_t ; 

static msr_t rdmsr ( unsigned long index ) 
{ 
        return __builtin_rdmsr ( index ) ; 
} 

static void wrmsr ( unsigned long index , msr_t msr ) 
{ 
        __builtin_wrmsr ( index , msr . lo , msr . hi ) ; 
} 
#line 29 "earlymtrr.c"
static void disable_var_mtrr ( unsigned reg ) 
{ 




        msr_t zero ; 
        zero . lo = zero . hi = 0 ; 
        wrmsr ( ( 0x200 + 2 * ( reg ) + 1 ) , zero ) ; 
} 

static void set_var_mtrr ( 
        unsigned reg , unsigned base , unsigned size , unsigned type ) 

{ 


        msr_t basem , maskm ; 
        basem . lo = base | type ; 
        basem . hi = 0 ; 
        wrmsr ( ( 0x200 + 2 * ( reg ) ) , basem ) ; 
        maskm . lo = ~ ( size - 1 ) | 0x800 ; 
        maskm . hi = ( 1 << ( 36 - 32 ) ) - 1 ; 
        wrmsr ( ( 0x200 + 2 * ( reg ) + 1 ) , maskm ) ; 
} 

static void set_var_mtrr_x ( 
        unsigned reg , uint32_t base_lo , uint32_t base_hi , uint32_t size_lo , uint32_t size_hi , unsigned type ) 

{ 

        msr_t basem , maskm ; 
        basem . lo = ( base_lo & 0xfffff000 ) | type ; 
        basem . hi = base_hi & ( ( 1 << ( 36 - 32 ) ) - 1 ) ; 
        wrmsr ( ( 0x200 + 2 * ( reg ) ) , basem ) ; 
        maskm . hi = ( 1 << ( 36 - 32 ) ) - 1 ; 
        if ( size_lo ) { 
                maskm . lo = ~ ( size_lo - 1 ) | 0x800 ; 
        } else { 
                maskm . lo = 0x800 ; 
                maskm . hi &= ~ ( size_hi - 1 ) ; 
        } 
        wrmsr ( ( 0x200 + 2 * ( reg ) + 1 ) , maskm ) ; 
} 

static void cache_lbmem ( int type ) 
{ 

        disable_cache ( ) ; 
        set_var_mtrr ( 0 , 0x00000000 , 2048 << 10 , type ) ; 
        enable_cache ( ) ; 
} 




static void do_early_mtrr_init ( const unsigned long * mtrr_msrs ) 
{ 




        msr_t msr ; 
        const unsigned long * msr_addr ; 


        msr . lo = 0 ; 
        msr . hi = 0 ; 
        unsigned long msr_nr ; 
        for ( msr_addr = mtrr_msrs ; ( msr_nr = * msr_addr ) ; msr_addr ++ ) { 
                wrmsr ( msr_nr , msr ) ; 
        } 





        set_var_mtrr ( 1 , 0xffff0000 , 0x10000 , 6 ) ; 





        msr . hi = 0x00000000 ; 
        msr . lo = 0x00000800 ; 
        wrmsr ( 0x2ff , msr ) ; 

} 

static void early_mtrr_init ( void ) 
{ 
        static const unsigned long mtrr_msrs [ ] = { 

                0x250 , 0x258 , 0x259 , 
                0x268 , 0x269 , 0x26A , 
                0x26B , 0x26C , 0x26D , 
                0x26E , 0x26F , 

                0x200 , 0x201 , 0x202 , 0x203 , 
                0x204 , 0x205 , 0x206 , 0x207 , 
                0x208 , 0x209 , 0x20A , 0x20B , 
                0x20C , 0x20D , 0x20E , 0x20F , 

                0 
        } ; 
        disable_cache ( ) ; 
        do_early_mtrr_init ( mtrr_msrs ) ; 
        enable_cache ( ) ; 
} 

static int early_mtrr_init_detected ( void ) 
{ 
        msr_t msr ; 






        msr = rdmsr ( 0x2ff ) ; 
        return msr . lo & 0x00000800 ; 
} 
#line 4 "bist.h"
static void report_bist_failure ( unsigned long bist ) 
{ 
        if ( bist != 0 ) { 



                print_emerg ( "BIST failed: " ) ; 
                print_emerg_hex32 ( bist ) ; 

                die ( "\r\n" ) ; 

        } 
} 
#line 3 "udelay_io.c"
void udelay ( int usecs ) 
{ 
        int i ; 
        for ( i = 0 ; i < usecs ; i ++ ) 
                inb ( 0x80 ) ; 
} 
#line 2 "delay.c"
void mdelay ( unsigned msecs ) 
{ 
        unsigned i ; 
        for ( i = 0 ; i < msecs ; i ++ ) { 
                udelay ( 1000 ) ; 
        } 
} 
void delay ( unsigned secs ) 
{ 
        unsigned i ; 
        for ( i = 0 ; i < secs ; i ++ ) { 
                mdelay ( 1000 ) ; 
        } 
} 
#line 3 "boot_cpu.c"
static int boot_cpu ( void ) 
{ 
        int bsp ; 
        msr_t msr ; 
        msr = rdmsr ( 0x1b ) ; 
        bsp = ! ! ( msr . lo & ( 1 << 8 ) ) ; 
        return bsp ; 
} 
#line 4 "stddef.h"
typedef long ptrdiff_t ; 
typedef unsigned long size_t ; 
typedef long ssize_t ; 

typedef int wchar_t ; 
typedef unsigned int wint_t ; 
#line 78 "vt8237r.h"
struct vt8237_network_rom { 
        u8 mac_address [ 6 ] ; 
        u8 phy_addr ; 
        u8 res1 ; 
        u16 sub_sid ; 
        u16 sub_vid ; 
        u16 pid ; 
        u16 vid ; 
        u8 pmcc ; 
        u8 data_sel ; 
        u8 pmu_data_reg ; 
        u8 aux_curr ; 
        u16 reserved ; 
        u8 min_gnt ; 
        u8 max_lat ; 
        u8 bcr0 ; 
        u8 bcr1 ; 
        u8 cfg_a ; 
        u8 cfg_b ; 
        u8 cfg_c ; 
        u8 cfg_d ; 
        u8 checksum ; 
} 



; 
#line 34 "vt8237r_early_smbus.c"
static void smbus_print_error ( u8 host_status , int loops ) 
{ 

        if ( ( host_status == 0x00 || host_status == 0x40 || 
             host_status == 0x42 ) && ( loops < ( 100 * 1000 * 10 ) ) ) 
                return ; 

        if ( loops >= ( 100 * 1000 * 10 ) ) 
                print_err ( "SMBus timeout\r\n" ) ; 
        if ( host_status & ( 1 << 4 ) ) 
                print_err ( "Interrupt/SMI# was Failed Bus Transaction\r\n" ) ; 
        if ( host_status & ( 1 << 3 ) ) 
                print_err ( "Bus error\r\n" ) ; 
        if ( host_status & ( 1 << 2 ) ) 
                print_err ( "Device error\r\n" ) ; 
        if ( host_status & ( 1 << 1 ) ) 
                print_debug ( "Interrupt/SMI# completed successfully\r\n" ) ; 
        if ( host_status & ( 1 << 0 ) ) 
                print_err ( "Host busy\r\n" ) ; 
} 




static void smbus_wait_until_ready ( void ) 
{ 
        int loops ; 

                                                    ; 

        loops = 0 ; 

        while ( ( inb ( ( 0x400 + 0x0 ) ) & 1 ) == 1 && loops < ( 100 * 1000 * 10 ) ) 
                ++ loops ; 

        smbus_print_error ( inb ( ( 0x400 + 0x0 ) ) , loops ) ; 
} 




static void smbus_reset ( void ) 
{ 
        outb ( 0xff , ( 0x400 + 0x0 ) ) ; 


        inb ( ( 0x400 + 0x0 ) ) ; 

                                           ; 
                                          ; 
                           ; 
} 







u8 smbus_read_byte ( u8 dimm , u8 offset ) 
{ 
        u8 val ; 

                            ; 
                               ; 
                               ; 
                                 ; 
                           ; 

        smbus_reset ( ) ; 


        outb ( 0x00 , ( 0x400 + 0x5 ) ) ; 
                  inb ( 0x80 ) ; 
        smbus_wait_until_ready ( ) ; 


        dimm = ( dimm << 1 ) ; 
        dimm |= 1 ; 
        outb ( dimm , ( 0x400 + 0x4 ) ) ; 
        outb ( offset , ( 0x400 + 0x3 ) ) ; 


        outb ( 0x48 , ( 0x400 + 0x2 ) ) ; 
                  inb ( 0x80 ) ; 
        smbus_wait_until_ready ( ) ; 

        val = inb ( ( 0x400 + 0x5 ) ) ; 
                             ; 
                              ; 
                           ; 


        smbus_reset ( ) ; 

        return val ; 
} 




void enable_smbus ( void ) 
{ 
        device_t dev ; 


        dev = pci_locate_device ( 
                                                                    ( ( ( ( 0x3227 ) & 0xFFFF ) << 16 ) | ( ( 0x1106 ) & 0xFFFF ) ) , 0 ) ; 
        if ( dev == ( 0xffffffffU ) ) { 

                dev = pci_locate_device ( 
                                                                     ( ( ( ( 0x3372 ) & 0xFFFF ) << 16 ) | ( ( 0x1106 ) & 0xFFFF ) ) , 0 ) ; 
                if ( dev == ( 0xffffffffU ) ) 
                        die ( "Power management controller not found\r\n" ) ; 
        } 





        pci_write_config8 ( dev , 0x94 , 0xa0 ) ; 


        pci_write_config16 ( dev , 0xd0 , 
                                           0x400 | 0x1 ) ; 


        pci_write_config8 ( dev , 0xd2 , 0x01 ) ; 


        pci_write_config16 ( dev , 0x04 , 0x1 ) ; 

        smbus_reset ( ) ; 


        inb ( ( 0x400 + 0x2 ) ) ; 
} 














void smbus_fixup ( const struct mem_controller * ctrl ) 
{ 
        int i , ram_slots , current_slot = 0 ; 
        u8 result = 0 ; 

        ram_slots = ( sizeof ( ctrl -> channel0 ) / sizeof ( ( ctrl -> channel0 ) [ 0 ] ) ) ; 
        if ( ! ram_slots ) { 
                print_err ( "smbus_fixup() thinks there are no RAM slots!\r\n" ) ; 
                return ; 
        } 

                                                   ; 






        for ( i = 0 ; ( i < ( 100 * 1000 * 10 ) && ( ( result < 4 ) || 
           ( result > 0xb ) ) ) ; i ++ ) { 

                if ( current_slot > ram_slots ) 
                        current_slot = 0 ; 

                result = smbus_read_byte ( ctrl -> channel0 [ current_slot ] , 
                                                       2 ) ; 
                current_slot ++ ; 
                                ; 
        } 

        if ( i >= ( 100 * 1000 * 10 ) ) 
                print_err ( "SMBus timed out while warming up\r\n" ) ; 
        else 
                                       ; 
} 



void vt8237_sb_enable_fid_vid ( void ) 
{ 
        device_t dev , devctl ; 


        dev = pci_locate_device ( 
                                                                    ( ( ( ( 0x3227 ) & 0xFFFF ) << 16 ) | ( ( 0x1106 ) & 0xFFFF ) ) , 0 ) ; 
        if ( dev == ( 0xffffffffU ) ) { 

                dev = pci_locate_device ( 
                                                                     ( ( ( ( 0x3372 ) & 0xFFFF ) << 16 ) | ( ( 0x1106 ) & 0xFFFF ) ) , 0 ) ; 
                if ( dev == ( 0xffffffffU ) ) 
                        return ; 

                devctl = pci_locate_device ( 
                                                                         ( ( ( ( 0x287e ) & 0xFFFF ) << 16 ) | ( ( 0x1106 ) & 0xFFFF ) ) , 0 ) ; 
                if ( devctl == ( 0xffffffffU ) ) 
                        return ; 


                { 
                        u8 tmp ; 
                        tmp = pci_read_config8 ( devctl , 0xec ) ; 
                        print_debug ( "EC is " ) ; 
                        print_debug_hex8 ( tmp ) ; 
                        print_debug ( " E5 is " ) ; 
                        tmp = pci_read_config8 ( dev , 0xe5 ) ; 
                        print_debug_hex8 ( tmp ) ; 
                } 


                pci_write_config16 ( dev , 0x88 , 0x500 | 0x1 ) ; 


                pci_write_config8 ( dev , 0x81 , 0x84 ) ; 







                outb ( 0xff , 0x500 + 0x50 ) ; 










                pci_write_config8 ( dev , 0xe5 , 0x69 ) ; 





                pci_write_config8 ( dev , 0xe4 , 0xa5 ) ; 


                pci_write_config8 ( dev , 0xec , 0x4 ) ; 


                pci_write_config8 ( dev , 0x8c , 0x5 ) ; 


                pci_write_config8 ( devctl , 0x7c , 0x77 ) ; 

                devctl = pci_locate_device ( 
                                                        ( ( ( ( 0x2336 ) & 0xFFFF ) << 16 ) | ( ( 0x1106 ) & 0xFFFF ) ) , 0 ) ; 
                if ( devctl == ( 0xffffffffU ) ) 
                        return ; 





                pci_write_config8 ( devctl , 0xa6 , 0x83 ) ; 


        } 


        pci_write_config16 ( dev , 0x88 , 0x500 | 0x1 ) ; 


        pci_write_config8 ( dev , 0x81 , 0x84 ) ; 





        outb ( 0x1 , 0x500 + 0x11 ) ; 
} 

void enable_rom_decode ( void ) 
{ 
        device_t dev ; 


        dev = pci_locate_device ( 
                                                                    ( ( ( ( 0x3227 ) & 0xFFFF ) << 16 ) | ( ( 0x1106 ) & 0xFFFF ) ) , 0 ) ; 
        if ( dev == ( 0xffffffffU ) ) { 

                dev = pci_locate_device ( 
                                                                     ( ( ( ( 0x3372 ) & 0xFFFF ) << 16 ) | ( ( 0x1106 ) & 0xFFFF ) ) , 0 ) ; 
                if ( dev == ( 0xffffffffU ) ) 
                        return ; 
        } 


        pci_write_config8 ( dev , 0x41 , 0x7f ) ; 
} 

void vt8237_early_spi_init ( void ) 
{ 
        device_t dev ; 
        volatile u16 * spireg ; 
        u32 tmp ; 


        dev = pci_locate_device ( 
                                                                    ( ( ( ( 0x3372 ) & 0xFFFF ) << 16 ) | ( ( 0x1106 ) & 0xFFFF ) ) , 0 ) ; 

        if ( dev == ( 0xffffffffU ) ) 
                die ( "SB not found\r\n" ) ; 


        tmp = pci_read_config32 ( dev , 0xbc ) ; 
        pci_write_config32 ( dev , 0xbc , 
                           ( 0xfed02000UL >> 8 ) | ( tmp & 0xFF000000 ) ) ; 






} 



























int vt8237_early_network_init ( struct vt8237_network_rom * rom ) 
{ 
        struct vt8237_network_rom n ; 
        int i , loops ; 
        device_t dev ; 
        u32 tmp ; 
        u8 status ; 
        u16 * rom_write ; 
        unsigned int checksum ; 


        dev = pci_locate_device ( 
                                                               ( ( ( ( 0x3065 ) & 0xFFFF ) << 16 ) | ( ( 0x1106 ) & 0xFFFF ) ) , 0 ) ; 
        if ( dev == ( 0xffffffffU ) ) { 
                print_err ( "Network is disabled, please enable\n" ) ; 
                return 0 ; 
        } 

        tmp = pci_read_config32 ( dev , 0x5c ) ; 
        tmp |= 0x08000000 ; 
        pci_write_config32 ( dev , 0x5c , tmp ) ; 

        status = ( ( pci_read_config32 ( dev , 0x5c ) >> 24 ) & 0x3 ) ; 


        if ( status == 3 ) 
                return 0 ; 


        if ( rom == ( ( void * ) 0 ) ) { 
                print_err ( "No config data specified, using default MAC!\n" ) ; 
                n . mac_address [ 0 ] = 0x0 ; 
                n . mac_address [ 1 ] = 0x0 ; 
                n . mac_address [ 2 ] = 0xde ; 
                n . mac_address [ 3 ] = 0xad ; 
                n . mac_address [ 4 ] = 0xbe ; 
                n . mac_address [ 5 ] = 0xef ; 
                n . phy_addr = 0x1 ; 
                n . res1 = 0x0 ; 
                n . sub_sid = 0x102 ; 
                n . sub_vid = 0x1106 ; 
                n . pid = 0x3065 ; 
                n . vid = 0x1106 ; 
                n . pmcc = 0x1f ; 
                n . data_sel = 0x10 ; 
                n . pmu_data_reg = 0x0 ; 
                n . aux_curr = 0x0 ; 
                n . reserved = 0x0 ; 
                n . min_gnt = 0x3 ; 
                n . max_lat = 0x8 ; 
                n . bcr0 = 0x9 ; 
                n . bcr1 = 0xe ; 
                n . cfg_a = 0x3 ; 
                n . cfg_b = 0x0 ; 
                n . cfg_c = 0x40 ; 
                n . cfg_d = 0x82 ; 
                n . checksum = 0x0 ; 
                rom = & n ; 
        } 


        rom_write = ( u16 * ) rom ; 
        checksum = 0 ; 

        tmp &= 0xff000000 ; 
        for ( i = 0 ; i < 15 ; i ++ ) { 
                pci_write_config32 ( dev , 0x58 , tmp | ( i << 16 ) | rom_write [ i ] ) ; 

                checksum += rom_write [ i ] & 0xff ; 

                checksum += ( rom_write [ i ] >> 8 ) & 0xff ; 

        } 

        checksum += ( rom_write [ 15 ] & 0xff ) ; 
        checksum = ~ ( checksum & 0xff ) ; 
        tmp |= ( ( ( checksum & 0xff ) << 8 ) | rom_write [ 15 ] ) ; 


        pci_write_config32 ( dev , 0x58 , ( 15 << 16 ) | tmp ) ; 

        tmp = pci_read_config32 ( dev , 0x5c ) ; 
        pci_write_config32 ( dev , 0x5c , tmp | 0x01000000 ) ; 


        while ( ( ( ( pci_read_config32 ( dev , 0x5c ) >> 25 ) & 1 ) == 0 ) 
               && ( loops < 0x7FFFFFFF ) ) { 
                ++ loops ; 
        } 

        if ( loops >= 0x7FFFFFFF ) { 
                print_err ( "Timeout - LAN controller didn't accept config\n" ) ; 
                return 0 ; 
        } 


        return 1 ; 
} 
#line 11 "vt8235_early_serial.c"
static void vt8235_writepnpaddr ( uint8_t val ) 
{ 
        outb ( val , 0x2e ) ; 
        outb ( val , 0xeb ) ; 
} 

static void vt8235_writepnpdata ( uint8_t val ) 
{ 
        outb ( val , 0x2f ) ; 
        outb ( val , 0xeb ) ; 
} 


static void vt8235_writesiobyte ( uint16_t reg , uint8_t val ) 
{ 
        outb ( val , reg ) ; 
} 

static void vt8235_writesioword ( uint16_t reg , uint16_t val ) 
{ 
        outw ( val , reg ) ; 
} 






static void enable_vt8235_serial ( void ) 
{ 
        unsigned long x ; 
        uint8_t c ; 
        device_t dev ; 

        vt8235_writepnpaddr ( 0x87 ) ; 
        vt8235_writepnpaddr ( 0x87 ) ; 


        vt8235_writepnpaddr ( 0x7 ) ; 
        vt8235_writepnpdata ( 0x2 ) ; 

        vt8235_writepnpaddr ( 0x30 ) ; 
        vt8235_writepnpdata ( 0x1 ) ; 

        vt8235_writepnpaddr ( 0x60 ) ; 
        vt8235_writepnpdata ( 0xfe ) ; 

        vt8235_writepnpaddr ( 0x70 ) ; 
        vt8235_writepnpdata ( 0x4 ) ; 

        vt8235_writepnpaddr ( 0xf0 ) ; 
        vt8235_writepnpdata ( 0x2 ) ; 

        vt8235_writepnpaddr ( 0xaa ) ; 


        vt8235_writesiobyte ( 0x3fb , 0x80 ) ; 

        vt8235_writesioword ( 0x3f8 , 1 ) ; 



        vt8235_writesiobyte ( 0x3fb , 3 ) ; 

        vt8235_writesiobyte ( 0x3fc , 3 ) ; 

        vt8235_writesiobyte ( 0x3f9 , 0xf ) ; 

        vt8235_writesiobyte ( 0x3f8 , 48 ) ; 
} 
#line 43 "auto.c"
static void memreset_setup ( void ) 
{ 
} 

static inline int spd_read_byte ( unsigned device , unsigned address ) 
{ 
        return smbus_read_byte ( device , address ) ; 
} 
#line 44 "raminit.c"
static void do_ram_command ( device_t dev , u8 command ) 
{ 
        u8 reg ; 



        reg = pci_read_config8 ( dev , 0x6b ) ; 
        reg &= 0xf8 ; 
        reg |= command ; 
        pci_write_config8 ( dev , 0x6b , reg ) ; 

                                                     ; 
                                 ; 
                                 ; 
                                              ; 
                               ; 
} 













static void c7_cpu_setup ( device_t dev ) 
{ 


        pci_write_config8 ( dev , 0x50 , 0x88 ) ; 

        pci_write_config8 ( dev , 0x51 , 0x7a ) ; 
        pci_write_config8 ( dev , 0x52 , 0x6f ) ; 

        pci_write_config8 ( dev , 0x53 , 0x88 ) ; 

        pci_write_config8 ( dev , 0x54 , 0x1e ) ; 
        pci_write_config8 ( dev , 0x55 , 0x16 ) ; 

        pci_write_config8 ( dev , 0x56 , 0x01 ) ; 









        pci_write_config8 ( dev , 0x59 , 0x44 ) ; 

        pci_write_config8 ( dev , 0x5d , 0xb2 ) ; 

        pci_write_config8 ( dev , 0x5e , 0x88 ) ; 

        pci_write_config8 ( dev , 0x5f , 0xc7 ) ; 


        pci_write_config8 ( dev , 0x60 , 0xff ) ; 
        pci_write_config8 ( dev , 0x61 , 0xff ) ; 
        pci_write_config8 ( dev , 0x62 , 0x0f ) ; 

        pci_write_config8 ( dev , 0x63 , 0xff ) ; 
        pci_write_config8 ( dev , 0x64 , 0xff ) ; 
        pci_write_config8 ( dev , 0x65 , 0x0f ) ; 

        pci_write_config8 ( dev , 0x66 , 0xff ) ; 
        pci_write_config8 ( dev , 0x67 , 0x30 ) ; 



        pci_write_config8 ( dev , 0x70 , 0x11 ) ; 
        pci_write_config8 ( dev , 0x71 , 0x11 ) ; 
        pci_write_config8 ( dev , 0x72 , 0x11 ) ; 
        pci_write_config8 ( dev , 0x73 , 0x11 ) ; 

        pci_write_config8 ( dev , 0x74 , 0x35 ) ; 

        pci_write_config8 ( dev , 0x75 , 0x28 ) ; 

        pci_write_config8 ( dev , 0x76 , 0x74 ) ; 

        pci_write_config8 ( dev , 0x77 , 0x00 ) ; 

        pci_write_config8 ( dev , 0x78 , 0x0a ) ; 

        pci_write_config8 ( dev , 0x79 , 0xaa ) ; 

        pci_write_config8 ( dev , 0x7a , 0x24 ) ; 

        pci_write_config8 ( dev , 0x7b , 0xaa ) ; 

        pci_write_config8 ( dev , 0x7c , 0x00 ) ; 

        pci_write_config8 ( dev , 0x7d , 0x6d ) ; 
        pci_write_config8 ( dev , 0x7e , 0x00 ) ; 
        pci_write_config8 ( dev , 0x7f , 0x00 ) ; 
        pci_write_config8 ( dev , 0x80 , 0x1b ) ; 
        pci_write_config8 ( dev , 0x81 , 0x0a ) ; 
        pci_write_config8 ( dev , 0x82 , 0x0a ) ; 
        pci_write_config8 ( dev , 0x83 , 0x0a ) ; 
} 







static void sdram_set_size ( const struct mem_controller * ctrl ) 
{ 
        u8 density , ranks , result , col ; 

        ranks = spd_read_byte ( ctrl -> channel0 [ 0 ] , 5 ) ; 
        ranks = ( ranks & 0x07 ) + 1 ; 
        density = spd_read_byte ( ctrl -> channel0 [ 0 ] , 
                                                               31 ) ; 
        switch ( density ) { 
        case 0x80 : 
                result = 0x08 ; 
                break ; 
        case 0x40 : 
                result = 0x04 ; 
                break ; 
        case 0x20 : 
                result = 0x02 ; 
                break ; 
        case 0x10 : 
                result = 0xff ; 
                break ; 
        case 0x08 : 
                result = 0xff ; 
                break ; 
        case 0x04 : 
                result = 0xff ; 
                break ; 
        case 0x02 : 
                result = 0x20 ; 
                break ; 
        case 0x01 : 
                result = 0x10 ; 
                break ; 
        } 

        if ( result == 0xff ) 
                die ( "DRAM module size too big, not supported by CN700\r\n" ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0x40 , result ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x48 , 0x00 ) ; 
        if ( ranks == 2 ) { 
                pci_write_config8 ( ctrl -> d0f3 , 0x41 , result * ranks ) ; 
                pci_write_config8 ( ctrl -> d0f3 , 0x49 , result ) ; 
        } 

        pci_write_config8 ( ctrl -> d0f7 , 0xe5 , ( result * ranks ) << 2 ) ; 
        pci_write_config8 ( ctrl -> d0f7 , 0x57 , ( result * ranks ) << 2 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0x84 , 0x00 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x85 , ( result * ranks ) << 2 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x88 , ( result * ranks ) << 2 ) ; 


        if ( ranks == 2 ) 
                pci_write_config8 ( ctrl -> d0f3 , 0x54 , 
                                  1 << 7 | 0 << 4 | 1 << 3 | 1 << 0 ) ; 
        if ( ranks == 1 ) 
                pci_write_config8 ( ctrl -> d0f3 , 0x54 , 1 << 7 | 0 << 4 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x55 , 0x00 ) ; 

        pci_write_config32 ( ctrl -> d0f3 , 0x58 , 0x00 ) ; 


        result = spd_read_byte ( ctrl -> channel0 [ 0 ] , 17 ) ; 
        if ( result == 8 ) { 
                col = spd_read_byte ( ctrl -> channel0 [ 0 ] , 4 ) ; 
                switch ( col ) { 
                case 10 : 
                        pci_write_config8 ( ctrl -> d0f3 , 0x50 , 0xa0 ) ; 
                        break ; 
                case 11 : 
                        pci_write_config8 ( ctrl -> d0f3 , 0x50 , 0xc0 ) ; 
                        break ; 
                case 12 : 
                        pci_write_config8 ( ctrl -> d0f3 , 0x50 , 0xe0 ) ; 
                        break ; 
                } 
        } else if ( result == 4 ) { 
                col = spd_read_byte ( ctrl -> channel0 [ 0 ] , 4 ) ; 
                switch ( col ) { 
                case 9 : 
                        pci_write_config8 ( ctrl -> d0f3 , 0x50 , 0x00 ) ; 
                        break ; 
                case 10 : 
                        pci_write_config8 ( ctrl -> d0f3 , 0x50 , 0x20 ) ; 
                        break ; 
                case 11 : 
                        pci_write_config8 ( ctrl -> d0f3 , 0x50 , 0x40 ) ; 
                        break ; 
                case 12 : 
                        pci_write_config8 ( ctrl -> d0f3 , 0x50 , 0x60 ) ; 
                        break ; 
                } 
        } 
        pci_write_config8 ( ctrl -> d0f3 , 0x51 , 0x00 ) ; 
} 






static void sdram_set_registers ( const struct mem_controller * ctrl ) 
{ 
        u8 reg ; 


        pci_write_config8 ( ctrl -> d0f3 , 0x61 , 0xe0 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0x62 , 0xfa ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0x63 , 0xca ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0x64 , 0xcc ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0x67 , 0x00 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0x69 , 0x00 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0x6a , 0x00 ) ; 


        pci_write_config8 ( ctrl -> d0f3 , 0x90 , 0x00 ) ; 
        pci_write_config8 ( ctrl -> d0f2 , 0x57 , 0x18 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0x6b , 0x10 ) ; 


        pci_write_config8 ( ctrl -> d0f3 , 0x52 , 0x33 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x53 , 0x3f ) ; 


        pci_write_config8 ( ctrl -> d0f3 , 0x6c , 0xc8 ) ; 


        pci_write_config8 ( ctrl -> d0f3 , 0x60 , 0x03 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0x66 , 0x80 ) ; 






        pci_write_config8 ( ctrl -> d0f3 , 0x70 , 0x00 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0x71 , 0x01 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x73 , 0x01 ) ; 


        pci_write_config8 ( ctrl -> d0f3 , 0x65 , 0xd9 ) ; 


        pci_write_config8 ( ctrl -> d0f3 , 0x74 , 0x01 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x75 , 0x01 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x76 , 0x06 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x77 , 0x92 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x78 , 0x83 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x79 , 0x83 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x7a , 0x00 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x7b , 0x10 ) ; 


        pci_write_config8 ( ctrl -> d0f3 , 0x91 , 0x01 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0x92 , 0x02 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0x93 , 0x02 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0x94 , 0x00 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x9d , 0x0f ) ; 


        pci_write_config8 ( ctrl -> d0f3 , 0xda , 0x80 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0xdc , 0x54 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0xdd , 0x55 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0xd8 , 0x01 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0xd9 , 0x0a ) ; 


        pci_write_config8 ( ctrl -> d0f3 , 0x6d , 0xc0 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x6f , 0x41 ) ; 


        pci_write_config8 ( ctrl -> d0f3 , 0xd0 , 0xaa ) ; 


        pci_write_config8 ( ctrl -> d0f3 , 0xd3 , 0x01 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0xd4 , 0x80 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0xd5 , 0x8a ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0xd6 , 0xaa ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0xe0 , 0xee ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0xe2 , 0xac ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0xe4 , 0x66 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0xe6 , 0x33 ) ; 
        pci_write_config8 ( ctrl -> d0f3 , 0xe8 , 0x86 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0xec , 0x00 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0xee , 0x00 ) ; 

        pci_write_config8 ( ctrl -> d0f3 , 0xef , 0x10 ) ; 


        pci_write_config8 ( ctrl -> d0f3 , 0xed , 0x10 ) ; 


        reg = 0x29 ; 
        pci_write_config8 ( ctrl -> d0f3 , 0x86 , reg ) ; 

        pci_write_config8 ( ctrl -> d0f7 , 0xe6 , reg ) ; 


        pci_write_config8 ( ctrl -> d0f3 , 0x6e , 0x89 ) ; 
} 

static void sdram_set_post ( const struct mem_controller * ctrl ) 
{ 
        device_t dev = ctrl -> d0f3 ; 


        pci_write_config8 ( dev , 0x69 , 0x03 ) ; 


        pci_write_config8 ( dev , 0x6a , 0x32 ) ; 


        pci_write_config16 ( dev , 0xa0 , ( 1 << 15 ) ) ; 
        pci_write_config16 ( dev , 0xa4 , 0x0010 ) ; 
} 

static void sdram_enable ( device_t dev , unsigned long rank_address ) 
{ 
        u8 i ; 


                                                      ; 
        do_ram_command ( dev , 0x1 ) ; 
        udelay ( 100 ) ; 
        read32 ( rank_address + 0x10 ) ; 


        udelay ( 400 ) ; 
                                                          ; 
        do_ram_command ( dev , 0x2 ) ; 
        read32 ( rank_address + 0x10 ) ; 


                                                              ; 
        do_ram_command ( dev , 0x3 ) ; 
        read32 ( rank_address + 0x120000 ) ; 
        read32 ( rank_address + 0x800 ) ; 


                                                          ; 
        do_ram_command ( dev , 0x2 ) ; 
        read32 ( rank_address + 0x0 ) ; 


                                                ; 
        do_ram_command ( dev , 0x4 ) ; 
        for ( i = 0 ; i < 8 ; i ++ ) { 
                read32 ( rank_address + 0x20 ) ; 
                udelay ( 100 ) ; 
        } 


                                                              ; 






        do_ram_command ( dev , 0x3 ) ; 
        read32 ( rank_address + 0x002258 ) ; 
        read32 ( rank_address + 0x121c20 ) ; 
        read32 ( rank_address + 0x120020 ) ; 


                                                             ; 
        do_ram_command ( dev , 0x0 ) ; 
        read32 ( rank_address + 0x30 ) ; 
} 




static void ddr_ram_setup ( const struct mem_controller * ctrl ) 
{ 
        u8 reg ; 

        c7_cpu_setup ( ctrl -> d0f2 ) ; 
        sdram_set_registers ( ctrl ) ; 
        sdram_set_size ( ctrl ) ; 
        sdram_enable ( ctrl -> d0f3 , 0 ) ; 
        reg = pci_read_config8 ( ctrl -> d0f3 , 0x41 ) ; 
        if ( reg != 0 ) 
                sdram_enable ( ctrl -> d0f3 , 
                             pci_read_config8 ( ctrl -> d0f3 , 0x40 ) << 26 ) ; 
        sdram_set_post ( ctrl ) ; 
} 
#line 54 "auto.c"
static void enable_mainboard_devices ( void ) 
{ 
        device_t dev ; 
        u8 reg ; 

        dev = pci_locate_device ( ( ( ( ( 0x3227 ) & 0xFFFF ) << 16 ) | ( ( 0x1106 ) & 0xFFFF ) ) , 0 ) ; 
        if ( dev == ( 0xffffffffU ) ) 
                die ( "Southbridge not found!!!\n" ) ; 








        pci_write_config8 ( dev , 0x50 , 0x80 ) ; 







        pci_write_config8 ( dev , 0x51 , 0x1d ) ; 
} 

static const struct mem_controller ctrl = { 
        . d0f0 = 0x0000 , 
        . d0f2 = 0x2000 , 
        . d0f3 = 0x3000 , 
        . d0f4 = 0x4000 , 
        . d0f7 = 0x7000 , 
        . d1f0 = 0x8000 , 
        . channel0 = { 0x50 } , 
} ; 

static void main ( unsigned long bist ) 
{ 
        unsigned long x ; 
        device_t dev ; 


        pci_write_config8 ( ctrl . d0f0 , 0x4f , 0x01 ) ; 

        enable_vt8235_serial ( ) ; 
        uart_init ( ) ; 
        console_init ( ) ; 

        print_spew ( "In auto.c:main()\r\n" ) ; 

        enable_smbus ( ) ; 
        smbus_fixup ( & ctrl ) ; 

        if ( bist == 0 ) { 
                print_debug ( "doing early_mtrr\r\n" ) ; 
                early_mtrr_init ( ) ; 
        } 


        report_bist_failure ( bist ) ; 

        print_debug ( "Enabling mainboard devices\r\n" ) ; 
        enable_mainboard_devices ( ) ; 

        ddr_ram_setup ( & ctrl ) ; 



        print_spew ( "Leaving auto.c:main()\r\n" ) ; 
} 