<p>It bases on inteltool trunk r3692.</p><p>This patch include GM965 and ICH8(except mpbase, it makes my Laptop halt) regs dump.</p><p>It also support GM965 IGP temperature report. The support for GM945 mem. temperature report</p>
<p>need test!</p><p></p><p>Hope you like it.</p><p></p><p>Signed-off-by: Lu Zhihe <<a href="mailto:tombowfly@gmail.com">tombowfly@gmail.com</a>></p><p></p><p>diff --new-file -u -r inteltool.orig/Makefile inteltool/Makefile<br>
--- inteltool.orig/Makefile 2008-08-20 13:41:24.000000000 +0000<br>+++ inteltool/Makefile 2008-10-27 20:18:33.000000000 +0000<br>@@ -27,7 +27,7 @@<br> CFLAGS = -O2 -g -Wall -W<br> LDFLAGS = -lpci -lz <br> <br>-OBJS = inteltool.o cpu.o gpio.o rootcmplx.o powermgt.o memory.o pcie.o<br>
+OBJS = inteltool.o cpu.o gpio.o rootcmplx.o powermgt.o memory.o pcie.o temp.o<br> <br> all: pciutils dep $(PROGRAM)<br> <br>diff --new-file -u -r inteltool.orig/gpio.c inteltool/gpio.c<br>--- inteltool.orig/gpio.c 2008-08-20 13:41:24.000000000 +0000<br>
+++ inteltool/gpio.c 2008-10-26 19:07:49.000000000 +0000<br>@@ -78,6 +78,26 @@<br> { 0x3C, 4, "RESERVED" }<br> };<br> <br>+static const io_register_t ich8_gpio_registers[] = {<br>+ { 0x00, 4, "GPIO_USE_SEL" },<br>
+ { 0x04, 4, "GP_IO_SEL" },<br>+ { 0x08, 4, "RESERVED" },<br>+ { 0x0c, 4, "GP_LVL" },<br>+ { 0x10, 4, "GPIO_USE_SEL_Override_LOW" },<br>+ { 0x14, 4, "RESERVED" },<br>
+ { 0x18, 4, "GPO_BLINK" },<br>+ { 0x1c, 4, "GP_SER_BLINK" },<br>+ { 0x20, 4, "GP_SB_CMDSTS" },<br>+ { 0x24, 4, "GP_SB_DATA" },<br>+ { 0x28, 4, "RESERVED" },<br>
+ { 0x2c, 4, "GPI_INV" },<br>+ { 0x30, 4, "GPIO_USE_SEL2" },<br>+ { 0x34, 4, "GP_IO_SEL2" },<br>+ { 0x38, 4, "GP_LVL2" },<br>+ { 0x3C, 4, "GPIO_USE_SEL_Override_HIGH" }<br>
+};<br>+<br>+<br> int print_gpios(struct pci_dev *sb)<br> {<br> int i, size;<br>@@ -87,6 +107,11 @@<br> printf("\n============= GPIOS =============\n\n");<br> <br> switch (sb->device_id) {<br>+ case PCI_DEVICE_ID_INTEL_ICH8:<br>
+ gpiobase = pci_read_word(sb, 0x48) & 0xfffc;<br>+ gpio_registers = ich8_gpio_registers;<br>+ size = ARRAY_SIZE(ich8_gpio_registers);<br>+ break;<br> case PCI_DEVICE_ID_INTEL_ICH7:<br> case PCI_DEVICE_ID_INTEL_ICH7M:<br>
case PCI_DEVICE_ID_INTEL_ICH7DH:<br>diff --new-file -u -r inteltool.orig/inteltool.c inteltool/inteltool.c<br>--- inteltool.orig/inteltool.c 2008-08-20 13:41:24.000000000 +0000<br>+++ inteltool/inteltool.c 2008-10-27 20:11:33.000000000 +0000<br>
@@ -32,6 +32,8 @@<br> } supported_chips_list[] = {<br> { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845, "i845" },<br> { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GM, "i945GM" },<br>+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82965GM, "i965GM" },<br>
+ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8, "ICH8" },<br> { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7MDH, "ICH7-M DH" },<br> { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7M, "ICH7-M" },<br>
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7, "ICH7" },<br>@@ -92,12 +94,14 @@<br> int dump_gpios = 0, dump_mchbar = 0, dump_rcba = 0;<br> int dump_pmbase = 0, dump_epbar = 0, dump_dmibar = 0;<br> int dump_pciexbar = 0, dump_coremsrs = 0;<br>
+ int detect_temp = 0; <br> <br> static struct option long_options[] = {<br> {"version", 0, 0, 'v'},<br> {"help", 0, 0, 'h'},<br> {"gpios", 0, 0, 'g'},<br> {"mchbar", 0, 0, 'm'},<br>
+ {"temp", 0, 0, 't'},<br> {"rcba", 0, 0, 'r'},<br> {"pmbase", 0, 0, 'p'},<br> {"epbar", 0, 0, 'e'},<br>@@ -108,7 +112,7 @@<br> {0, 0, 0, 0}<br>
};<br> <br>- while ((opt = getopt_long(argc, argv, "vh?grpmedPMa",<br>+ while ((opt = getopt_long(argc, argv, "vh?grpmtedPMa",<br> long_options, &option_index)) != EOF) {<br>
switch (opt) {<br> case 'v':<br>@@ -121,6 +125,9 @@<br> case 'm':<br> dump_mchbar = 1;<br> break;<br>+ case 't':<br>+ detect_temp = 1;<br>+ break;<br> case 'r':<br> dump_rcba = 1;<br>
break;<br>@@ -142,6 +149,7 @@<br> case 'a':<br> dump_gpios = 1;<br> dump_mchbar = 1;<br>+ detect_temp = 1;<br> dump_rcba = 1;<br> dump_pmbase = 1;<br> dump_epbar = 1;<br>@@ -174,7 +182,7 @@<br>
<br> /* Find the required devices */<br> <br>- sb = pci_get_dev(pacc, 0, 0, 0x1f, 0);<br>+ sb = pci_get_dev(pacc, 0, 0, 0x1f, 0); /*Device 30, Func 0*/<br> if (!sb) {<br> printf("No southbridge found.\n");<br>
exit(1);<br>@@ -187,7 +195,7 @@<br> exit(1);<br> }<br> <br>- nb = pci_get_dev(pacc, 0, 0, 0x00, 0);<br>+ nb = pci_get_dev(pacc, 0, 0, 0x00, 0); /*Device 0, Func 0*/<br> if (!nb) {<br> printf("No northbridge found.\n");<br>
exit(1);<br>@@ -239,6 +247,11 @@<br> print_mchbar(nb);<br> printf("\n\n");<br> }<br>+ <br>+ if (detect_temp) {<br>+ print_temp(nb);<br>+ printf("\n\n");<br>+ }<br> <br> if (dump_epbar) {<br>
print_epbar(nb);<br>diff --new-file -u -r inteltool.orig/inteltool.h inteltool/inteltool.h<br>--- inteltool.orig/inteltool.h 2008-08-20 13:41:24.000000000 +0000<br>+++ inteltool/inteltool.h 2008-10-27 20:44:00.000000000 +0000<br>
@@ -33,9 +33,45 @@<br> #define PCI_DEVICE_ID_INTEL_ICH7 0x27b8<br> #define PCI_DEVICE_ID_INTEL_ICH7M 0x27b9<br> #define PCI_DEVICE_ID_INTEL_ICH7MDH 0x27bd<br>+#define PCI_DEVICE_ID_INTEL_ICH8 0x2815<br> <br> #define PCI_DEVICE_ID_INTEL_82845 0x1a30<br>
#define PCI_DEVICE_ID_INTEL_82945GM 0x27a0<br>+#define PCI_DEVICE_ID_INTEL_82965GM 0x2a00<br>+<br>+<br>+/*GM965 Regs*/<br>+#define GM965_TSC1 (0x1001) //16bits<br>+#define GM965_TSS1 (0x1004) //16bits<br>+#define GM965_TR1 (0x1006) //8bits<br>
+<br>+#define GM965_TSE 0x8000<br>+#define GM965_TMOV (0x01 << 10)<br>+<br>+/*GM965 doc say TSC2 control memory thermal sensor */<br>+#define GM965_TSC2 (0x1041) //16bits<br>+#define GM965_TSS2 (0x1044) //16bits<br>
+#define GM965_TR2 (0x1046) //8bits<br>+<br>+<br>+/*GM945 Regs*/<br>+/*GM945 doc say TSC1 just control memory thermal sensor<br>+ * no as GM965 control IGP's<br>+ * */<br>+#define GM945_TSC1 (0xC88) //8bits<br>
+<br>+#define GM945_TSS1 (0xC8A) //8bits<br>+#define GM945_TR1 (0xC8B) //8bits<br>+<br>+#define GM945_TSE 0x80<br>+#define GM945_TMOV 0x10<br>+<br>+/*GM945 doc say TSC0-1 control memory thermal sensor*/<br>
+#define GM945_TSC0_1 (0xCD8) //8bits<br>+#define GM945_TSS0 (0xCDA) //8bits<br>+#define GM945_TR0 (0xCDB) //8bits<br>+<br>+<br> <br> #define ARRAY_SIZE(a) ((int)(sizeof(a) / sizeof((a)[0])))<br>
<br>@@ -53,4 +89,5 @@<br> int print_epbar(struct pci_dev *nb);<br> int print_dmibar(struct pci_dev *nb);<br> int print_pciexbar(struct pci_dev *nb);<br>+int print_temp(struct pci_dev *nb);<br> <br>diff --new-file -u -r inteltool.orig/memory.c inteltool/memory.c<br>
--- inteltool.orig/memory.c 2008-08-20 13:41:24.000000000 +0000<br>+++ inteltool/memory.c 2008-10-25 20:04:02.000000000 +0000<br>@@ -36,6 +36,9 @@<br> printf("\n============= MCHBAR ============\n\n");<br> <br>
switch (nb->device_id) {<br>+ case PCI_DEVICE_ID_INTEL_82965GM:<br>+ mchbar_phys = pci_read_long(nb, 0x48) & 0xfffffffe;<br>+ break;<br> case PCI_DEVICE_ID_INTEL_82945GM:<br> mchbar_phys = pci_read_long(nb, 0x44) & 0xfffffffe;<br>
break;<br>diff --new-file -u -r inteltool.orig/pcie.c inteltool/pcie.c<br>--- inteltool.orig/pcie.c 2008-08-20 13:41:24.000000000 +0000<br>+++ inteltool/pcie.c 2008-10-25 20:11:06.000000000 +0000<br>@@ -35,6 +35,7 @@<br>
printf("\n============= EPBAR =============\n\n");<br> <br> switch (nb->device_id) {<br>+ case PCI_DEVICE_ID_INTEL_82965GM:<br> case PCI_DEVICE_ID_INTEL_82945GM:<br> epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe;<br>
break;<br>@@ -76,6 +77,9 @@<br> printf("\n============= DMIBAR ============\n\n");<br> <br> switch (nb->device_id) {<br>+ case PCI_DEVICE_ID_INTEL_82965GM:<br>+ dmibar_phys = pci_read_long(nb, 0x68) & 0xfffffffe;<br>
+ break;<br> case PCI_DEVICE_ID_INTEL_82945GM:<br> dmibar_phys = pci_read_long(nb, 0x4c) & 0xfffffffe;<br> break;<br>@@ -119,6 +123,9 @@<br> printf("========= PCIEXBAR ========\n\n");<br> <br> switch (nb->device_id) {<br>
+ case PCI_DEVICE_ID_INTEL_82965GM:<br>+ pciexbar_reg = pci_read_long(nb, 0x60);<br>+ break;<br> case PCI_DEVICE_ID_INTEL_82945GM:<br> pciexbar_reg = pci_read_long(nb, 0x48);<br> break;<br>diff --new-file -u -r inteltool.orig/powermgt.c inteltool/powermgt.c<br>
--- inteltool.orig/powermgt.c 2008-08-20 13:41:24.000000000 +0000<br>+++ inteltool/powermgt.c 2008-10-26 19:24:28.000000000 +0000<br>@@ -31,6 +31,7 @@<br> printf("\n============= PMBASE ============\n\n");<br> <br>
switch (sb->device_id) {<br>+ /*case PCI_DEVICE_ID_INTEL_ICH8: //F31G will hang when dump pmbase Lu Zhihe*/<br> case PCI_DEVICE_ID_INTEL_ICH7:<br> case PCI_DEVICE_ID_INTEL_ICH7M:<br> case PCI_DEVICE_ID_INTEL_ICH7DH:<br>
diff --new-file -u -r inteltool.orig/rootcmplx.c inteltool/rootcmplx.c<br>--- inteltool.orig/rootcmplx.c 2008-08-20 13:41:24.000000000 +0000<br>+++ inteltool/rootcmplx.c 2008-10-26 19:13:23.000000000 +0000<br>@@ -41,6 +41,7 @@<br>
printf("\n============= RCBA ==============\n\n");<br> <br> switch (sb->device_id) {<br>+ case PCI_DEVICE_ID_INTEL_ICH8:<br> case PCI_DEVICE_ID_INTEL_ICH7:<br> case PCI_DEVICE_ID_INTEL_ICH7M:<br> case PCI_DEVICE_ID_INTEL_ICH7DH:<br>
diff --new-file -u -r inteltool.orig/temp.c inteltool/temp.c<br>--- inteltool.orig/temp.c 1970-01-01 00:00:00.000000000 +0000<br>+++ inteltool/temp.c 2008-10-27 20:43:07.000000000 +0000<br>@@ -0,0 +1,154 @@<br>+/*<br>+ * Written by Lu Zhihe <tombowfly at <a href="http://gmail.com">gmail.com</a> > <br>
+ *<br>+ * Now only support GM965 IGP temperature detect.<br>+ * The support for GM945 mem. temperature detect need more test.<br>+ * <br>+ * This program is free software; you can redistribute it and/or modify<br>+ * it under the terms of the GNU General Public License as published by<br>
+ * the Free Software Foundation; version 2 of the License.<br>+ *<br>+ * This program is distributed in the hope that it will be useful,<br>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>
+ * GNU General Public License for more details.<br>+ *<br>+ * You should have received a copy of the GNU General Public License<br>+ * along with this program; if not, write to the Free Software<br>+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.<br>
+ */<br>+<br>+<br>+#include <stdio.h><br>+#include <stdlib.h><br>+#include <sys/mman.h><br>+#include <unistd.h><br>+<br>+#include "inteltool.h"<br>+<br>+int do_temp_detect(volatile uint8_t *mchbar, int reg_group)<br>
+{<br>+ uint16_t tsc1 = 0, tss1 = 0, tr1 = 0; <br>+ uint16_t tse = 0, tmov = 0;<br>+ uint16_t tsc1_val = 0;<br>+ uint8_t tr1_val = 0;<br>+ float temp = 0;<br>+<br>+ switch (reg_group)<br>+ {<br>+ case PCI_DEVICE_ID_INTEL_82965GM:<br>
+ {<br>+#if 1<br>+ tsc1 = GM965_TSC1;<br>+ tss1 = GM965_TSS1;<br>+ tr1 = GM965_TR1; <br>+#else <br>+ tsc1 = GM965_TSC2;<br>+ tss1 = GM965_TSS2;<br>+ tr1 = GM965_TR2; <br>+#endif<br>+ tse = GM965_TSE;<br>+ tmov = GM965_TMOV;<br>
+ }<br>+ break;<br>+ <br>+ /*FIXME*/<br>+ case PCI_DEVICE_ID_INTEL_82945GM:<br>+ {<br>+#if 1<br>+ tsc1 = GM945_TSC1;<br>+ tss1 = GM945_TSS1;<br>+ tr1 = GM945_TR1; <br>+#else <br>+ tsc1 = GM945_TSC0_1; <br>+ tss1 = GM945_TSS0;<br>
+ tr1 = GM945_TR0; <br>+#endif<br>+ tse = GM945_TSE;<br>+ tmov = GM945_TMOV;<br>+ }<br>+ break;<br>+<br>+ default:<br>+ break;<br>+ }<br>+<br>+ tsc1_val = *(uint16_t *)(mchbar+tsc1);<br>+<br>+ if(!(tsc1_val&tse))<br>
+ {<br>+ *(uint16_t *)(mchbar+tsc1) |= tse;<br>+ tsc1_val = *(uint16_t *)(mchbar+tsc1);<br>+ }<br>+<br>+ while(1)<br>+ {<br>+ if(tsc1_val&tse)<br>+ {<br>+ do{<br>+ tr1_val = *(uint8_t *)(mchbar + tr1);<br>+#ifdef EXPERIENT<br>
+ /*Default Regs vaule = 0xFF, GM865 doc say: under 40 degrees Centigrade, <br>+ * the temperature report may unavailable*/<br>+ if(tr1_val != 0xFF)<br>+ {<br>+ /*Magic Num by experiential data*/<br>+ printf("GPU Thermal = %d degrees Centigrade\n", (170 - tr1_val)); <br>
+ }<br>+ else<br>+ {<br>+ printf("Your GPU temperature is under 40 degrees Centigrade\n");<br>+ }<br>+#else<br>+ /*Base on Intel GM9965 doc, July 2006 rel. ver. Lu Zhihe*/<br>+ temp = 0.0016*tr1_val*tr1_val-1.10707*tr1_val + 161.05;<br>
+ printf("GPU Thermal = %.2f degC\n", temp); <br>+ <br>+#endif<br>+ sleep(1);<br>+ }while(*(uint16_t *)(mchbar + tss1)& tmov );<br>+ }<br>+ }<br>+ return 0;<br>+}<br>+<br>+<br>+int print_temp(struct pci_dev *nb)<br>
+{<br>+ int size = (16 * 1024);<br>+ volatile uint8_t *mchbar;<br>+ uint32_t mchbar_phys;<br>+ int reg_group;<br>+<br>+ switch (nb->device_id) {<br>+ case PCI_DEVICE_ID_INTEL_82965GM:<br>+ mchbar_phys = pci_read_long(nb, 0x48) & 0xfffffffe;<br>
+ reg_group = PCI_DEVICE_ID_INTEL_82965GM;<br>+ break;<br>+ case PCI_DEVICE_ID_INTEL_82945GM:<br>+ mchbar_phys = pci_read_long(nb, 0x44) & 0xfffffffe;<br>+ reg_group = PCI_DEVICE_ID_INTEL_82945GM;<br>+ break;<br>
+ case 0x1234: // Dummy for non-existent functionality<br>+ printf("This northbrigde does not have MCHBAR.\n");<br>+ return 1;<br>+ default:<br>+ printf("Error: Dumping MCHBAR on this northbridge is not (yet) supported.\n");<br>
+ return 1;<br>+ }<br>+<br>+ mchbar = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,<br>+ fd_mem, (off_t) mchbar_phys);<br>+ <br>+ if (mchbar == MAP_FAILED) {<br>+ perror("Error mapping MCHBAR");<br>
+ exit(1);<br>+ }<br>+<br>+ do_temp_detect(mchbar, reg_group);<br>+<br>+ munmap((void *)mchbar, size);<br>+ return 0;<br>+}<br>+<br>+<br></p><p>-- <br></p>Thx<br><br>Lu Zhihe<br>