Index: corebootv3-core2duo_car_readd_comments/arch/x86/intel/core2/stage0.S
===================================================================
--- corebootv3-core2duo_car_readd_comments/arch/x86/intel/core2/stage0.S	(Revision 1059)
+++ corebootv3-core2duo_car_readd_comments/arch/x86/intel/core2/stage0.S	(Arbeitskopie)
@@ -159,9 +159,13 @@
 	movl	$(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %eax
 	movl	%eax, %esp
 
-	/* Restore the BIST result */
+	/* Restore the BIST result. */
 	movl	%ebp, %eax
+
+	/* We need to set ebp? No need. */
 	movl	%esp, %ebp
+
+	/* First parameter: bist */
 	pushl	%eax
 
 #if 0
@@ -170,6 +174,7 @@
 #endif
 
 	call	stage1_phase1
+	/* We will not go back. */
 
 	port80_post(0x2f)
 error:
