<html><head><style type="text/css"><!-- DIV {margin:0px;} --></style></head><body><div style="font-family:times new roman,new york,times,serif;font-size:12pt"><font size="-1">CoreBoot Kernel Log:<br>[ 0.412025] PCI: Bridge: 0000:00:01.0<br>
[ 0.416027] IO window: 1000-1fff<br>
[ 0.420032] MEM window: 0xfc500000-0xfc6fffff<br>
[ 0.427975] PREFETCH window: 0x00000000f0000000- 0x00000000f7ffffff<br>
[ 0.440718] PCI: Bridge: 0000:00:04.0<br>
[ 0.448082] IO window: 2000-2fff<br>
[ 0.454929] MEM window: 0xfc700000-0xfc7fffff<br>
[ 0.464029] PREFETCH window: disabled.<br>
[ 0.471919] PCI: Bridge: 0000:00:07.0<br>
[ 0.479285] IO window: 3000-3fff<br>
[ 0.486133] MEM window: 0xfc000000-0xfc4fffff<br>
[ 0.495233] PREFETCH window: disabled.<br>
[ 0.503122] PCI: Bridge: 0000:00:14.4<br>
[ 0.510485] IO window: disabled.<br>
[ 0.517322] MEM window: disabled.<br>
[ 0.524338] PREFETCH window: disabled.<br><br>Closed BIOS:<br></font><font size="-1">[ 0.412025] PCI: Bridge: 0000:00:01.0<br>
[ 0.416027] IO window: c000-cfff<br>
[ 0.420032] MEM window: 0xfdd00000-0xfdefffff<br>
[ 0.427975] PREFETCH window: 0x00000000d0000000- 0x00000000dfffffff<br>
[ 0.440718] PCI: Bridge: 0000:00:04.0<br>
[ 0.448082] IO window: e000-efff<br>
[ 0.454929] MEM window: 0xfda00000-0xfdafffff<br>
[ 0.464029] PREFETCH window: 0x00000000fd900000 - 0x00000000fd9fffff<br>
[ 0.471919] PCI: Bridge: 0000:00:07.0<br>
[ 0.479285] IO window: d000-dfff<br>
[ 0.486133] MEM window: 0xfd000000-0xfd7fffff<br>
[ 0.495233] PREFETCH window: 0x00000000fdf00000-0x00000000fdffffff<br>
[ 0.503122] PCI: Bridge: 0000:00:14.4<br>
[ 0.510485] IO window: b000-bffff<br>
[ 0.517322] MEM window: 0xfdc00000-0xfdcfffff<br>
[ 0.524338] PREFETCH window: 0x00000000fdb00000-0x00000000fdbfffff<br><br>There are some pretty big differences. If we can explain them away great! if not, it would seem we have an allocation problem somewhere.<br><br>Thanks,<br>Dan Lykowski<br></font><div style="font-family: times new roman,new york,times,serif; font-size: 12pt;"><br><div style="font-family: arial,helvetica,sans-serif; font-size: 13px;"><font size="2" face="Tahoma"><hr size="1"><b><span style="font-weight: bold;">From:</span></b> Stefan Reinauer <stepan@coresystems.de><br><b><span style="font-weight: bold;">To:</span></b> Dan Lykowski <engineerguy3737@yahoo.com><br><b><span style="font-weight: bold;">Cc:</span></b> coreboot@coreboot.org<br><b><span style="font-weight: bold;">Sent:</span></b> Sunday, February 1, 2009 4:52:26 PM<br><b><span style="font-weight: bold;">Subject:</span></b> Re: [coreboot] Bridge Mem Window/Prefetch Window<br></font><br>
Dan Lykowski wrote:<br>> Can anyone point me in the right direction as to where the Bridge Mem<br>> Window/Prefetch Window PCI configurations are defined/setup/used/etc.<br>> Coreboot does not set these correctly in my case. ( As compared to the<br>> standard BIOS )<br>><br>What's the difference?<br><br>Stefan<br><br><br>-- <br>coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.<br> Tel.: +49 761 7668825 • Fax: +49 761 7664613<br>Email: <a ymailto="mailto:info@coresystems.de" href="mailto:info@coresystems.de">info@coresystems.de</a> • <a href="http://www.coresystems.de/" target="_blank">http://www.coresystems.de/</a><br>Registergericht: Amtsgericht Freiburg • HRB 7656<br>Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866<br><br></div></div></div><br>
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