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<p class=MsoNormal><font size=3 color=navy face="Times New Roman"><span
style='font-size:12.0pt;color:navy'>Dan,</span></font></p>
<p class=MsoNormal><font size=3 color=navy face="Times New Roman"><span
style='font-size:12.0pt;color:navy'> </span></font></p>
<p class=MsoNormal><font size=3 color=navy face="Times New Roman"><span
style='font-size:12.0pt;color:navy'>I read the RRG spec, just as you said, you
should use 0xF in file sb600_hda.c to get the current audio codec, that is to
say, </span></font></p>
<p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:
12.0pt'>dword &= 0xF;<br>
if (!dword) <br>
goto no_codec;</span></font></p>
<p class=MsoNormal><font size=3 color=navy face="Times New Roman"><span
style='font-size:12.0pt;color:navy'> </span></font></p>
<p class=MsoNormal><font size=3 color=navy face="Times New Roman"><span
style='font-size:12.0pt;color:navy'>pci_locate_device is really should be used
in early setup. Device_t is the type of u32 at that time. After this stage, you
should use dev_find_slot. In file sb600_sata.c, “/* sm_dev =
pci_locate_device(PCI_ID(0x1002, 0x4385), 0) */ “ gives you misunderstanding about
how to get the SMBus and it should be removed. You can submit a patch about
sata and I will ack it. Thanks.</span></font></p>
<div>
<p><font size=3 color=navy face="Times New Roman"><span style='font-size:12.0pt;
font-family:"Times New Roman";color:navy'>Best regards <br>
Maggie li</span></font></p>
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<p class=MsoNormal><b><font size=2 face=Tahoma><span style='font-size:10.0pt;
font-family:Tahoma;font-weight:bold'>From:</span></font></b><font size=2
face=Tahoma><span style='font-size:10.0pt;font-family:Tahoma'> Dan Lykowski
[mailto:engineerguy3737@yahoo.com] <br>
<b><span style='font-weight:bold'>Sent:</span></b> Sunday, February 01, 2009
6:51 PM<br>
<b><span style='font-weight:bold'>To:</span></b> Li, Maggie<br>
<b><span style='font-weight:bold'>Cc:</span></b> Marc Jones; Carl-Daniel
Hailfinger; coreboot@coreboot.org<br>
<b><span style='font-weight:bold'>Subject:</span></b> Re: [coreboot] SB600 HDA
can't find codec fix</span></font></p>
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<p class=MsoNormal><font size=3 face="Times New Roman"><span
style='font-size:12.0pt'>Maggie,<br>
Oops, I can't convert binary to hex.. <br>
7 should have been 15. and it should have been bits [3..0].<br>
Is this what you are referring to?<br>
<br>
I don't understand what you mean by pci_locate_device is only used during
early setup. I see it called in the SATA driver to find the SMBus. Is this
incorrect also? What would be the best way to get the SMBus? Is the device
being stored somewhere that I don't currently see?<br>
<br>
Thanks,<br>
Dan Lykowski <br>
<br>
<br>
--- On <b><span style='font-weight:bold'>Sun, 2/1/09, Li, Maggie <i><span
style='font-style:italic'><Maggie.Li@amd.com></span></i></span></b>
wrote:</span></font></p>
<p class=MsoNormal style='margin-bottom:12.0pt'><font size=3
face="Times New Roman"><span style='font-size:12.0pt'><br>
From: Li, Maggie <Maggie.Li@amd.com><br>
Subject: Re: [coreboot] SB600 HDA can't find codec fix<br>
To: "Dan Lykowski" <engineerguy3737@yahoo.com><br>
Cc: "Marc Jones" <marcj303@gmail.com>, "Carl-Daniel
Hailfinger" <c-d.hailfinger.devel.2006@gmx.net>,
coreboot@coreboot.org<br>
Date: Sunday, February 1, 2009, 3:28 AM</span></font></p>
<div>
<p class=MsoNormal><font size=3 face="Times New Roman"><span
style='font-size:12.0pt'>Hi, Dan<br>
<br>
I have tested your patch on my dbm690t (ALC882) and pistachio (ALC885) board.
It really works. However, I have a suggestion for you.<br>
<br>
/* Read in Codec location (BAR + 0xe)[2..0]*/<br>
dword = readl(base + 0xe);<br>
dword &= 7;<br>
if (!dword) <br>
goto no_codec;<br>
The above phrase is not correct all the time, at lease to my pistachio board.
It will give me the wrong msg "No codec!".<br>
<br>
I would appreciate and ack the patch if you can modify it.<br>
<br>
BTW, pci_locate_device is only used in early setup stage. So, you can remove
it.<br>
<br>
Best regards<br>
Maggie li<br>
<br>
-----Original Message-----<br>
From: <a href="/mc/compose?to=coreboot-bounces@coreboot.org"
ymailto="mailto:coreboot-bounces@coreboot.org">coreboot-bounces@coreboot.org</a>
[mailto:<a href="/mc/compose?to=coreboot-bounces@coreboot.org"
ymailto="mailto:coreboot-bounces@coreboot.org">coreboot-bounces@coreboot.org</a>]
On Behalf Of Marc Jones<br>
Sent: Thursday, January 29, 2009 1:10 PM<br>
To: Dan Lykowski<br>
Cc: Carl-Daniel Hailfinger; <a href="/mc/compose?to=coreboot@coreboot.org"
ymailto="mailto:coreboot@coreboot.org">coreboot@coreboot.org</a><br>
Subject: Re: [coreboot] SB600 HDA can't find codec fix<br>
<br>
On Tue, Jan 27, 2009 at 11:07 AM, Dan Lykowski<br>
<<a href="/mc/compose?to=engineerguy3737@yahoo.com"
ymailto="mailto:engineerguy3737@yahoo.com">engineerguy3737@yahoo.com</a>>
wrote:<br>
> Diff was being silly and I wanted to get the patch posted before I left
work<br>
> for the day. I've cleaned up the patch and included it.<br>
><br>
> I wasn't able to find where INTA was used so I used what the RPR lists
as<br>
> default. INTG. After looking at the mptable, I agree INTA is the correct<br>
> answer. I've corrected it. I used dev_find_slot because I copied from
the<br>
> SATA driver. I've added the comment just like the SATA driver has. I
don't<br>
> know what the difference is, or why the SATA driver did this.<br>
><br>
> The reordering was based on what order things happen in the BIOS
Developers<br>
> guide, RPR, and SATA driver. I fixed the order of the devices that
didn't<br>
> matter to clean up the change log.<br>
> 1. Enable the Chip<br>
> 2. Setup the SMBus registers<br>
> 3. Setup the Device Registers<br>
> 4. Look for Codec<br>
> 5. Init Codec<br>
><br>
> The codec init was changed to match the description in the RRG pg 235.<br>
> Mem Reg: Base + 08h Bit 0. There were unneeded things happening.<br>
> So here is the second try.<br>
><br>
> Thanks,<br>
> Dan Lykowski<br>
><br>
> Signed-off-by: Dan Lykowski <<a
href="/mc/compose?to=lykowdk@gmail.com" ymailto="mailto:lykowdk@gmail.com">lykowdk@gmail.com</a>><br>
<br>
This looks good to me. The hda_init looks like it was writing to the<br>
wrong device for the interrupt line setup. It would be good if the the<br>
AMD guys or Carl-Daniel can test and ack it.<br>
<br>
Marc<br>
<br>
--<br>
coreboot mailing list: <a href="/mc/compose?to=coreboot@coreboot.org"
ymailto="mailto:coreboot@coreboot.org">coreboot@coreboot.org</a><br>
<a href="http://www.coreboot.org/mailman/listinfo/coreboot" target="_blank">http://www.coreboot.org/mailman/listinfo/coreboot</a><br>
<br>
--<br>
coreboot mailing list: <a href="/mc/compose?to=coreboot@coreboot.org"
ymailto="mailto:coreboot@coreboot.org">coreboot@coreboot.org</a><br>
<a href="http://www.coreboot.org/mailman/listinfo/coreboot" target="_blank">http://www.coreboot.org/mailman/listinfo/coreboot</a></span></font></p>
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