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Hi, <BR>
Why the Socket S1G1 is changed to AM2?<BR>
<BR>
Joe<BR>
<BR> <BR>> Date: Mon, 6 Apr 2009 01:05:27 +0200<BR>> From: c-d.hailfinger.devel.2006@gmx.net<BR>> To: coreboot@coreboot.org<BR>> Subject: [coreboot] [PATCH] Asus M2A-VM<BR>> <BR>> This is the state of my v2 tree with Asus M2A-VM support. The patch is<BR>> against the AMD DBM690T, so you have to compile the amd/dbm690t target<BR>> for your Asus M2A-VM.<BR>> <BR>> Notes:<BR>> - If you want a working NIC, revert the part enabling MMCONFIG in<BR>> LinuxBIOSv2-asus_m2a-vm/src/boot/hardwaremain.c.<BR>> - If you want a working NIC and ACPI support for SATA, go to<BR>> LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl and<BR>> enable the SB5 EVIL HACK and comment out the active<BR>> "OperationRegion(SB5..." instead.<BR>> - Thermal setup is wrong.<BR>> - More than 2 GB RAM will not work (SATA will hang).<BR>> - FILO will usually work. Sometimes, you may have to poke the reset<BR>> button first.<BR>> <BR>> Suggestions:<BR>> - Revert the MMCONFIG stuff. Ignore ACPI for SATA.<BR>> <BR>> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net><BR>> <BR>> Index: LinuxBIOSv2-asus_m2a-vm/src/southbridge/amd/rs690/rs690_cmn.c<BR>> ===================================================================<BR>> --- LinuxBIOSv2-asus_m2a-vm/src/southbridge/amd/rs690/rs690_cmn.c (Revision 4074)<BR>> +++ LinuxBIOSv2-asus_m2a-vm/src/southbridge/amd/rs690/rs690_cmn.c (Arbeitskopie)<BR>> @@ -63,8 +63,8 @@<BR>> <BR>> /*get BAR3 base address for nbcfg0x1c */<BR>> u32 addr = pci_read_config32(nb_dev, 0x1c);<BR>> - /*printk_debug("write: addr=%x,bus=%x,devfn=%x\n", addr, dev->bus->secondary,<BR>> - dev->path.pci.devfn);*/<BR>> + printk_debug("write: addr=%x,bus=%x,devfn=%x\n", addr, dev->bus->secondary,<BR>> + dev->path.pci.devfn);<BR>> addr |= dev->bus->secondary << 20 | /* bus num */<BR>> dev->path.pci.devfn << 12 | reg_pos;<BR>> <BR>> Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/Config.lb<BR>> ===================================================================<BR>> --- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/Config.lb (Revision 4074)<BR>> +++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/Config.lb (Arbeitskopie)<BR>> @@ -195,7 +195,7 @@<BR>> #Define gfx_link_width, 0: x16, 1: x1, 2: x2, 3: x4, 4: x8, 5: x12 (not supported), 6: x16<BR>> chip northbridge/amd/amdk8/root_complex<BR>> device apic_cluster 0 on<BR>> - chip cpu/amd/socket_S1G1<BR>> + chip cpu/amd/socket_AM2<BR>> device apic 0 on end<BR>> end<BR>> end<BR>> @@ -211,7 +211,7 @@<BR>> end<BR>> end<BR>> device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913<BR>> - device pci 3.0 off end # PCIE P2P bridge 0x791b<BR>> + #device pci 3.0 off end # PCIE P2P bridge 0x791b<BR>> device pci 4.0 on end # PCIE P2P bridge 0x7914<BR>> device pci 5.0 on end # PCIE P2P bridge 0x7915<BR>> device pci 6.0 on end # PCIE P2P bridge 0x7916<BR>> @@ -255,9 +255,9 @@<BR>> device pci 14.3 on # LPC 0x438d<BR>> chip superio/ite/it8712f<BR>> device pnp 2e.0 off # Floppy<BR>> - io 0x60 = 0x3f0<BR>> - irq 0x70 = 6<BR>> - drq 0x74 = 2<BR>> + #io 0x60 = 0x3f0<BR>> + #irq 0x70 = 6<BR>> + #drq 0x74 = 2<BR>> end<BR>> device pnp 2e.1 on # Com1<BR>> io 0x60 = 0x3f8<BR>> Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/irq_tables.c<BR>> ===================================================================<BR>> --- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/irq_tables.c (Revision 4074)<BR>> +++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/irq_tables.c (Arbeitskopie)<BR>> @@ -54,7 +54,7 @@<BR>> extern u8 bus_isa;<BR>> extern u8 bus_rs690[8];<BR>> extern u8 bus_sb600[2];<BR>> -extern unsigned long sbdn_sb600;<BR>> +extern u32 sbdn_sb600;<BR>> <BR>> unsigned long write_pirq_routing_table(unsigned long addr)<BR>> {<BR>> Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/resourcemap.c<BR>> ===================================================================<BR>> --- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/resourcemap.c (Revision 4074)<BR>> +++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/resourcemap.c (Arbeitskopie)<BR>> @@ -17,7 +17,7 @@<BR>> * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA<BR>> */<BR>> <BR>> -static void setup_dbm690t_resource_map(void)<BR>> +static void setup_mb_resource_map(void)<BR>> {<BR>> static const unsigned int register_values[] = {<BR>> /* Careful set limit registers before base registers which contain the enables */<BR>> Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl<BR>> ===================================================================<BR>> --- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl (Revision 4074)<BR>> +++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/acpi/dsdt.asl (Arbeitskopie)<BR>> @@ -33,8 +33,8 @@<BR>> /* FIXME the patching is not done yet! */<BR>> /* Memory related values */<BR>> Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */<BR>> - Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */<BR>> - Name(PBLN, 0x0) /* Length of BIOS area */<BR>> + Name(PBAD, 0xFFF00000) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */<BR>> + Name(PBLN, 0x00100000) /* Length of BIOS area (1 MB hardcoded) */<BR>> <BR>> Name(PCBA, 0xE0000000) /* Base address of PCIe config space */<BR>> Name(HPBA, 0xFED00000) /* Base address of HPET table */<BR>> @@ -273,7 +273,7 @@<BR>> * The 8 comes from 8 functions per device, and 4096 bytes per function config space<BR>> */<BR>> Offset(0x00090024), /* Byte offset to SATA register 24h - Bus 0, Device 18, Function 0 */<BR>> - STB5, 32,<BR>> + STB5, 32, /* Address of SATA_BAR5 */<BR>> Offset(0x00098042), /* Byte offset to OHCI0 register 42h - Bus 0, Device 19, Function 0 */<BR>> PT0D, 1,<BR>> PT1D, 1,<BR>> @@ -297,7 +297,9 @@<BR>> P92E, 1, /* Port92 decode enable */<BR>> }<BR>> <BR>> - OperationRegion(SB5, SystemMemory, STB5, 0x1000)<BR>> + /* FIXME: EVIL HACK. SB5 address is hardcoded to 0xfc409000 in the hope the OS won't touch it. */<BR>> + /*OperationRegion(SB5, SystemMemory, 0xfc409000, 0x1000)*/ /* SATA_BAR5 (ABAR) */<BR>> + OperationRegion(SB5, SystemMemory, STB5, 0x1000) /* SATA_BAR5 (ABAR) */<BR>> Field(SB5, AnyAcc, NoLock, Preserve)<BR>> {<BR>> /* Port 0 */<BR>> @@ -308,9 +310,9 @@<BR>> , 3,<BR>> P0BY, 1,<BR>> Offset(0x128), /* Port 0 Serial ATA status */<BR>> - P0DD, 4,<BR>> + P0DD, 4, /* Port 0 Device Detection (DET) */<BR>> , 4,<BR>> - P0IS, 4,<BR>> + P0IS, 4, /* Port 0 Interface Power Management (IPM) */<BR>> Offset(0x12C), /* Port 0 Serial ATA control */<BR>> P0DI, 4,<BR>> Offset(0x130), /* Port 0 Serial ATA error */<BR>> @@ -1493,23 +1495,24 @@<BR>> Memory32Fixed(READONLY, 0x000E0000, 0x00020000, RDBS) /* BIOS ROM area */<BR>> <BR>> /* DRAM Memory from 1MB to TopMem */<BR>> - Memory32Fixed(READWRITE, 0x00100000, 0, DMLO) /* 1MB to TopMem */<BR>> + Memory32Fixed(READWRITE, 0x00100000, 0, DMLO) /* 1MB to TopMem, the length is filled out when DMLL is calculated */<BR>> <BR>> /* BIOS space just below 4GB */<BR>> DWORDMemory(<BR>> ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,<BR>> 0x00, /* Granularity */<BR>> 0x00000000, /* Min */<BR>> - 0x00000000, /* Max */<BR>> + 0xFFFFFFFF, /* Max */<BR>> 0x00000000, /* Translation */<BR>> 0x00000000, /* Max-Min, RLEN */<BR>> ,,<BR>> - PCBM<BR>> + PCBM,<BR>> + AddressRangeReserved<BR>> )<BR>> <BR>> /* DRAM memory from 4GB to TopMem2 */<BR>> QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,<BR>> - 0xFFFFFFFF, /* Granularity */<BR>> + 0x3FFFFFFF, /* Granularity must be 1 GB or lower! Due to hoisting, RLEN will always be 2k+1 GB */<BR>> 0x00000000, /* Min */<BR>> 0x00000000, /* Max */<BR>> 0x00000000, /* Translation */<BR>> @@ -1543,6 +1546,7 @@<BR>> <BR>> CreateQWordField(CRES, ^DMHI._MIN, DMHB)<BR>> CreateQWordField(CRES, ^DMHI._LEN, DMHL)<BR>> + CreateQWordField(CRES, ^DMHI._MAX, DMHM)<BR>> CreateQWordField(CRES, ^PEBM._MIN, EBMB)<BR>> CreateQWordField(CRES, ^PEBM._LEN, EBML)<BR>> <BR>> @@ -1554,23 +1558,16 @@<BR>> /* Set size of memory from 1MB to TopMem */<BR>> Subtract(TOM1, 0x100000, DMLL)<BR>> <BR>> - /*<BR>> - * If(LNotEqual(TOM2, 0x00000000)){<BR>> - * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2<BR>> - * Subtract(TOM2, 0x100000000, DMHL)<BR>> - * }<BR>> - */<BR>> -<BR>> - /* If there is no memory above 4GB, put the BIOS just below 4GB */<BR>> - If(LEqual(TOM2, 0x00000000)){<BR>> - Store(PBAD,PBMB) /* Reserve the "BIOS" space */<BR>> - Store(PBLN,PBML)<BR>> + If(LNotEqual(TOM2, 0x00000000)){<BR>> + Store(0x100000000,DMHB) /* DRAM from 4GB to TopMem2 */<BR>> + Subtract(TOM2, 0x100000000, DMHL)<BR>> + Subtract(TOM2, 0x1, DMHM)<BR>> }<BR>> - Else { /* Otherwise, put the BIOS just below 16EB */<BR>> - ShiftLeft(PBAD,16,EBMB) /* Reserve the "BIOS" space */<BR>> - Store(PBLN,EBML)<BR>> - }<BR>> <BR>> + /* Put the BIOS just below 4GB */<BR>> + Store(PBAD,PBMB) /* Reserve the "BIOS" space */<BR>> + Store(PBLN,PBML)<BR>> +<BR>> Return(CRES) /* note to change the Name buffer */<BR>> } /* end of Method(_SB.PCI0._CRS) */<BR>> <BR>> Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/mainboard.c<BR>> ===================================================================<BR>> --- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/mainboard.c (Revision 4074)<BR>> +++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/mainboard.c (Arbeitskopie)<BR>> @@ -89,6 +89,31 @@<BR>> outb(byte, 0xC52);<BR>> }<BR>> <BR>> +/*<BR>> + * This is a totally gross hack to be able to use pci_{read,write}_config*<BR>> + * early during boot when the device tree is not yet set up completely.<BR>> + */<BR>> +void devicetree_early_fixup(struct device *dev)<BR>> +{<BR>> + struct bus *pbus = dev->bus;<BR>> + while(pbus && pbus->dev && !ops_pci_bus(pbus)) {<BR>> + if (pbus == pbus->dev->bus)<BR>> + break;<BR>> + pbus = pbus->dev->bus;<BR>> + }<BR>> + if (ops_pci_bus(pbus)) {<BR>> + printk_info("%s not needed\n", __func__);<BR>> + return;<BR>> + }<BR>> + if (pbus && pbus->dev && pbus->dev->ops) {<BR>> + printk_info("%s fixing up root bus pci ops\n", __func__);<BR>> + pbus->dev->ops->ops_pci_bus = &pci_cf8_conf1;<BR>> + return;<BR>> + }<BR>> + printk_info("%s failed\n", __func__);<BR>> + return;<BR>> +}<BR>> +<BR>> /********************************************************<BR>> * dbm690t uses SB600 GPIO9 to detect IDE_DMA66.<BR>> * IDE_DMA66 is routed to GPIO 9. So we read Gpio 9 to<BR>> @@ -97,32 +122,25 @@<BR>> static void get_ide_dma66()<BR>> {<BR>> u8 byte;<BR>> - /*u32 sm_dev, ide_dev; */<BR>> - device_t sm_dev, ide_dev;<BR>> - struct bus pbus;<BR>> + struct device *sm_dev;<BR>> + struct device *ide_dev;<BR>> <BR>> + printk_info("%s.\n", __func__);<BR>> sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));<BR>> + devicetree_early_fixup(sm_dev);<BR>> <BR>> - byte =<BR>> - pci_cf8_conf1.read8(&pbus, sm_dev->bus->secondary,<BR>> - sm_dev->path.pci.devfn, 0xA9);<BR>> + byte = pci_read_config8(sm_dev, 0xA9);<BR>> byte |= (1 << 5); /* Set Gpio9 as input */<BR>> - pci_cf8_conf1.write8(&pbus, sm_dev->bus->secondary,<BR>> - sm_dev->path.pci.devfn, 0xA9, byte);<BR>> + pci_write_config8(sm_dev, 0xA9, byte);<BR>> <BR>> ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1));<BR>> - byte =<BR>> - pci_cf8_conf1.read8(&pbus, ide_dev->bus->secondary,<BR>> - ide_dev->path.pci.devfn, 0x56);<BR>> + byte = pci_read_config8(ide_dev, 0x56);<BR>> byte &= ~(7 << 0);<BR>> - if ((1 << 5) & pci_cf8_conf1.<BR>> - read8(&pbus, sm_dev->bus->secondary, sm_dev->path.pci.devfn,<BR>> - 0xAA))<BR>> + if ((1 << 5) & pci_read_config8(sm_dev, 0xAA))<BR>> byte |= 2 << 0; /* mode 2 */<BR>> else<BR>> byte |= 5 << 0; /* mode 5 */<BR>> - pci_cf8_conf1.write8(&pbus, ide_dev->bus->secondary,<BR>> - ide_dev->path.pci.devfn, 0x56, byte);<BR>> + pci_write_config8(ide_dev, 0x56, byte);<BR>> }<BR>> <BR>> /*<BR>> @@ -133,7 +151,6 @@<BR>> u8 byte;<BR>> u16 word;<BR>> device_t sm_dev;<BR>> - struct bus pbus;<BR>> <BR>> /* set ADT 7461 */<BR>> ADT7461_write_byte(0x0B, 0x50); /* Local Temperature Hight limit */<BR>> @@ -156,12 +173,9 @@<BR>> <BR>> /* set GPIO 64 to input */<BR>> sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));<BR>> - word =<BR>> - pci_cf8_conf1.read16(&pbus, sm_dev->bus->secondary,<BR>> - sm_dev->path.pci.devfn, 0x56);<BR>> + word = pci_read_config16(sm_dev, 0x56);<BR>> word |= 1 << 7;<BR>> - pci_cf8_conf1.write16(&pbus, sm_dev->bus->secondary,<BR>> - sm_dev->path.pci.devfn, 0x56, word);<BR>> + pci_write_config16(sm_dev, 0x56, word);<BR>> <BR>> /* set GPIO 64 internal pull-up */<BR>> byte = pm2_ioread(0xf0);<BR>> @@ -197,12 +211,12 @@<BR>> * enable the dedicated function in dbm690t board.<BR>> * This function called early than rs690_enable.<BR>> *************************************************/<BR>> -void dbm690t_enable(device_t dev)<BR>> +void mb_enable(device_t dev)<BR>> {<BR>> struct mainboard_config *mainboard =<BR>> (struct mainboard_config *)dev->chip_info;<BR>> <BR>> - printk_info("Mainboard DBM690T Enable. dev=0x%p\n", dev);<BR>> + printk_info("Mainboard " MAINBOARD_PART_NUMBER " Enable. dev=%p\n", dev);<BR>> <BR>> #if (CONFIG_GFXUMA == 1)<BR>> msr_t msr, msr2;<BR>> @@ -264,6 +278,6 @@<BR>> }<BR>> <BR>> struct chip_operations mainboard_ops = {<BR>> - CHIP_NAME("AMD DBM690T Mainboard")<BR>> - .enable_dev = dbm690t_enable,<BR>> + CHIP_NAME(MAINBOARD_VENDOR " " MAINBOARD_PART_NUMBER " Mainboard")<BR>> + .enable_dev = mb_enable,<BR>> };<BR>> Index: LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/cache_as_ram_auto.c<BR>> ===================================================================<BR>> --- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/cache_as_ram_auto.c (Revision 4074)<BR>> +++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/cache_as_ram_auto.c (Arbeitskopie)<BR>> @@ -32,6 +32,8 @@<BR>> <BR>> #define DIMM0 0x50<BR>> #define DIMM1 0x51<BR>> +#define DIMM2 0x52<BR>> +#define DIMM3 0x53<BR>> <BR>> #define ICS951462_ADDRESS 0x69<BR>> #define SMBUS_HUB 0x71<BR>> @@ -137,7 +139,7 @@<BR>> normal_image:<BR>> post_code(0x23);<BR>> __asm__ volatile ("jmp __normal_image": /* outputs */<BR>> - :"a" (bist), "b"(cpu_init_detectedx) /* inputs */);<BR>> + :"a" (bist), "b"(cpu_init_detectedx)); /* inputs */<BR>> <BR>> fallback_image:<BR>> post_code(0x25);<BR>> @@ -157,14 +159,14 @@<BR>> <BR>> void real_main(unsigned long bist, unsigned long cpu_init_detectedx)<BR>> {<BR>> - static const u16 spd_addr[] = { DIMM0, 0, 0, 0, DIMM1, 0, 0, 0, };<BR>> + static const u16 spd_addr[] = { DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, };<BR>> int needs_reset = 0;<BR>> u32 bsp_apicid = 0;<BR>> msr_t msr;<BR>> struct cpuid_result cpuid1;<BR>> - struct sys_info *sysinfo = (struct sys_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE);<BR>> + struct sys_info *sysinfo = (struct sys_info *)(DCACHE_RAM_BASE +<BR>> + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE);<BR>> <BR>> -<BR>> if (bist == 0) {<BR>> bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);<BR>> }<BR>> @@ -181,7 +183,7 @@<BR>> report_bist_failure(bist);<BR>> printk_debug("bsp_apicid=0x%x\n", bsp_apicid);<BR>> <BR>> - setup_dbm690t_resource_map();<BR>> + setup_mb_resource_map();<BR>> <BR>> setup_coherent_ht_domain();<BR>> <BR>> Index: LinuxBIOSv2-asus_m2a-vm/src/boot/hardwaremain.c<BR>> ===================================================================<BR>> --- LinuxBIOSv2-asus_m2a-vm/src/boot/hardwaremain.c (Revision 4074)<BR>> +++ LinuxBIOSv2-asus_m2a-vm/src/boot/hardwaremain.c (Arbeitskopie)<BR>> @@ -37,6 +37,7 @@<BR>> #include <part/init_timer.h><BR>> #include <boot/elf.h><BR>> #include <romfs.h><BR>> +#include "../southbridge/amd/rs690/rs690.h"<BR>> <BR>> /**<BR>> * @brief Main function of the DRAM part of coreboot.<BR>> @@ -50,6 +51,7 @@<BR>> void hardwaremain(int boot_complete)<BR>> {<BR>> struct lb_memory *lb_mem;<BR>> + device_t nb_dev;<BR>> <BR>> post_code(0x80);<BR>> <BR>> @@ -84,6 +86,8 @@<BR>> dev_initialize();<BR>> post_code(0x89);<BR>> <BR>> + nb_dev = dev_find_slot(0, PCI_DEVFN(0, 0));<BR>> + enable_pcie_bar3(nb_dev); /* PCIEMiscInit */<BR>> /* Now that we have collected all of our information<BR>> * write our configuration tables.<BR>> */<BR>> Index: LinuxBIOSv2-asus_m2a-vm/src/arch/i386/include/arch/smp/mpspec.h<BR>> ===================================================================<BR>> --- LinuxBIOSv2-asus_m2a-vm/src/arch/i386/include/arch/smp/mpspec.h (Revision 4074)<BR>> +++ LinuxBIOSv2-asus_m2a-vm/src/arch/i386/include/arch/smp/mpspec.h (Arbeitskopie)<BR>> @@ -1,6 +1,8 @@<BR>> #ifndef __ASM_MPSPEC_H<BR>> #define __ASM_MPSPEC_H<BR>> <BR>> +#include <device/device.h><BR>> +<BR>> #if HAVE_MP_TABLE==1<BR>> <BR>> /*<BR>> Index: LinuxBIOSv2-asus_m2a-vm/targets/amd/dbm690t/Config-abuild.lb<BR>> ===================================================================<BR>> --- LinuxBIOSv2-asus_m2a-vm/targets/amd/dbm690t/Config-abuild.lb (Revision 4074)<BR>> +++ LinuxBIOSv2-asus_m2a-vm/targets/amd/dbm690t/Config-abuild.lb (Arbeitskopie)<BR>> @@ -7,9 +7,12 @@<BR>> option CROSS_COMPILE="CROSS_PREFIX"<BR>> option HOSTCC="CROSS_HOSTCC"<BR>> <BR>> +option DEFAULT_CONSOLE_LOGLEVEL = 9<BR>> +option MAXIMUM_CONSOLE_LOGLEVEL = 9<BR>> +<BR>> __COMPRESSION__<BR>> <BR>> -option ROM_SIZE=1024*1024<BR>> +option ROM_SIZE = 1024*1024 - 54784<BR>> romimage "normal"<BR>> option USE_FALLBACK_IMAGE=0<BR>> option ROM_IMAGE_SIZE=0x20000<BR>> <BR>> <BR>> -- <BR>> http://www.hailfinger.org/<BR>> <BR><br /><hr />What can you do with the new Windows Live? <a href='http://www.microsoft.com/windows/windowslive/default.aspx' target='_new'>Find out</a></body>
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