2009/6/3 <span dir="ltr"><<a href="mailto:svn@coreboot.org">svn@coreboot.org</a>></span><br><div class="gmail_quote"><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
Author: libv<br>
Date: 2009-06-03 09:50:39 +0200 (Wed, 03 Jun 2009)<br>
New Revision: 568<br>
<br>
Modified:<br>
trunk/board_enable.c<br>
Log:<br>
Board enable: Gigabyte GA K8N SLI.<br>
<br>
Raises bits 0 and 2 on offset 0xE1 in the system control area of the<br>
nvidia ck804 lpc.<br>
<br>
Signed-off-by: Luc Verhaegen <<a href="mailto:libv@skynet.be">libv@skynet.be</a>><br>
Acked-by: Carl-Daniel Hailfinger <<a href="mailto:c-d.hailfinger.devel.2006@gmx.net">c-d.hailfinger.devel.2006@gmx.net</a>><br>
Acked-by: Alexander Gordeev <<a href="mailto:lasaine@lvk.cs.msu.su">lasaine@lvk.cs.msu.su</a>><br>
<br>
<br>
Modified: trunk/board_enable.c<br>
===================================================================<br>
--- trunk/board_enable.c 2009-06-02 19:54:22 UTC (rev 567)<br>
+++ trunk/board_enable.c 2009-06-03 07:50:39 UTC (rev 568)<br>
@@ -372,6 +372,31 @@<br>
return 0;<br>
}<br>
<br>
+/**<br>
+ * Suited for the Gigabyte GA-K8N-SLI: CK804 southbridge.<br>
+ */<br>
+static int board_ga_k8n_sli(const char *name)<br>
+{<br>
+ struct pci_dev *dev;<br>
+ uint32_t base;<br>
+ uint8_t tmp;<br>
+<br>
+ dev = pci_dev_find(0x10DE, 0x0050); /* NVIDIA CK804 LPC */<br>
+ if (!dev) {<br>
+ fprintf(stderr, "\nERROR: NVIDIA LPC bridge not found.\n");<br>
+ return -1;<br>
+ }<br>
+<br>
+ base = pci_read_long(dev, 0x64) & 0x0000FF00; /* System control area */<br>
+<br>
+ /* if anyone knows more about nvidia lpcs, feel free to explain this */<br>
+ tmp = inb(base + 0xE1);<br>
+ tmp |= 0x05;<br>
+ outb(tmp, base + 0xE1);<br>
+<br>
+ return 0;<br>
+}<br>
+<br>
static int board_hp_dl145_g3_enable(const char *name)<br>
{<br>
/* Set GPIO lines in the Broadcom HT-1000 southbridge. */<br>
@@ -670,6 +695,7 @@<br>
{0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, "epox", "ep-bx3", "EPoX", "EP-BX3", board_epox_ep_bx3},<br>
{0x1039, 0x0761, 0, 0, 0, 0, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE", "GA-2761GXDK", it87xx_probe_spi_flash},<br>
{0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE", "GA-7VT600", board_biostar_p4m80_m4},<br>
+ {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", board_ga_k8n_sli},<br>
{0x10de, 0x0360, 0, 0, 0, 0, 0, 0, "gigabyte", "m57sli", "GIGABYTE", "GA-M57SLI-S4", it87xx_probe_spi_flash},<br>
{0x10de, 0x03e0, 0, 0, 0, 0, 0, 0, "gigabyte", "m61p", "GIGABYTE", "GA-M61P-S3", it87xx_probe_spi_flash},<br>
{0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4391, 0x1458, 0xb000, NULL, NULL, "GIGABYTE", "GA-MA78G-DS3H", it87xx_probe_spi_flash},<br>
@@ -787,7 +813,6 @@<br>
{ "Boser", "HS-6637", },<br>
{ "DFI", "855GME-MGF", },<br>
{ "FIC", "VA-502", },<br>
- { "GIGABYTE", "GA-K8N-SLI", },<br>
{ "MSI", "MS-6178", },<br>
{ "MSI", "MS-7260 (K9N Neo)", },<br>
{ "PCCHIPS", "M537DMA33", },<br>
<font color="#888888"><br>
<br>
--<br>
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<a href="http://www.coreboot.org/mailman/listinfo/coreboot" target="_blank">http://www.coreboot.org/mailman/listinfo/coreboot</a></font></blockquote><div><br>Make FreeBSD's gmake happy.<br><br>Signed-off-by: Idwer Vollering <<a href="mailto:vidwer@gmail.com">vidwer@gmail.com</a>><br>
<br>Index: board_enable.c<br>===================================================================<br>--- board_enable.c (revision 568)<br>+++ board_enable.c (working copy)<br>@@ -390,9 +390,9 @@<br> base = pci_read_long(dev, 0x64) & 0x0000FF00; /* System control area */<br>
<br> /* if anyone knows more about nvidia lpcs, feel free to explain this */<br>- tmp = inb(base + 0xE1);<br>+ tmp = INB(base + 0xE1);<br> tmp |= 0x05;<br>- outb(tmp, base + 0xE1);<br>+ OUTB(tmp, base + 0xE1);<br>
<br> return 0;<br> }<br></div></div><br>