Index: coreboot-v2/src/southbridge/intel/i82801gx/i82801gx_lpc.c
===================================================================
--- coreboot-v2.orig/src/southbridge/intel/i82801gx/i82801gx_lpc.c
+++ coreboot-v2/src/southbridge/intel/i82801gx/i82801gx_lpc.c
@@ -273,7 +273,7 @@ static void i82801gx_power_options(devic
 	/* Set up power management block and determine sleep mode */
 	pmbase = pci_read_config16(dev, 0x40) & 0xfffe;
 	reg32 = inl(pmbase + 0x04); // PM1_CNT
-#if HAVE_ACPI_RESUME
+#if CONFIG_HAVE_ACPI_RESUME
 	acpi_slp_type = (((reg32 >> 10) & 7) == 5) ? 3 : 0;
 	printk_debug("PM1_CNT: 0x%08x --> acpi_sleep_type: %x\n", 
 			reg32, acpi_slp_type);
Index: coreboot-v2/src/southbridge/intel/i82801gx/i82801gx_power.h
===================================================================
--- coreboot-v2.orig/src/southbridge/intel/i82801gx/i82801gx_power.h
+++ coreboot-v2/src/southbridge/intel/i82801gx/i82801gx_power.h
@@ -23,7 +23,7 @@
 #define MAINBOARD_POWER_ON	1
 #define MAINBOARD_POWER_KEEP	2
 
-#ifndef MAINBOARD_POWER_ON_AFTER_FAIL
-#define MAINBOARD_POWER_ON_AFTER_FAIL MAINBOARD_POWER_ON
+#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
+#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
 #endif
 
Index: coreboot-v2/src/southbridge/intel/i82801gx/i82801gx_smihandler.c
===================================================================
--- coreboot-v2.orig/src/southbridge/intel/i82801gx/i82801gx_smihandler.c
+++ coreboot-v2/src/southbridge/intel/i82801gx/i82801gx_smihandler.c
@@ -300,7 +300,7 @@ static void southbridge_smi_sleep(unsign
 	 * CMOS or even better from GNVS. Right now it's hard
 	 * coded at compile time.
 	 */
-	u8 s5pwr = MAINBOARD_POWER_ON_AFTER_FAIL;
+	u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
 
 	/* First, disable further SMIs */
 	reg8 = inb(pmbase + SMI_EN);
