Initializing devices... Root Device init APIC_CLUSTER: 0 init start_eip=0x0000d000, offset=0x00100000, code_size=0x0000005b Initializing CPU #0 CPU: vendor AMD device 100f42 CPU: family 10, model 04, stepping 02 nodeid = 00, coreid = 00 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 2, base: 3584MB, range: 512MB, type UC ADDRESS_MASK_HIGH=0xffff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x00 done. CPU model: AMD Thermal Test Kit siblings = 03, CPU #0 initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 1. After apic_write. Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 1. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #1 CPU: vendor AMD device 100f42 CPU: family 10, model 04, stepping 02 nodeid = 00, coreid = 01 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 2, base: 3584MB, range: 512MB, type UC ADDRESS_MASK_HIGH=0xffff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x01 done. CPU model: AMD Thermal Test Kit siblings = 03, CPU #1 initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 2. After apic_write. Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 2. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #2 CPU: vendor AMD device 100f42 CPU: family 10, model 04, stepping 02 nodeid = 00, coreid = 02 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 2, base: 3584MB, range: 512MB, type UC ADDRESS_MASK_HIGH=0xffff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x02 done. CPU model: AMD Thermal Test Kit siblings = 03, CPU #2 initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 3. After apic_write. Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 3. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #3 CPU: vendor AMD device 100f42 CPU: family 10, model 04, stepping 02 nodeid = 00, coreid = 03 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 2, base: 3584MB, range: 512MB, type UC ADDRESS_MASK_HIGH=0xffff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x03 done. CPU model: AMD Thermal Test Kit siblings = 03, CPU #3 initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 4. After apic_write. Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 4. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #4 CPU: vendor AMD device 100f42 CPU: family 10, model 04, stepping 02 nodeid = 01, coreid = 00 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB ADDRESS_MASK_HIGH=0xffff Setting variable MTRR 2, base: 3584MB, range: 512MB, type UC ADDRESS_MASK_HIGH=0xffff DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x04 done. CPU model: AMD Thermal Test Kit siblings = 03, CPU #4 initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 5. After apic_write. Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 5. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #5 CPU: vendor AMD device 100f42 CPU: family 10, model 04, stepping 02 nodeid = 01, coreid = 01 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(0-88) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(0-0) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(0-0) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(0-0) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(0-0) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(0-0) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(0-0) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(0-88) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(0-0) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(0-88) Type: WB, RdMEM, WrMEM CTRL-A Z for help |115200 8N1 | NOR | Minicom 2.3 | VT102 | Offline