coreboot-2.0.0-r642:643M Thu Nov 26 11:26:27 CST 2009 starting... bsp_apicid=0x0 core0 started: 01SBLink=00 NC node|link=00 rs780_early_setup() get_cpu_rev EAX=0x60fb2. CPU Rev is K8_G0. k8_optimization() rs780_por_init sb700_early_setup() sb700_devices_por_init() sb700_devices_por_init(): SMBus Device, BDF:0-20-0 SMBus controller enabled, sb revision is A14 sb700_devices_por_init(): IDE Device, BDF:0-20-1 sb700_devices_por_init(): LPC Device, BDF:0-20-3 sb700_devices_por_init(): P2P Bridge, BDF:0-20-4 sb700_devices_por_init(): SATA Device, BDF:0-18-0 sb700_pmio_por_init() begin msr fid, vid: hi=0x31101616, lo=0x100e0202 Current fid_cur: 0x2, fid_max: 0xe Requested fid_new: 0xe FidVid table step fidvid: 0xe FidVid table step fidvid: 0xe FidVid table step fidvid: 0xe FidVid table step fidvid: 0xe FidVid table step fidvid: 0xe FidVid table step fidvid: 0xe FidVid table step fidvid: 0xe FidVid table step fidvid: 0xe set fid failed for apicid =00 end msr fid, vid: hi=0x31101610, lo=0x100e0202 rs780_htinit cpu_ht_freq=6. rs780_htinit: HT1 mode needs_reset=0x1 ht reset - coreboot-2.0.0-r642:643M Thu Nov 26 11:26:27 CST 2009 starting... bsp_apicid=0x0 core0 started: 01SBLink=00 NC node|link=00 rs780_early_setup() get_cpu_rev EAX=0x60fb2. CPU Rev is K8_G0. k8_optimization() rs780_por_init sb700_early_setup() sb700_devices_por_init() sb700_devices_por_init(): SMBus Device, BDF:0-20-0 SMBus controller enabled, sb revision is A14 sb700_devices_por_init(): IDE Device, BDF:0-20-1 sb700_devices_por_init(): LPC Device, BDF:0-20-3 sb700_devices_por_init(): P2P Bridge, BDF:0-20-4 sb700_devices_por_init(): SATA Device, BDF:0-18-0 sb700_pmio_por_init() begin msr fid, vid: hi=0x31101610, lo=0x100e0202 Current fid_cur: 0x2, fid_max: 0xe Requested fid_new: 0xe FidVid table step fidvid: 0xe FidVid table step fidvid: 0xe FidVid table step fidvid: 0xe FidVid table step fidvid: 0xe FidVid table step fidvid: 0xe FidVid table step fidvid: 0xe FidVid table step fidvid: 0xe FidVid table step fidvid: 0xe set fid failed for apicid =00 end msr fid, vid: hi=0x31101610, lo=0x100e0202 rs780_htinit cpu_ht_freq=6. rs780_htinit: HT1 mode needs_reset=0x0 sysinfo->nodes: 1 sysinfo->ctrl: cf188 spd_addr: ffffbdc8 Ram1.00 Ram2.00 sdram_set_spd_registers: paramx :000ced44 400MHz RAM end at 0x00100000 kB Ram3 sdram_enable: tsc0[8]: 000cee04Initializing memory: done Setting variable MTRR 2, base: 0MB, range: 1024MB, type WB DQS Training:RcvrEn:Pass1: 00 CTLRMaxDelay=03 done DQS Training:DQSPos: 00 TrainDQSRdWrPos: buf_a:000ce8d0 TrainDQSPos: MutualCSPassW[48] :000ce7b4 TrainDQSPos: MutualCSPassW[48] :000ce7b4 TrainDQSPos: MutualCSPassW[48] :000ce7b4 TrainDQSPos: MutualCSPassW[48] :000ce7b4 done DQS Training:RcvrEn:Pass2: 00 CTLRMaxDelay=57 done DQS SAVE NVRAM: c2000 DQS Training:tsc[00]=000000001f5a25f1 DQS Training:tsc[01]=000000002008593d DQS Training:tsc[02]=000000002010153a DQS Training:tsc[03]=0000000024f11d6e DQS Training:tsc[04]=0000000025aae11a Ram4 v_esp=000ceed8 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region: Done Uncompressing image to RAM. Jumping to image. coreboot-2.0.0-r642:643M Thu Nov 26 11:26:27 CST 2009 booting... Enumerating buses... Show all devs...Before Device Enumeration. Root Device: enabled 1, 0 resources APIC_CLUSTER: 0: enabled 1, 0 resources APIC: 00: enabled 1, 0 resources PCI_DOMAIN: 0000: enabled 1, 0 resources PCI: 00:18.0: enabled 1, 0 resources PCI: 00:00.0: enabled 1, 0 resources PCI: 00:01.0: enabled 1, 0 resources PCI: 00:05.0: enabled 1, 0 resources PCI: 00:02.0: enabled 1, 0 resources PCI: 00:03.0: enabled 1, 0 resources PCI: 00:04.0: enabled 1, 0 resources PCI: 00:05.0: enabled 0, 0 resources PCI: 00:06.0: enabled 0, 0 resources PCI: 00:07.0: enabled 0, 0 resources PCI: 00:08.0: enabled 0, 0 resources PCI: 00:09.0: enabled 1, 0 resources PCI: 00:0a.0: enabled 1, 0 resources PCI: 00:11.0: enabled 1, 0 resources PCI: 00:12.0: enabled 1, 0 resources PCI: 00:12.1: enabled 1, 0 resources PCI: 00:12.2: enabled 1, 0 resources PCI: 00:13.0: enabled 1, 0 resources PCI: 00:13.1: enabled 1, 0 resources PCI: 00:13.2: enabled 1, 0 resources PCI: 00:14.5: enabled 1, 0 resources PCI: 00:14.0: enabled 1, 0 resources I2C: 00:50: enabled 1, 0 resources I2C: 00:51: enabled 1, 0 resources I2C: 00:52: enabled 1, 0 resources I2C: 00:53: enabled 1, 0 resources PCI: 00:14.1: enabled 1, 0 resources PCI: 00:14.2: enabled 1, 0 resources PCI: 00:14.3: enabled 1, 0 resources PNP: 002e.0: enabled 0, 3 resources PNP: 002e.1: enabled 1, 2 resources PNP: 002e.2: enabled 0, 2 resources PNP: 002e.3: enabled 0, 2 resources PNP: 002e.4: enabled 0, 0 resources PNP: 002e.5: enabled 1, 3 resources PNP: 002e.6: enabled 1, 1 resources PNP: 002e.7: enabled 0, 0 resources PNP: 002e.8: enabled 0, 2 resources PNP: 002e.9: enabled 0, 1 resources PNP: 002e.a: enabled 0, 0 resources PCI: 00:14.4: enabled 1, 0 resources PCI: 00:18.1: enabled 1, 0 resources PCI: 00:18.2: enabled 1, 0 resources PCI: 00:18.3: enabled 1, 0 resources Compare with tree... Root Device: enabled 1, 0 resources APIC_CLUSTER: 0: enabled 1, 0 resources APIC: 00: enabled 1, 0 resources PCI_DOMAIN: 0000: enabled 1, 0 resources PCI: 00:18.0: enabled 1, 0 resources PCI: 00:00.0: enabled 1, 0 resources PCI: 00:01.0: enabled 1, 0 resources PCI: 00:05.0: enabled 1, 0 resources PCI: 00:02.0: enabled 1, 0 resources PCI: 00:03.0: enabled 1, 0 resources PCI: 00:04.0: enabled 1, 0 resources PCI: 00:05.0: enabled 0, 0 resources PCI: 00:06.0: enabled 0, 0 resources PCI: 00:07.0: enabled 0, 0 resources PCI: 00:08.0: enabled 0, 0 resources PCI: 00:09.0: enabled 1, 0 resources PCI: 00:0a.0: enabled 1, 0 resources PCI: 00:11.0: enabled 1, 0 resources PCI: 00:12.0: enabled 1, 0 resources PCI: 00:12.1: enabled 1, 0 resources PCI: 00:12.2: enabled 1, 0 resources PCI: 00:13.0: enabled 1, 0 resources PCI: 00:13.1: enabled 1, 0 resources PCI: 00:13.2: enabled 1, 0 resources PCI: 00:14.5: enabled 1, 0 resources PCI: 00:14.0: enabled 1, 0 resources I2C: 00:50: enabled 1, 0 resources I2C: 00:51: enabled 1, 0 resources I2C: 00:52: enabled 1, 0 resources I2C: 00:53: enabled 1, 0 resources PCI: 00:14.1: enabled 1, 0 resources PCI: 00:14.2: enabled 1, 0 resources PCI: 00:14.3: enabled 1, 0 resources PNP: 002e.0: enabled 0, 3 resources PNP: 002e.1: enabled 1, 2 resources PNP: 002e.2: enabled 0, 2 resources PNP: 002e.3: enabled 0, 2 resources PNP: 002e.4: enabled 0, 0 resources PNP: 002e.5: enabled 1, 3 resources PNP: 002e.6: enabled 1, 1 resources PNP: 002e.7: enabled 0, 0 resources PNP: 002e.8: enabled 0, 2 resources PNP: 002e.9: enabled 0, 1 resources PNP: 002e.a: enabled 0, 0 resources PCI: 00:14.4: enabled 1, 0 resources PCI: 00:18.1: enabled 1, 0 resources PCI: 00:18.2: enabled 1, 0 resources PCI: 00:18.3: enabled 1, 0 resources Mainboard MAHOGANY Enable. dev=0x00028330 mahogany_enable, TOP MEM: msr.lo = 0x40000000, msr.hi = 0x00000000 mahogany_enable, TOP MEM2: msr2.lo = 0x00000000, msr2.hi = 0x00000000 mahogany_enable: uma size 0x10000000, memory start 0x30000000 PCI: Using configuration type 1 APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 enabled PCI: 00:18.3 siblings=1 CPU: APIC: 00 enabled CPU: APIC: 01 enabled PCI: pci_scan_bus for bus 00 PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] enabled rs780_enable: dev=0002a5a8, VID_DID=0x96001022 Bus-0, Dev-0, Fun-0. enable_pcie_bar3() addr=e0000000,bus=0,devfn=40 gpp_sb_init nb_dev=0x0002a5a8, dev=0x0002c808, port=0x00000008 NB_PCI_REG04 = 6. NB_PCI_REG84 = 3000095. NB_PCI_REG4C = 52042. PCI: 00:00.0 [1022/9600] enabled PCI: 00:00.0 [1022/9600] enabled next_unitid: 0015 PCI: 00:14.0 PCI: 00:14.1 PCI: 00:14.2 PCI: 00:14.3 PCI: 00:14.4 HT: Left over static devices. Check your Config.lb PCI: pci_scan_bus for bus 00 rs780_enable: dev=0002a5a8, VID_DID=0x96001022 Bus-0, Dev-0, Fun-0. enable_pcie_bar3() gpp_sb_init nb_dev=0x0002a5a8, dev=0x0002c808, port=0x00000008 NB_PCI_REG04 = 6. NB_PCI_REG84 = 3000095. NB_PCI_REG4C = 52042. PCI: 00:00.0 [1022/9600] enabled rs780_enable: dev=0002a9f4, VID_DID=0x96021022 Bus-0, Dev-1, Fun-0. GC is accessible from now on. PCI: 00:01.0 [1022/9602] enabled rs780_enable: dev=0002ae40, VID_DID=0x96031022 Bus-0, Dev-2,3, Fun-0. enable=1 rs780_gfx_init, nb_dev=0x0002a5a8, dev=0x0002ae40, port=0x2. misc 28 = 541 rs780_gfx_init step5.9.12.1. rs780_gfx_init step5.9.12.3. rs780_gfx_init step5.9.12.9. rs780_gfx_init step1. rs780_gfx_init step2. device = 2 PcieLinkTraining port=2:lc current state=10203 Disabling static device: PCI: 00:02.0 rs780_enable: dev=0002b28c, VID_DID=0x960b1022 Bus-0, Dev-2,3, Fun-0. enable=1 rs780_gfx_init, nb_dev=0x0002a5a8, dev=0x0002b28c, port=0x3. misc 28 = 541 rs780_gfx_init step5.9.12.1. rs780_gfx_init step5.9.12.3. rs780_gfx_init step5.9.12.9. rs780_gfx_init step1. rs780_gfx_init step2. device = 3 PcieLinkTraining port=3:lc current state=10203 Disabling static device: PCI: 00:03.0 rs780_enable: dev=0002b6d8, VID_DID=0x96041022 Bus-0, Dev-4,5,6,7, Fun-0. enable=1 gpp_sb_init nb_dev=0x0002a5a8, dev=0x0002b6d8, port=0x00000004 PcieLinkTraining port=4:lc current state=10203 PcieTrainPort port=0x4 result=0 PCI: 00:04.0 subordinate bus PCI Express PCI: 00:04.0 [1022/9604] enabled rs780_enable: dev=0002bb24, VID_DID=0x96051022 Bus-0, Dev-4,5,6,7, Fun-0. enable=0 rs780_enable: dev=0002bf70, VID_DID=0x96061022 Bus-0, Dev-4,5,6,7, Fun-0. enable=0 rs780_enable: dev=0002c3bc, VID_DID=0x96071022 Bus-0, Dev-4,5,6,7, Fun-0. enable=0 rs780_enable: dev=0002c808, VID_DID=0xffffffff Bus-0, Dev-8, Fun-0. enable=0 disable_pcie_bar3() rs780_enable: dev=0002cc54, VID_DID=0x96081022 Bus-0, Dev-9, 10, Fun-0. enable=1 enable_pcie_bar3() gpp_sb_init nb_dev=0x0002a5a8, dev=0x0002cc54, port=0x00000009 PcieLinkTraining port=9:lc current state=a0b0f10 addr=e0000000,bus=0,devfn=48 PcieTrainPort reg=0x10000 PcieTrainPort port=0x9 result=1 PCI: 00:09.0 subordinate bus PCI Express PCI: 00:09.0 [1022/9608] enabled rs780_enable: dev=0002d0a0, VID_DID=0x96091022 Bus-0, Dev-9, 10, Fun-0. enable=1 enable_pcie_bar3() gpp_sb_init nb_dev=0x0002a5a8, dev=0x0002d0a0, port=0x0000000a PcieLinkTraining port=a:lc current state=10203 PcieTrainPort port=0xa result=0 PCI: 00:0a.0 subordinate bus PCI Express PCI: 00:0a.0 [1022/9609] enabled sb700_enable() PCI: 00:11.0 [1002/4390] enabled sb700_enable() PCI: 00:12.0 [1002/4397] enabled sb700_enable() PCI: 00:12.1 [1002/4398] enabled sb700_enable() PCI: 00:12.2 [1002/4396] enabled sb700_enable() PCI: 00:13.0 [1002/4397] enabled sb700_enable() PCI: 00:13.1 [1002/4398] enabled sb700_enable() PCI: 00:13.2 [1002/4396] enabled sb700_enable() PCI: 00:14.0 [1002/4385] enabled sb700_enable() PCI: 00:14.1 [1002/439c] enabled sb700_enable() PCI: 00:14.2 [1002/4383] enabled sb700_enable() PCI: 00:14.3 [1002/439d] enabled sb700_enable() PCI: 00:14.4 [1002/4384] enabled sb700_enable() PCI: 00:14.5 [1002/4399] enabled PCI: pci_scan_bus for bus 01 rs780_internal_gfx_enable dev = 0x0002d4f0, nb_dev = 0x0002a5a8. sysmem = 0_40000000 PCI: 01:05.0 [1002/9615] enabled PCI: pci_scan_bus returning with max=001 PCI: pci_scan_bus for bus 02 PCI: pci_scan_bus returning with max=002 PCI: pci_scan_bus for bus 03 PCI: 03:00.0 [10ec/8168] enabled PCI: pci_scan_bus returning with max=003 PCIe: tuning PCI: 03:00.0 PCI: pci_scan_bus for bus 04 PCI: pci_scan_bus returning with max=004 smbus: PCI: 00:14.0[0]->I2C: 01:50 enabled smbus: PCI: 00:14.0[0]->I2C: 01:51 enabled smbus: PCI: 00:14.0[0]->I2C: 01:52 enabled smbus: PCI: 00:14.0[0]->I2C: 01:53 enabled PNP: 002e.0 disabled PNP: 002e.1 enabled PNP: 002e.2 disabled PNP: 002e.3 disabled PNP: 002e.4 disabled PNP: 002e.5 enabled PNP: 002e.6 enabled PNP: 002e.7 disabled PNP: 002e.8 disabled PNP: 002e.9 disabled PNP: 002e.a disabled PCI: pci_scan_bus for bus 05 PCI: pci_scan_bus returning with max=005 PCI: pci_scan_bus returning with max=005 PCI: pci_scan_bus returning with max=005 done Setting up VGA for PCI: 01:05.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... APIC: 00 missing read_resources APIC: 01 missing read_resources VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device rs780_gfx_read_resources. PCI: 01:05.0 register 24(ffffffff), read-only ignoring it I2C: 01:50 missing read_resources I2C: 01:51 missing read_resources I2C: 01:52 missing read_resources I2C: 01:53 missing read_resources PNP: 002e.6 missing read_resources Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device links 1 child on link 0 Root Device APIC_CLUSTER: 0 links 1 child on link 0 APIC_CLUSTER: 0 APIC: 00 links 0 child on link 0 NULL APIC: 01 links 0 child on link 0 NULL PCI_DOMAIN: 0000 links 1 child on link 0 PCI_DOMAIN: 0000 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10 000000 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 inde x 10000100 PCI: 00:18.0 links 3 child on link 0 PCI: 00:18.0 PCI: 00:18.0 resource base c00003 size 0 align 0 gran 0 limit cfff00 flags 1 index 1b0 PCI: 00:18.0 resource base e00003 size 0 align 0 gran 0 limit efff00 flags 1 index 1b8 PCI: 00:18.0 resource base 3 size 0 align 0 gran 0 limit 1fff000 flags 1 index 1c0 PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 0 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 2 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80200 index 1 PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit ffffffff flags c0000200 index 4 PCI: 00:00.0 links 0 child on link 0 NULL PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flag s 201 index 1c PCI: 00:01.0 links 1 child on link 0 PCI: 00:01.0 PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit 1ffffff flags 80102 index 1c PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81202 index 24 PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 2 0 PCI: 01:05.0 links 0 child on link 0 NULL PCI: 01:05.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10 PCI: 01:05.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14 PCI: 01:05.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 200 inde x 18 PCI: 01:05.0 resource base fff00000 size 100 align 0 gran 0 limit 0 flags c0002200 ind ex 30 PCI: 00:02.0 links 0 child on link 0 NULL PCI: 00:03.0 links 0 child on link 0 NULL PCI: 00:04.0 links 1 child on link 0 NULL PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1 c PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 2 0 PCI: 00:05.0 links 0 child on link 0 NULL PCI: 00:06.0 links 0 child on link 0 NULL PCI: 00:07.0 links 0 child on link 0 NULL PCI: 00:08.0 links 0 child on link 0 NULL PCI: 00:09.0 links 1 child on link 0 PCI: 00:09.0 PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1 c PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 2 0 PCI: 03:00.0 links 0 child on link 0 NULL PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10 PCI: 03:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 2 01 index 18 PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 1201 index 20 PCI: 03:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 ind ex 30 PCI: 00:0a.0 links 1 child on link 0 NULL PCI: 00:0a.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1 c PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 2 0 PCI: 00:11.0 links 0 child on link 0 NULL PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 2 4 PCI: 00:12.0 links 0 child on link 0 NULL PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:12.1 links 0 child on link 0 NULL PCI: 00:12.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:12.2 links 0 child on link 0 NULL PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:13.0 links 0 child on link 0 NULL PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:13.1 links 0 child on link 0 NULL PCI: 00:13.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:13.2 links 0 child on link 0 NULL PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:14.0 links 1 child on link 0 PCI: 00:14.0 PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags 80000 200 index 74 PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags 80000100 index 9 0 I2C: 01:50 links 0 child on link 0 NULL I2C: 01:51 links 0 child on link 0 NULL I2C: 01:52 links 0 child on link 0 NULL I2C: 01:53 links 0 child on link 0 NULL PCI: 00:14.1 links 0 child on link 0 NULL PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 PCI: 00:14.2 links 0 child on link 0 NULL PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 20 1 index 10 PCI: 00:14.3 links 1 child on link 0 PCI: 00:14.3 PCI: 00:14.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 200 index a0 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 1000 0000 PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 i ndex 10000100 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 ind ex 3 PNP: 002e.0 links 0 child on link 0 NULL PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74 PNP: 002e.1 links 0 child on link 0 NULL PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.2 links 0 child on link 0 NULL PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 PNP: 002e.3 links 0 child on link 0 NULL PNP: 002e.3 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.3 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.4 links 0 child on link 0 NULL PNP: 002e.5 links 0 child on link 0 NULL PNP: 002e.5 resource base 60 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.5 resource base 64 size 8 align 3 gran 3 limit 7ff flags c0000100 index 62 PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.6 links 0 child on link 0 NULL PNP: 002e.6 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.7 links 0 child on link 0 NULL PNP: 002e.8 links 0 child on link 0 NULL PNP: 002e.8 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.8 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.9 links 0 child on link 0 NULL PNP: 002e.9 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.a links 0 child on link 0 NULL PCI: 00:14.4 links 1 child on link 0 NULL PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 2 4 PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 2 0 PCI: 00:14.5 links 0 child on link 0 NULL PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:18.1 links 0 child on link 0 NULL PCI: 00:18.2 links 0 child on link 0 NULL PCI: 00:18.3 links 0 child on link 0 NULL PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 inde x 94 skipping PNP: 002e.6@70 fixed resource, size=0! Setting resources... 0: mmio_basek=00300000, basek=00000300, limitk=00100000 PCI: 00:18.0 1c0 <- [0x0000001000 - 0x0000003fff] size 0x00003000 gran 0x0c io PCI: 00:18.0 1b0 <- [0x00e0000000 - 0x00f00fffff] size 0x10100000 gran 0x14 prefmem PCI: 00:18.0 1b8 <- [0x00c0000000 - 0x00d02fffff] size 0x10300000 gran 0x14 mem PCI: 00:18.0 1a8 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem PCI: 00:00.0 1c <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c mem64 PCI: 00:01.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io PCI: 00:01.0 24 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x14 bus 01 prefmem PCI: 00:01.0 20 <- [0x00d0000000 - 0x00d00fffff] size 0x00100000 gran 0x14 bus 01 mem PCI: 01:05.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem PCI: 01:05.0 14 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io PCI: 01:05.0 18 <- [0x00d0000000 - 0x00d000ffff] size 0x00010000 gran 0x10 mem PCI: 01:05.0 30 <- [0x00fff00000 - 0x00fff000ff] size 0x00000100 gran 0x00 romem PCI: 00:04.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io PCI: 00:04.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 02 prefmem PCI: 00:04.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 02 mem PCI: 00:09.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io PCI: 00:09.0 24 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 03 prefmem PCI: 00:09.0 20 <- [0x00d0100000 - 0x00d01fffff] size 0x00100000 gran 0x14 bus 03 mem PCI: 03:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io PCI: 03:00.0 18 <- [0x00d0120000 - 0x00d0120fff] size 0x00001000 gran 0x0c mem64 PCI: 03:00.0 20 <- [0x00f0000000 - 0x00f000ffff] size 0x00010000 gran 0x10 prefmem64 PCI: 03:00.0 30 <- [0x00d0100000 - 0x00d011ffff] size 0x00020000 gran 0x11 romem PCI: 00:0a.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io PCI: 00:0a.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 04 prefmem PCI: 00:0a.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 04 mem PCI: 00:11.0 10 <- [0x0000003020 - 0x0000003027] size 0x00000008 gran 0x03 io PCI: 00:11.0 14 <- [0x0000003040 - 0x0000003043] size 0x00000004 gran 0x02 io PCI: 00:11.0 18 <- [0x0000003028 - 0x000000302f] size 0x00000008 gran 0x03 io PCI: 00:11.0 1c <- [0x0000003044 - 0x0000003047] size 0x00000004 gran 0x02 io PCI: 00:11.0 20 <- [0x0000003000 - 0x000000300f] size 0x00000010 gran 0x04 io PCI: 00:11.0 24 <- [0x00d0209000 - 0x00d02093ff] size 0x00000400 gran 0x0a mem PCI: 00:12.0 10 <- [0x00d0204000 - 0x00d0204fff] size 0x00001000 gran 0x0c mem PCI: 00:12.1 10 <- [0x00d0205000 - 0x00d0205fff] size 0x00001000 gran 0x0c mem PCI: 00:12.2 10 <- [0x00d0209400 - 0x00d02094ff] size 0x00000100 gran 0x08 mem PCI: 00:13.0 10 <- [0x00d0206000 - 0x00d0206fff] size 0x00001000 gran 0x0c mem PCI: 00:13.1 10 <- [0x00d0207000 - 0x00d0207fff] size 0x00001000 gran 0x0c mem PCI: 00:13.2 10 <- [0x00d0209500 - 0x00d02095ff] size 0x00000100 gran 0x08 mem ERROR: PCI: 00:14.0 74 mem size: 0x0000001000 not assigned ERROR: PCI: 00:14.0 90 io size: 0x0000000010 not assigned PCI: 00:14.1 10 <- [0x0000003030 - 0x0000003037] size 0x00000008 gran 0x03 io PCI: 00:14.1 14 <- [0x0000003048 - 0x000000304b] size 0x00000004 gran 0x02 io PCI: 00:14.1 18 <- [0x0000003038 - 0x000000303f] size 0x00000008 gran 0x03 io PCI: 00:14.1 1c <- [0x000000304c - 0x000000304f] size 0x00000004 gran 0x02 io PCI: 00:14.1 20 <- [0x0000003010 - 0x000000301f] size 0x00000010 gran 0x04 io PCI: 00:14.2 10 <- [0x00d0200000 - 0x00d0203fff] size 0x00004000 gran 0x0e mem64 PCI: 00:14.3 a0 <- [0x00d0209600 - 0x00d0209600] size 0x00000001 gran 0x00 mem PCI: 00:14.3 03 <- [0x00fec00000 - 0x00fec00fff] size 0x00001000 gran 0x00 mem PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq PNP: 002e.5 60 <- [0x0000000060 - 0x0000000067] size 0x00000008 gran 0x03 io PNP: 002e.5 62 <- [0x0000000064 - 0x000000006b] size 0x00000008 gran 0x03 io PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq PNP: 002e.6 missing set_resources PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io PCI: 00:14.4 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 05 prefmem PCI: 00:14.4 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 05 mem PCI: 00:14.5 10 <- [0x00d0208000 - 0x00d0208fff] size 0x00001000 gran 0x0c mem PCI: 00:18.3 94 <- [0x00f4000000 - 0x00f7ffffff] size 0x04000000 gran 0x1a mem Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device links 1 child on link 0 Root Device APIC_CLUSTER: 0 links 1 child on link 0 APIC_CLUSTER: 0 APIC: 00 links 0 child on link 0 NULL APIC: 01 links 0 child on link 0 NULL PCI_DOMAIN: 0000 links 1 child on link 0 PCI_DOMAIN: 0000 PCI_DOMAIN: 0000 resource base 1000 size 3000 align 12 gran 0 limit ffff flags 40040100 i ndex 10000000 PCI_DOMAIN: 0000 resource base c0000000 size 38000000 align 28 gran 0 limit febfffff flag s 40040200 index 10000100 PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 1 0 PCI_DOMAIN: 0000 resource base c0000 size 3ff40000 align 0 gran 0 limit 0 flags e0004200 index 20 PCI: 00:18.0 links 3 child on link 0 PCI: 00:18.0 PCI: 00:18.0 resource base 1000 size 3000 align 12 gran 12 limit ffff flags 60080100 ind ex 1c0 PCI: 00:18.0 resource base e0000000 size 10100000 align 28 gran 20 limit febfffff flags 60081200 index 1b0 PCI: 00:18.0 resource base c0000000 size 10300000 align 28 gran 20 limit febfffff flags 60080200 index 1b8 PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit ffffffff flags e0000200 index 1a8 PCI: 00:00.0 links 0 child on link 0 NULL PCI: 00:00.0 resource base c0000000 size 10000000 align 28 gran 28 limit febfffff flags 60000201 index 1c PCI: 00:01.0 links 1 child on link 0 PCI: 00:01.0 PCI: 00:01.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 in dex 1c PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 20 limit febfffff flags 60081202 index 24 PCI: 00:01.0 resource base d0000000 size 100000 align 20 gran 20 limit febfffff flags 6 0080202 index 20 PCI: 01:05.0 links 0 child on link 0 NULL PCI: 01:05.0 resource base e0000000 size 10000000 align 28 gran 28 limit febfffff flag s 60001200 index 10 PCI: 01:05.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 inde x 14 PCI: 01:05.0 resource base d0000000 size 10000 align 16 gran 16 limit febfffff flags 6 0000200 index 18 PCI: 01:05.0 resource base fff00000 size 100 align 0 gran 0 limit 0 flags e0002200 ind ex 30 PCI: 00:02.0 links 0 child on link 0 NULL PCI: 00:03.0 links 0 child on link 0 NULL PCI: 00:04.0 links 1 child on link 0 NULL PCI: 00:04.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:04.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 600812 02 index 24 PCI: 00:04.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 600802 02 index 20 PCI: 00:05.0 links 0 child on link 0 NULL PCI: 00:06.0 links 0 child on link 0 NULL PCI: 00:07.0 links 0 child on link 0 NULL PCI: 00:08.0 links 0 child on link 0 NULL PCI: 00:09.0 links 1 child on link 0 PCI: 00:09.0 PCI: 00:09.0 resource base 2000 size 1000 align 12 gran 12 limit ffff flags 60080102 in dex 1c PCI: 00:09.0 resource base f0000000 size 100000 align 20 gran 20 limit febfffff flags 6 0081202 index 24 PCI: 00:09.0 resource base d0100000 size 100000 align 20 gran 20 limit febfffff flags 6 0080202 index 20 PCI: 03:00.0 links 0 child on link 0 NULL PCI: 03:00.0 resource base 2000 size 100 align 8 gran 8 limit ffff flags 60000100 inde x 10 PCI: 03:00.0 resource base d0120000 size 1000 align 12 gran 12 limit febfffff flags 60 000201 index 18 PCI: 03:00.0 resource base f0000000 size 10000 align 16 gran 16 limit febfffff flags 6 0001201 index 20 PCI: 03:00.0 resource base d0100000 size 20000 align 17 gran 17 limit febfffff flags 6 0002200 index 30 PCI: 00:0a.0 links 1 child on link 0 NULL PCI: 00:0a.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:0a.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 600812 02 index 24 PCI: 00:0a.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 600802 02 index 20 PCI: 00:11.0 links 0 child on link 0 NULL PCI: 00:11.0 resource base 3020 size 8 align 3 gran 3 limit ffff flags 60000100 index 1 0 PCI: 00:11.0 resource base 3040 size 4 align 2 gran 2 limit ffff flags 60000100 index 1 4 PCI: 00:11.0 resource base 3028 size 8 align 3 gran 3 limit ffff flags 60000100 index 1 8 PCI: 00:11.0 resource base 3044 size 4 align 2 gran 2 limit ffff flags 60000100 index 1 c PCI: 00:11.0 resource base 3000 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 PCI: 00:11.0 resource base d0209000 size 400 align 10 gran 10 limit febfffff flags 6000 0200 index 24 PCI: 00:12.0 links 0 child on link 0 NULL PCI: 00:12.0 resource base d0204000 size 1000 align 12 gran 12 limit febfffff flags 600 00200 index 10 PCI: 00:12.1 links 0 child on link 0 NULL PCI: 00:12.1 resource base d0205000 size 1000 align 12 gran 12 limit febfffff flags 600 00200 index 10 PCI: 00:12.2 links 0 child on link 0 NULL PCI: 00:12.2 resource base d0209400 size 100 align 8 gran 8 limit febfffff flags 600002 00 index 10 PCI: 00:13.0 links 0 child on link 0 NULL PCI: 00:13.0 resource base d0206000 size 1000 align 12 gran 12 limit febfffff flags 600 00200 index 10 PCI: 00:13.1 links 0 child on link 0 NULL PCI: 00:13.1 resource base d0207000 size 1000 align 12 gran 12 limit febfffff flags 600 00200 index 10 PCI: 00:13.2 links 0 child on link 0 NULL PCI: 00:13.2 resource base d0209500 size 100 align 8 gran 8 limit febfffff flags 600002 00 index 10 PCI: 00:14.0 links 1 child on link 0 PCI: 00:14.0 PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags 80000 200 index 74 PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags 80000100 index 9 0 I2C: 01:50 links 0 child on link 0 NULL I2C: 01:51 links 0 child on link 0 NULL I2C: 01:52 links 0 child on link 0 NULL I2C: 01:53 links 0 child on link 0 NULL PCI: 00:14.1 links 0 child on link 0 NULL PCI: 00:14.1 resource base 3030 size 8 align 3 gran 3 limit ffff flags 60000100 index 1 0 PCI: 00:14.1 resource base 3048 size 4 align 2 gran 2 limit ffff flags 60000100 index 1 4 PCI: 00:14.1 resource base 3038 size 8 align 3 gran 3 limit ffff flags 60000100 index 1 8 PCI: 00:14.1 resource base 304c size 4 align 2 gran 2 limit ffff flags 60000100 index 1 c PCI: 00:14.1 resource base 3010 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 PCI: 00:14.2 links 0 child on link 0 NULL PCI: 00:14.2 resource base d0200000 size 4000 align 14 gran 14 limit febfffff flags 600 00201 index 10 PCI: 00:14.3 links 1 child on link 0 PCI: 00:14.3 PCI: 00:14.3 resource base d0209600 size 1 align 0 gran 0 limit febfffff flags 60000200 index a0 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 1000 0000 PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 i ndex 10000100 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags e0000200 ind ex 3 PNP: 002e.0 links 0 child on link 0 NULL PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74 PNP: 002e.1 links 0 child on link 0 NULL PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 002e.2 links 0 child on link 0 NULL PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75 PNP: 002e.3 links 0 child on link 0 NULL PNP: 002e.3 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.3 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.4 links 0 child on link 0 NULL PNP: 002e.5 links 0 child on link 0 NULL PNP: 002e.5 resource base 60 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 002e.5 resource base 64 size 8 align 3 gran 3 limit 7ff flags e0000100 index 62 PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 002e.6 links 0 child on link 0 NULL PNP: 002e.6 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.7 links 0 child on link 0 NULL PNP: 002e.8 links 0 child on link 0 NULL PNP: 002e.8 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.8 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.9 links 0 child on link 0 NULL PNP: 002e.9 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 002e.a links 0 child on link 0 NULL PCI: 00:14.4 links 1 child on link 0 NULL PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:14.4 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 600812 02 index 24 PCI: 00:14.4 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 600802 02 index 20 PCI: 00:14.5 links 0 child on link 0 NULL PCI: 00:14.5 resource base d0208000 size 1000 align 12 gran 12 limit febfffff flags 600 00200 index 10 PCI: 00:18.1 links 0 child on link 0 NULL PCI: 00:18.2 links 0 child on link 0 NULL PCI: 00:18.3 links 0 child on link 0 NULL PCI: 00:18.3 resource base f4000000 size 4000000 align 26 gran 26 limit febfffff flags 6 0000200 index 94 Done allocating resources. Enabling resources... PCI: 00:18.0 cmd <- 00 PCI: 00:00.0 subsystem <- 1022/3050 PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 bridge ctrl <- 000b PCI: 00:01.0 cmd <- 07 PCI: 01:05.0 subsystem <- 1022/3050 PCI: 01:05.0 cmd <- 03 PCI: 00:04.0 bridge ctrl <- 0003 PCI: 00:04.0 cmd <- 00 PCI: 00:09.0 bridge ctrl <- 0003 PCI: 00:09.0 cmd <- 07 PCI: 03:00.0 cmd <- 03 PCI: 00:0a.0 bridge ctrl <- 0003 PCI: 00:0a.0 cmd <- 00 PCI: 00:11.0 cmd <- 03 PCI: 00:12.0 subsystem <- 1022/3050 PCI: 00:12.0 cmd <- 02 PCI: 00:12.1 subsystem <- 1022/3050 PCI: 00:12.1 cmd <- 02 PCI: 00:12.2 subsystem <- 1022/3050 PCI: 00:12.2 cmd <- 02 PCI: 00:13.0 subsystem <- 1022/3050 PCI: 00:13.0 cmd <- 02 PCI: 00:13.1 subsystem <- 1022/3050 PCI: 00:13.1 cmd <- 02 PCI: 00:13.2 subsystem <- 1022/3050 PCI: 00:13.2 cmd <- 02 PCI: 00:14.0 subsystem <- 1022/3050 PCI: 00:14.0 cmd <- 403 PCI: 00:14.1 subsystem <- 1022/3050 PCI: 00:14.1 cmd <- 01 PCI: 00:14.2 subsystem <- 1022/3050 PCI: 00:14.2 cmd <- 02 PCI: 00:14.3 subsystem <- 1022/3050 PCI: 00:14.3 cmd <- 0f sb700 lpc decode:PNP: 002e.1, base=0x000003f8, end=0x000003ff sb700 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000067 sb700 lpc decode:PNP: 002e.5, base=0x00000064, end=0x0000006b PNP: 002e.6 missing enable_resources PCI: 00:14.4 bridge ctrl <- 0003 PCI: 00:14.4 cmd <- 01 PCI: 00:14.5 subsystem <- 1022/3050 PCI: 00:14.5 cmd <- 02 PCI: 00:18.1 subsystem <- 1022/3050 PCI: 00:18.1 cmd <- 00 PCI: 00:18.2 subsystem <- 1022/3050 PCI: 00:18.2 cmd <- 00 PCI: 00:18.3 cmd <- 00 done. Initializing devices... Root Device init APIC_CLUSTER: 0 init Initializing CPU #0 CPU: vendor AMD device 60fb2 CPU: family 0f, model 6b, stepping 02 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 1024MB, type WB Setting variable MTRR 1, base: 1024MB, range: 256MB, type WB Setting variable MTRR 2, base: 768MB, range: 256MB, type UC DONE variable MTRRs Clear out the extra MTRR's MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled CPU model AMD Athlon(tm) 64 X2 Dual Core Processor 4200+ Setting up local apic... apic_id: 0x00 done. ECC Disabled CPU #0 initialized Initializing CPU #1 Waiting for 1 CPUS to stop CPU: vendor AMD device 60fb2 CPU: family 0f, model 6b, stepping 02 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 1024MB, type WB Setting variable MTRR 1, base: 1024MB, range: 256MB, type WB Setting variable MTRR 2, base: 768MB, range: 256MB, type UC DONE variable MTRRs Clear out the extra MTRR's MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled CPU model AMD Athlon(tm) 64 X2 Dual Core Processor 4200+ Setting up local apic... apic_id: 0x01 done. CPU #1 initialized All AP CPUs stopped PCI: 00:18.0 init PCI: 00:00.0 init pcie_init in rs780_ht.c PCI: 01:05.0 init internal_gfx_pci_dev_init device=9615, vendor=1002, vga_rom_address=0xfff00000. MEMCLK = 3 NB HT speed = 1c750660. CPU HT speed = 80750622. HT width = 11110020. On mainboard, rom address for PCI: 01:05.0 = fff00000 copying VGA ROM Image from fff00000 to 0xc0000, 0xec00 bytes entering emulator exited emulator PCI: 00:11.0 init No Primary Master SATA drive on Slot0 No Primary Slave SATA drive on Slot1 No Secondary Master SATA drive on Slot2 No Secondary Slave SATA drive on Slot3 PCI: 00:12.0 init PCI: 00:12.1 init PCI: 00:12.2 init usb2_bar0=d0209400 PCI: 00:13.0 init PCI: 00:13.1 init PCI: 00:13.2 init usb2_bar0=d0209500 PCI: 00:14.5 init PCI: 00:14.0 init sm_init(). lapicid = 0000000000000000 set power on after power fail ++++++++++no set NMI+++++ RTC Init sm_init() end PCI: 00:14.1 init On mainboard, rom address for PCI: 00:14.1 = 0 PCI: 00:14.2 init base = d0200000 codec_mask = 01 codec viddid: 10ec0888 Dev=PCI: 00:14.2 Default viddid=10ec0882 Reading viddid=10ec0888 No verb! PCI: 00:14.3 init PNP: 002e.1 init PNP: 002e.5 init Keyboard init... Keyboard controller output buffer result timeout Timeout while enabling keyboard. (No keyboard present?) Keyboard selftest failed ACK: 0xfe PCI: 00:14.4 init PCI: 00:18.1 init On mainboard, rom address for PCI: 00:18.1 = 0 PCI: 00:18.2 init On mainboard, rom address for PCI: 00:18.2 = 0 PCI: 00:18.3 init NB: Function 3 Misc Control.. done. PCI: 03:00.0 init On card, rom address for PCI: 03:00.0 = d0100000 Incorrect Expansion ROM Header Signature 0000 Devices initialized Show all devs...After init. Root Device: enabled 1, 0 resources APIC_CLUSTER: 0: enabled 1, 0 resources APIC: 00: enabled 1, 0 resources PCI_DOMAIN: 0000: enabled 1, 4 resources PCI: 00:18.0: enabled 1, 4 resources PCI: 00:00.0: enabled 1, 1 resources PCI: 00:01.0: enabled 1, 3 resources PCI: 01:05.0: enabled 1, 4 resources PCI: 00:02.0: enabled 0, 0 resources PCI: 00:03.0: enabled 0, 0 resources PCI: 00:04.0: enabled 1, 3 resources PCI: 00:05.0: enabled 0, 0 resources PCI: 00:06.0: enabled 0, 0 resources PCI: 00:07.0: enabled 0, 0 resources PCI: 00:08.0: enabled 0, 0 resources PCI: 00:09.0: enabled 1, 3 resources PCI: 00:0a.0: enabled 1, 3 resources PCI: 00:11.0: enabled 1, 6 resources PCI: 00:12.0: enabled 1, 1 resources PCI: 00:12.1: enabled 1, 1 resources PCI: 00:12.2: enabled 1, 1 resources PCI: 00:13.0: enabled 1, 1 resources PCI: 00:13.1: enabled 1, 1 resources PCI: 00:13.2: enabled 1, 1 resources PCI: 00:14.5: enabled 1, 1 resources PCI: 00:14.0: enabled 1, 2 resources I2C: 01:50: enabled 1, 0 resources I2C: 01:51: enabled 1, 0 resources I2C: 01:52: enabled 1, 0 resources I2C: 01:53: enabled 1, 0 resources PCI: 00:14.1: enabled 1, 5 resources PCI: 00:14.2: enabled 1, 1 resources PCI: 00:14.3: enabled 1, 4 resources PNP: 002e.0: enabled 0, 3 resources PNP: 002e.1: enabled 1, 2 resources PNP: 002e.2: enabled 0, 4 resources PNP: 002e.3: enabled 0, 2 resources PNP: 002e.4: enabled 0, 0 resources PNP: 002e.5: enabled 1, 3 resources PNP: 002e.6: enabled 1, 1 resources PNP: 002e.7: enabled 0, 0 resources PNP: 002e.8: enabled 0, 2 resources PNP: 002e.9: enabled 0, 1 resources PNP: 002e.a: enabled 0, 0 resources PCI: 00:14.4: enabled 1, 3 resources PCI: 00:18.1: enabled 1, 0 resources PCI: 00:18.2: enabled 1, 0 resources PCI: 00:18.3: enabled 1, 1 resources APIC: 01: enabled 1, 0 resources PCI: 03:00.0: enabled 1, 4 resources High Tables Base is 3fff0000. Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done. Writing IRQ routing tables to 0x3fff0000...write_pirq_routing_table done. ACPI: Writing ACPI tables at 3fff0400... ACPI: * HPET ACPI: added table 1/9 Length now 40 ACPI: * MADT ACPI: added table 2/9 Length now 44 ACPI: * SSDT processor_brand=AMD Athlon(tm) 64 X2 Dual Core Processor 4200+ Pstates Algorithm ... Pstate_freq[0] = 2200MHz Pstate_vid[0] = 18 Pstate_volt[0] = 1100mv Pstate_powe r[0] = 35000mw Pstate_freq[1] = 2000MHz Pstate_vid[1] = 20 Pstate_volt[1] = 1050mv Pstate_powe r[1] = 28991mw Pstate_freq[2] = 1000MHz Pstate_vid[2] = 22 Pstate_volt[2] = 1000mv Pstate_powe r[2] = 13148mw ACPI: added table 3/9 Length now 48 ACPI: * FACS ACPI: * DSDT ACPI: * DSDT @ 3fff0832 Length 27c8 ACPI: * FADT pm_base: 0x0800 ACPI: added table 4/9 Length now 52 ACPI: done. Wrote the mp table end at: 000f0440 - 000f0554 Wrote the mp table end at: 3fff3410 - 3fff3524 Moving GDT to 0x3fff3800...ok Multiboot Information structure has been written. Writing high table forward entry at 0x00000500 Wrote coreboot table at: 00000500 - 00000518 checksum 83df New low_table_end: 0x00000518 Now going to write high coreboot table at 0x3fff3c00 rom_table_end = 0x3fff3c00 Adjust low_table_end from 0x00000518 to 0x00001000 Adjust rom_table_end from 0x3fff3c00 to 0x40000000 Adding high table area uma_memory_start=0x30000000, uma_memory_size=0x0 Wrote coreboot table at: 3fff3c00 - 3fff3dfc checksum 60dc elfboot: Attempting to load payload. rom_stream: 0xfffc0000 - 0xfffdffff Found ELF candidate at offset 0 header_offset is 0 Try to load at offset 0x0 New segment addr 0x100000 size 0x39be50 offset 0xe0 filesize 0x14700 (cleaned up) New segment addr 0x100000 size 0x39be50 offset 0xe0 filesize 0x14700 New segment addr 0x49be50 size 0x48 offset 0x147e0 filesize 0x48 (cleaned up) New segment addr 0x49be50 size 0x48 offset 0x147e0 filesize 0x48 Dropping non PT_LOAD segment Dropping non PT_LOAD segment Dropping non PT_LOAD segment Loading Segment: addr: 0x0000000000100000 memsz: 0x000000000039be50 filesz: 0x0000000000014 700 Clearing Segment: addr: 0x0000000000114700 memsz: 0x0000000000387750 Loading Segment: addr: 0x000000000049be50 memsz: 0x0000000000000048 filesz: 0x0000000000000 048 Jumping to boot code at 0010008c FILO version 0.6.0 (baozheng@localhost.localdomain) Wed Jun 17 12:06:00 CST 2009 ERROR: No such CMOS option (boot_devices) menu: hda1:/etc/grub.conf IDE time outreset failed, but we may be on SATADrive 0 does not existDrive 0 does not existCould not open menu.lst file 'hda1:/etc/grub.conf'. Entering command line. FILO 0.6.0 [ Minimal BASH-like line editing is supported. For the first word, TAB lists possible command completions.] FILO 0.6.0 [ Minimal BASH-like line editing is supported. For the first word, TAB lists possible command completions.] filo>