Index: src/cpu/via/car/cache_as_ram.inc
===================================================================
--- src/cpu/via/car/cache_as_ram.inc	(revision 5113)
+++ src/cpu/via/car/cache_as_ram.inc	(working copy)
@@ -83,7 +83,13 @@
 	/* MTRRPhysBase */
 	movl	$0x202, %ecx
 	xorl	%edx, %edx
-	movl	$(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
+#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
+#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
+#else
+#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
+#endif
+	movl    $REAL_XIP_ROM_BASE, %eax
+	orl     $MTRR_TYPE_WRBACK, %eax
 	wrmsr
 
 	/* MTRRPhysMask */
Index: src/cpu/amd/mtrr/amd_earlymtrr.c
===================================================================
--- src/cpu/amd/mtrr/amd_earlymtrr.c	(revision 5113)
+++ src/cpu/amd/mtrr/amd_earlymtrr.c	(working copy)
@@ -42,10 +42,15 @@
         wrmsr(TOP_MEM, msr);
 
 #if defined(CONFIG_XIP_ROM_SIZE)
+#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
+#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
+#else
+#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
+#endif
         /* enable write through caching so we can do execute in place
          * on the flash rom.
          */
-        set_var_mtrr(1, CONFIG_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
+        set_var_mtrr(1, REAL_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
 #endif
 
         /* Set the default memory type and enable fixed and variable MTRRs 
Index: src/cpu/x86/mtrr/earlymtrr.c
===================================================================
--- src/cpu/x86/mtrr/earlymtrr.c	(revision 5113)
+++ src/cpu/x86/mtrr/earlymtrr.c	(working copy)
@@ -100,10 +100,15 @@
 	}
 
 #if defined(CONFIG_XIP_ROM_SIZE)
+#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
+#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
+#else
+#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
+#endif
 	/* enable write through caching so we can do execute in place
 	 * on the flash rom.
 	 */
-	set_var_mtrr(1, CONFIG_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
+	set_var_mtrr(1, REAL_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
 #endif
 
 	/* Set the default memory type and enable fixed and variable MTRRs 
Index: src/cpu/x86/car/cache_as_ram.inc
===================================================================
--- src/cpu/x86/car/cache_as_ram.inc	(revision 5113)
+++ src/cpu/x86/car/cache_as_ram.inc	(working copy)
@@ -200,12 +200,18 @@
 #endif /*  CONFIG_USE_FALLBACK_IMAGE == 1*/
 
 #if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE)
+#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
+#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
+#else
+#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
+#endif
 	/* enable write base caching so we can do execute in place
 	 * on the flash rom.
 	 */
 	movl	$0x202, %ecx
 	xorl	%edx, %edx
-	movl	$(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
+	movl    $REAL_XIP_ROM_BASE, %eax
+	orl     $MTRR_TYPE_WRBACK, %eax
 	wrmsr
 
 	movl	$0x203, %ecx
Index: src/arch/i386/init/car.S
===================================================================
--- src/arch/i386/init/car.S	(revision 5113)
+++ src/arch/i386/init/car.S	(working copy)
@@ -236,12 +236,18 @@
 	wrmsr
 
 #if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE)
+#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
+#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
+#else
+#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
+#endif
 	/* enable write base caching so we can do execute in place
 	 * on the flash rom.
 	 */
 	movl    $0x202, %ecx
 	xorl    %edx, %edx
-	movl    $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
+	movl    $REAL_XIP_ROM_BASE, %eax
+	orl     $MTRR_TYPE_WRBACK, %eax
 	wrmsr
 
 	movl    $0x203, %ecx
