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If the code gets a valid signed-off-by: <br>
<br>
<pre wrap="">Acked-by: Stefan Reinauer <a class="moz-txt-link-rfc2396E"
href="mailto:stepan@coresystems.de"><stepan@coresystems.de></a></pre>
<br>
On 3/22/10 1:20 PM, Jason Wang wrote:
<blockquote
cite="mid:df1430311003220520o253e4767oee3dfc8168594e62@mail.gmail.com"
type="cite">Index: src/southbridge/amd/rs690/rs690_early_setup.c<br>
===================================================================<br>
--- src/southbridge/amd/rs690/rs690_early_setup.c (revision 5266)<br>
+++ src/southbridge/amd/rs690/rs690_early_setup.c (working copy)<br>
@@ -128,7 +128,7 @@<br>
/*<br>
* Compliant with CIM_33's ATINB_PrepareInit<br>
*/<br>
-static void get_cpu_rev()<br>
+static void get_cpu_rev(void)<br>
{<br>
u32 eax, ebx, ecx, edx;<br>
__asm__ volatile ("cpuid":"=a" (eax), "=b"(ebx), "=c"(ecx),
"=d"(edx)<br>
@@ -171,7 +171,7 @@<br>
* Compliant with CIM_33's ATINB_HTInit<br>
* Init HT link speed/width for rs690 -- k8 link<br>
*****************************************/<br>
-static void rs690_htinit()<br>
+static void rs690_htinit(void)<br>
{<br>
/*<br>
* About HT, it has been done in enumerate_ht_chain().<br>
@@ -229,7 +229,7 @@<br>
* Function2: DRAM and HT technology Trace mode configuration<br>
* Function3: Miscellaneous configuration<br>
*******************************************************/<br>
-static void k8_optimization()<br>
+static void k8_optimization(void)<br>
{<br>
device_t k8_f0, k8_f2, k8_f3;<br>
msr_t msr;<br>
@@ -443,7 +443,7 @@<br>
}<br>
<br>
/* enable CFG access to Dev8, which is the SB P2P Bridge */<br>
-static void enable_rs690_dev8()<br>
+static void enable_rs690_dev8(void)<br>
{<br>
set_nbmisc_enable_bits(PCI_DEV(0, 0, 0), 0x00, 1 << 6, 1
<< 6);<br>
}<br>
@@ -453,14 +453,14 @@<br>
/*<br>
* Compliant with CIM_33's AtiNBInitEarlyPost (AtiInitNBBeforePCIInit).<br>
*/<br>
-static void rs690_before_pci_init()<br>
+static void rs690_before_pci_init(void)<br>
{<br>
}<br>
<br>
/*<br>
* The calling sequence is same as CIM.<br>
*/<br>
-static void rs690_early_setup()<br>
+static void rs690_early_setup(void)<br>
{<br>
device_t nb_dev = PCI_DEV(0, 0, 0);<br>
printk(BIOS_INFO, "rs690_early_setup()\n");<br>
Index: src/southbridge/amd/sb600/sb600_smbus.h<br>
===================================================================<br>
--- src/southbridge/amd/sb600/sb600_smbus.h (revision 5267)<br>
+++ src/southbridge/amd/sb600/sb600_smbus.h (working copy)<br>
@@ -58,5 +58,7 @@<br>
#define axindxp_reg(reg, mask, val) \<br>
alink_ax_indx(1, (reg), (mask), (val))<br>
<br>
+int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address);<br>
+int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8
val);<br>
<br>
#endif<br>
<br clear="all">
<br>
-- <br>
Wang Qing Pei <br>
<a moz-do-not-send="true" href="mailto:MSN%3Awangqingpei@hotmail.com"
target="_blank">MSN:wangqingpei@hotmail.com</a><br>
<a moz-do-not-send="true" href="mailto:Gmail%3Awangqingpei@gmail.com"
target="_blank">Gmail:wangqingpei@gmail.com</a><br>
Phone:86+13426369984<br>
</blockquote>
<br>
<br>
<pre class="moz-signature" cols="72">--
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