First, thank you all for your help, I wouldn't have known where to begin without it.<br />
<br />
Quoting Corey Osgood <corey.osgood@gmail.com>:<br />
> Please try the attached patch, and run memtest for a while (overnight<br />
> would probably be best), and let me/us know the results. If this seems<br />
> to correct the issue, then I'll work on a patch to initialize the<br />
> extra ranks.<br />
<br />
Okay, I applied the patch, the relevant output reads<br />
<br />
<div style="margin-left: 40px;">After reset status: 0040 <br />
ranks = 01, this is not the problem <br />
DIMM 0050 OFFSET 001f </div>
<br />
I rebuilt coreboot and it is running memtest right now. Here are a few pictures I took of the screen:<br />
<br />
<a href="http://dl.dropbox.com/u/7220270/memtest_just_starting.JPG">Memtest starts...</a><br />
<a href="http://dl.dropbox.com/u/7220270/memtest_pauses_halfway.JPG">Memtest pauses for several minutes at 7%...</a><br />
<a href="http://dl.dropbox.com/u/7220270/vga_breaks_after_17_percent.JPG">Memtest gets to 17%...</a><br />
<a href="http://dl.dropbox.com/u/7220270/vga_broken.JPG">The screen goes crazy and coreboot reboots.</a><br />
<br />
Here is part of the serial log, showing the jump to the payload: <br />
<br />
<div style="margin-left: 40px;">...<br />
Loaded segments <br />
Jumping to boot code at 10000 <br />
POST: 0xfe <br />
entry = 0x00010000 <br />
lb_start = 0x00004000 <br />
lb_size = 0x00020000 <br />
adjust = 0x3dfdc000 <br />
buffer = 0x3dfb6314 <br />
elf_boot_notes = 0x0001335c <br />
adjusted_boot_notes = 0x3dfef35c <br />
<br />
<br />
coreboot-4.0-r5682M Wed Aug 4 11:13:09 EDT 2010 starting... <br />
In romstage.c:main() <br />
After reset status: 0040 <br />
Waiting for SMBus to warm upDIMM 0050 OFFSET 0002 <br />
After reset status: 0040 <br />
Waiting until SMBus ready <br />
Waiting until SMBus ready <br />
Read: 0008 <br />
After reset status: 0040 <br />
.Done <br />
Enabling mainboard devices <br />
DIMM 0050 OFFSET 0005 <br />
After reset status: 0040 <br />
Waiting until SMBus ready <br />
Waiting until SMBus ready <br />
Read: 0000 <br />
After reset status: 0040 <br />
ranks = 01, this is not the problem <br />
DIMM 0050 OFFSET 001f <br />
After reset status: 0040 <br />
Waiting until SMBus ready <br />
Waiting until SMBus ready <br />
Read: 0001 <br />
After reset status: 0040 <br />
Found 1024MB of ram <br />
DIMM 0050 OFFSET 0011 <br />
After reset status: 0040 <br />
Waiting until SMBus ready <br />
...</div>
<br />
Notice that coreboot restarted in the middle. The screen does not change now, it's holding the broken colored pattern. It only restarted one time, which is at least different from the behavior with seabios or FILO, where it would keep restarting repeatedly. The final tail of the serial output is this:<br />
<br />
<br />
<div style="margin-left: 40px;">...<br />
Assigned: PCI: 00:0f.0 1c * [0x24b4 - 0x24b7] io <br />
PCI_DOMAIN: 0000 allocate_resources_io: next_base: 24b8 size: 14b8 align: 8 grae<br />
PCI_DOMAIN: 0000 allocate_resources_mem: base:feba0000 size:40500 align:17 granf<br />
Assigned: PCI: 00:09.0 30 * [0xfeba0000 - 0xfebbffff] mem <br />
Assigned: PCI: 00:0b.0 30 * [0xfebc0000 - 0xfebdffff] mem <br />
Assigned: PCI: 00:09.0 14 * [0xfebe0000 - 0xfebe00ff] mem <br />
Assigned: PCI: 00:0b.0 14 * [0xfebe0100 - 0xfebe01ff] mem <br />
Assigned: PCI: 00:10.4 10 * [0xfebe0200 - 0xfebe02ff] mem <br />
Assigned: PCI: 00:10.5 10 * [0xfebe0300 - 0xfebe03ff] mem <br />
Assigned: PCI: 00:12.0 14 * [0xfebe0400 - 0xfebe04ff] mem <br />
PCI_DOMAIN: 0000 allocate_resources_mem: next_base: febe0500 size: 40500 align:e<br />
Root Device assign_resources, bus 0 link: 0 <br />
Entering cn700 pci_domain_set_resources. <br />
Entering find_pci_tolm <br />
Leaving find_pci_tolm <br />
tomk is 0x100000 <br />
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 <br />
PCI: 00:09.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io <br />
PCI: 00:09.0 14 <- [0x00febe0000 - 0x00febe00ff] size 0x00000100 gran 0x08 mem <br />
PCI: 00:09.0 30 <- [0x00feba0000 - 0x00febbffff] size 0x00020000 gran 0x11 romem<br />
PCI: 00:0b.0 10 <- [0x0000001400 - 0x00000014ff] size 0x00000100 gran 0x08 io <br />
PCI: 00:0b.0 14 <- [0x00febe0100 - 0x00febe01ff] size 0x00000100 gran 0x08 mem <br />
PCI: 00:0b.0 30 <- [0x00febc0000 - 0x00febdffff] size 0x00020000 gran 0x11 romem<br />
PCI: 00:0f.0 10 <- [0x00000024a0 - 0x00000024a7] size 0x00000008 gran 0x03 io <br />
PCI: 00:0f.0 14 <- [0x00000024b0 - 0x00000024b3] size 0x00000004 gran 0x02 io <br />
PCI: 00:0f.0 18 <- [0x00000024a8 - 0x00000024af] size 0x00000008 gran 0x03 io <br />
PCI: 00:0f.0 1c <- [0x00000024b4 - 0x00000024b7] size 0x00000004 gran 0x02 io <br />
PCI: 00:0f.0 20 <- [0x0000002480 - 0x000000248f] size 0x00000010 gran 0x04 io <br />
PCI: 00:0f.0 24 <- [0x0000001800 - 0x00000018ff] size 0x00000100 gran 0x08 io <br />
PCI: 00:0f.1 20 <- [0x0000002490 - 0x000000249f] size 0x00000010 gran 0x04 io <br />
PCI: 00:10.0 20 <- [0x0000002400 - 0x000000241f] size 0x00000020 gran 0x05 io <br />
PCI: 00:10.1 20 <- [0x0000002420 - 0x000000243f] size 0x00000020 gran 0x05 io <br />
PCI: 00:10.2 20 <- [0x0000002440 - 0x000000245f] size 0x00000020 gran 0x05 io <br />
PCI: 00:10.3 20 <- [0x0000002460 - 0x000000247f] size 0x00000020 gran 0x05 io <br />
PCI: 00:10.4 10 <- [0x00febe0200 - 0x00febe02ff] size 0x00000100 gran 0x08 mem <br />
PCI: 00:10.5 10 <- [0x00febe0300 - 0x00febe03ff] size 0x00000100 gran 0x08 mem <br />
PCI: 00:11.0 assign_resources, bus 0 link: 0</div>
<br />
I'm attaching the whole log, also. <br />
<br />
<br />