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<DIV style="FONT-FAMILY: 'Calibri'; COLOR: #000000; FONT-SIZE: 12pt">
<DIV>I’m trying to use coreboot on my Asus M2V MX-SE, using Seabios as Payload.
I’ve disabled <FONT face=Times new roman>CONFIG_VGA_ROM_RUN and
CONFIG_PCI_ROM_RUN in the coreboot menu, as adviced at:</FONT></DIV>
<DIV><FONT face=Times></FONT> </DIV>
<DIV><A title=http://www.coreboot.org/SeaBIOS#coreboot
href="http://www.coreboot.org/SeaBIOS#coreboot">http://www.coreboot.org/SeaBIOS#coreboot</A></DIV>
<DIV><FONT face=Times></FONT> </DIV>
<DIV><FONT face=Times>Seabios seems working well, it loads Lilo and i can boot
my Slackware 13.1 64 bit, but after few seconds the monitor becomes blank, I
suppose while initializing the vga card (frame buffer?). So 'i’ve tried to
enable <FONT face=Calibri><FONT face=Times new roman>CONFIG_VGA_ROM_RUN and
CONFIG_PCI_ROM_RUN, but coreboot halts while calling the rom; this is the output
captured by the COM port:</FONT></FONT></FONT></DIV>
<DIV><FONT face=Times></FONT> </DIV>
<DIV><FONT face=Times></FONT> </DIV>
<DIV> </DIV>
<DIV> </DIV>
<DIV>coreboot-4.0-r5591M Tue Sep 28 15:00:06 CEST 2010 starting...</DIV>
<DIV>now booting... </DIV>
<DIV> </DIV>
<DIV> </DIV>
<DIV> </DIV>
<DIV>INIT detected from --- { APICID = 00 NODEID = 00 COREID = 00}
---</DIV>
<DIV> </DIV>
<DIV>Issuing SOFT_RESET...</DIV>
<DIV>Before set_bios_reset </DIV>
<DIV>Before set_bios_reset </DIV>
<DIV>Enter set_bios_reset</DIV>
<DIV>After pci_read_config32</DIV>
<DIV>After pci_write_config32</DIV>
<DIV>After set_bios_reset </DIV>
<DIV>soft reset </DIV>
<DIV> </DIV>
<DIV> </DIV>
<DIV>coreboot-4.0-r5591M Tue Sep 28 15:00:06 CEST 2010 starting...</DIV>
<DIV>now booting... </DIV>
<DIV>Enabling routing table for node 00 done.</DIV>
<DIV>Enabling UP settings</DIV>
<DIV>coherent_ht_finalize</DIV>
<DIV>done</DIV>
<DIV>core0 started: </DIV>
<DIV>now booting... All core 0 started</DIV>
<DIV>started ap apicid: </DIV>
<DIV> </DIV>
<DIV>coreboot-4.0-r5591M Tue Sep 28 15:00:06 CEST 2010 starting...</DIV>
<DIV>now booting... </DIV>
<DIV>* AP 01started</DIV>
<DIV> </DIV>
<DIV>SBLink=00</DIV>
<DIV>NC node|link=00</DIV>
<DIV>00entering optimize_link_incoherent_ht</DIV>
<DIV>sysinfo->link_pair_num=0x1</DIV>
<DIV>entering ht_optimize_link</DIV>
<DIV>pos=0x8a, unfiltered freq_cap=0x8075</DIV>
<DIV>pos=0x8a, filtered freq_cap=0x75</DIV>
<DIV>capping to 800/600/400/200 MHz</DIV>
<DIV>pos=0x6e, unfiltered freq_cap=0x75</DIV>
<DIV>pos=0x6e, filtered freq_cap=0x75</DIV>
<DIV>capping to 800/600/400/200 MHz</DIV>
<DIV>freq_cap1=0x75, freq_cap2=0x75</DIV>
<DIV>dev1 old_freq=0x0, freq=0x6, needs_reset=0x1</DIV>
<DIV>dev2 old_freq=0x0, freq=0x6, needs_reset=0x1</DIV>
<DIV>width_cap1=0x11, width_cap2=0x11</DIV>
<DIV>dev1 input ln_width1=0x4, ln_width2=0x4</DIV>
<DIV>dev1 input width=0x1</DIV>
<DIV>dev1 output ln_width1=0x4, ln_width2=0x4</DIV>
<DIV>dev1 input|output width=0x11</DIV>
<DIV>old dev1 input|output width=0x11</DIV>
<DIV>dev2 input|output width=0x11</DIV>
<DIV>old dev2 input|output width=0x11</DIV>
<DIV>after ht_optimize_link for link pair 0, reset_needed=0x1</DIV>
<DIV>after optimize_link_read_pointers_chain, reset_needed=0x1</DIV>
<DIV>01Debug: needs_reset 3</DIV>
<DIV>K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 06
VIA HT caps: 0075</DIV>
<DIV>01Debug: needs_reset 4</DIV>
<DIV>No config data specified, using default MAC!</DIV>
<DIV>Debug line 459</DIV>
<DIV>Debug line 480</DIV>
<DIV>Debug line 489</DIV>
<DIV>Debug: needs_reset 5</DIV>
<DIV>Debug: needs_reset 6</DIV>
<DIV>ht reset -</DIV>
<DIV>Before set_bios_reset </DIV>
<DIV>Before set_bios_reset </DIV>
<DIV>Enter set_bios_reset</DIV>
<DIV>After pci_read_config32</DIV>
<DIV>After pci_write_config32</DIV>
<DIV>After set_bios_reset </DIV>
<DIV>soft reset </DIV>
<DIV> </DIV>
<DIV> </DIV>
<DIV>coreboot-4.0-r5591M Tue Sep 28 15:00:06 CEST 2010 starting...</DIV>
<DIV>now booting... </DIV>
<DIV>Enabling routing table for node 00 done.</DIV>
<DIV>Enabling UP settings</DIV>
<DIV>coherent_ht_finalize</DIV>
<DIV>done</DIV>
<DIV>core0 started: </DIV>
<DIV>now booting... All core 0 started</DIV>
<DIV>started ap apicid: </DIV>
<DIV> </DIV>
<DIV>coreboot-4.0-r5591M Tue Sep 28 15:00:06 CEST 2010 starting...</DIV>
<DIV>now booting... </DIV>
<DIV>* AP 01started</DIV>
<DIV> </DIV>
<DIV>SBLink=00</DIV>
<DIV>NC node|link=00</DIV>
<DIV>00entering optimize_link_incoherent_ht</DIV>
<DIV>sysinfo->link_pair_num=0x1</DIV>
<DIV>entering ht_optimize_link</DIV>
<DIV>pos=0x8a, unfiltered freq_cap=0x8075</DIV>
<DIV>pos=0x8a, filtered freq_cap=0x75</DIV>
<DIV>capping to 800/600/400/200 MHz</DIV>
<DIV>pos=0x6e, unfiltered freq_cap=0x75</DIV>
<DIV>pos=0x6e, filtered freq_cap=0x75</DIV>
<DIV>capping to 800/600/400/200 MHz</DIV>
<DIV>freq_cap1=0x75, freq_cap2=0x75</DIV>
<DIV>dev1 old_freq=0x6, freq=0x6, needs_reset=0x0</DIV>
<DIV>dev2 old_freq=0x6, freq=0x6, needs_reset=0x0</DIV>
<DIV>width_cap1=0x11, width_cap2=0x11</DIV>
<DIV>dev1 input ln_width1=0x4, ln_width2=0x4</DIV>
<DIV>dev1 input width=0x1</DIV>
<DIV>dev1 output ln_width1=0x4, ln_width2=0x4</DIV>
<DIV>dev1 input|output width=0x11</DIV>
<DIV>old dev1 input|output width=0x11</DIV>
<DIV>dev2 input|output width=0x11</DIV>
<DIV>old dev2 input|output width=0x11</DIV>
<DIV>after ht_optimize_link for link pair 0, reset_needed=0x0</DIV>
<DIV>after optimize_link_read_pointers_chain, reset_needed=0x0</DIV>
<DIV>00K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq: 06
VIA HT caps: 0075</DIV>
<DIV>00after enable_fid_change</DIV>
<DIV>Ram1.00</DIV>
<DIV>setting up CPU 00 northbridge registers</DIV>
<DIV>done.</DIV>
<DIV>Ram2.00</DIV>
<DIV>sdram_set_spd_registers: paramx :000ced74</DIV>
<DIV>Device error</DIV>
<DIV>Device error</DIV>
<DIV>Device error</DIV>
<DIV>Unbuffered</DIV>
<DIV>400MHz</DIV>
<DIV>400MHz</DIV>
<DIV>RAM end at 0x00100000 kB</DIV>
<DIV>Ram3</DIV>
<DIV>Initializing memory: done</DIV>
<DIV>Setting variable MTRR 2, base: 0MB, range: 1024MB, type
WB</DIV>
<DIV>DQS Training:RcvrEn:Pass1: 00</DIV>
<DIV>CTLRMaxDelay=19</DIV>
<DIV>done</DIV>
<DIV>DQS Training:DQSPos: 00</DIV>
<DIV>TrainDQSRdWrPos: buf_a:000ce910</DIV>
<DIV>TrainDQSPos: MutualCSPassW[48] :000ce7f4</DIV>
<DIV>TrainDQSPos: MutualCSPassW[48] :000ce7f4</DIV>
<DIV>TrainDQSPos: MutualCSPassW[48] :000ce7f4</DIV>
<DIV>TrainDQSPos: MutualCSPassW[48] :000ce7f4</DIV>
<DIV>done</DIV>
<DIV>DQS Training:RcvrEn:Pass2: 00</DIV>
<DIV>CTLRMaxDelay=41</DIV>
<DIV>done</DIV>
<DIV>DQS SAVE NVRAM: c2000</DIV>
<DIV>Writing 113222 of size 4 to nvram pos: 0</DIV>
<DIV>Writing 15151515 of size 4 to nvram pos: 4</DIV>
<DIV>Writing 14151516 of size 4 to nvram pos: 8</DIV>
<DIV>Writing 15 of size 1 to nvram pos: 12</DIV>
<DIV>Writing 202520 of size 4 to nvram pos: 13</DIV>
<DIV>Writing 15151615 of size 4 to nvram pos: 17</DIV>
<DIV>Writing 14141515 of size 4 to nvram pos: 21</DIV>
<DIV>Writing 15 of size 1 to nvram pos: 25</DIV>
<DIV>Writing 30 of size 1 to nvram pos: 26</DIV>
<DIV>Writing 0 of size 1 to nvram pos: 27</DIV>
<DIV>Writing 0 of size 1 to nvram pos: 28</DIV>
<DIV>Writing 0 of size 1 to nvram pos: 29</DIV>
<DIV>Writing 111222 of size 4 to nvram pos: 30</DIV>
<DIV>Writing 0 of size 4 to nvram pos: 34</DIV>
<DIV>Writing 0 of size 4 to nvram pos: 38</DIV>
<DIV>Writing 0 of size 1 to nvram pos: 42</DIV>
<DIV>Writing 0 of size 4 to nvram pos: 43</DIV>
<DIV>Writing 2f2f2f2f of size 4 to nvram pos: 47</DIV>
<DIV>Writing 2f2f2f2f of size 4 to nvram pos: 51</DIV>
<DIV>Writing 0 of size 1 to nvram pos: 55</DIV>
<DIV>Writing 41 of size 1 to nvram pos: 56</DIV>
<DIV>Writing 0 of size 1 to nvram pos: 57</DIV>
<DIV>Writing 0 of size 1 to nvram pos: 58</DIV>
<DIV>Writing 0 of size 1 to nvram pos: 59</DIV>
<DIV>Writing 741080ab of size 4 to nvram pos: 60</DIV>
<DIV>DQS Training:tsc[00]=00000001734c2dc6</DIV>
<DIV>DQS Training:tsc[01]=0000000176143d6d</DIV>
<DIV>DQS Training:tsc[02]=0000000176143d76</DIV>
<DIV>DQS Training:tsc[03]=000000020d3f1994</DIV>
<DIV>DQS Training:tsc[04]=000000022b63a480</DIV>
<DIV>Ram4</DIV>
<DIV>v_esp=000cee48</DIV>
<DIV>testx = 5a5a5a5a</DIV>
<DIV>Copying data from cache to RAM -- switching to use RAM as stack...
Done</DIV>
<DIV>testx = 5a5a5a5a</DIV>
<DIV>Disabling cache as ram now </DIV>
<DIV>Clearing initial memory region: Done</DIV>
<DIV>Loading stage image.</DIV>
<DIV>Check CBFS header at fffffc6e</DIV>
<DIV>magic is 4f524243</DIV>
<DIV>Found CBFS header at fffffc6e</DIV>
<DIV>Check fallback/romstage</DIV>
<DIV>CBFS: follow chain: fff80000 + 38 + b885 + align -> fff8b8c0</DIV>
<DIV>Check fallback/coreboot_ram</DIV>
<DIV>Stage: loading fallback/coreboot_ram @ 0x100000 (524288 bytes), entry @
0x100000</DIV>
<DIV>Stage: done loading.</DIV>
<DIV>Jumping to image.</DIV>
<DIV>coreboot-4.0-r5591M Tue Sep 28 15:00:06 CEST 2010 booting...</DIV>
<DIV>Enumerating buses...</DIV>
<DIV>Show all devs...Before Device Enumeration.</DIV>
<DIV>Root Device: enabled 1</DIV>
<DIV>APIC_CLUSTER: 0: enabled 1</DIV>
<DIV>APIC: 00: enabled 1</DIV>
<DIV>PCI_DOMAIN: 0000: enabled 1</DIV>
<DIV>PCI: 00:18.0: enabled 1</DIV>
<DIV>PCI: 00:00.0: enabled 1</DIV>
<DIV>PCI: 00:0f.1: enabled 1</DIV>
<DIV>PCI: 00:11.0: enabled 1</DIV>
<DIV>I2C: 00:50: enabled 1</DIV>
<DIV>I2C: 00:51: enabled 1</DIV>
<DIV>I2C: 00:52: enabled 1</DIV>
<DIV>I2C: 00:53: enabled 1</DIV>
<DIV>PNP: 002e.0: enabled 1</DIV>
<DIV>PNP: 002e.1: enabled 1</DIV>
<DIV>PNP: 002e.2: enabled 0</DIV>
<DIV>PNP: 002e.3: enabled 1</DIV>
<DIV>PNP: 002e.4: enabled 1</DIV>
<DIV>PNP: 002e.5: enabled 0</DIV>
<DIV>PNP: 002e.6: enabled 0</DIV>
<DIV>PNP: 002e.7: enabled 0</DIV>
<DIV>PNP: 002e.8: enabled 0</DIV>
<DIV>PNP: 002e.9: enabled 0</DIV>
<DIV>PNP: 002e.a: enabled 0</DIV>
<DIV>PCI: 00:12.0: enabled 1</DIV>
<DIV>PCI: 00:13.0: enabled 1</DIV>
<DIV>PCI: 00:13.1: enabled 1</DIV>
<DIV>PCI: 00:18.1: enabled 1</DIV>
<DIV>PCI: 00:18.2: enabled 1</DIV>
<DIV>PCI: 00:18.3: enabled 1</DIV>
<DIV>Compare with tree...</DIV>
<DIV>Root Device: enabled 1</DIV>
<DIV>APIC_CLUSTER: 0: enabled 1</DIV>
<DIV> APIC: 00: enabled 1</DIV>
<DIV>PCI_DOMAIN: 0000: enabled 1</DIV>
<DIV> PCI: 00:18.0: enabled 1</DIV>
<DIV> PCI: 00:00.0: enabled 1</DIV>
<DIV> PCI: 00:0f.1: enabled 1</DIV>
<DIV> PCI: 00:11.0: enabled 1</DIV>
<DIV> I2C: 00:50: enabled 1</DIV>
<DIV> I2C: 00:51: enabled 1</DIV>
<DIV> I2C: 00:52: enabled 1</DIV>
<DIV> I2C: 00:53: enabled 1</DIV>
<DIV> PNP: 002e.0: enabled 1</DIV>
<DIV> PNP: 002e.1: enabled 1</DIV>
<DIV> PNP: 002e.2: enabled 0</DIV>
<DIV> PNP: 002e.3: enabled 1</DIV>
<DIV> PNP: 002e.4: enabled 1</DIV>
<DIV> PNP: 002e.5: enabled 0</DIV>
<DIV> PNP: 002e.6: enabled 0</DIV>
<DIV> PNP: 002e.7: enabled 0</DIV>
<DIV> PNP: 002e.8: enabled 0</DIV>
<DIV> PNP: 002e.9: enabled 0</DIV>
<DIV> PNP: 002e.a: enabled 0</DIV>
<DIV> PCI: 00:12.0: enabled 1</DIV>
<DIV> PCI: 00:13.0: enabled 1</DIV>
<DIV> PCI: 00:13.1: enabled 1</DIV>
<DIV> PCI: 00:18.1: enabled 1</DIV>
<DIV> PCI: 00:18.2: enabled 1</DIV>
<DIV> PCI: 00:18.3: enabled 1</DIV>
<DIV>scan_static_bus for Root Device</DIV>
<DIV>APIC_CLUSTER: 0 enabled</DIV>
<DIV>PCI_DOMAIN: 0000 enabled</DIV>
<DIV>APIC_CLUSTER: 0 scanning...</DIV>
<DIV> PCI: 00:18.3 siblings=1</DIV>
<DIV>CPU: APIC: 00 enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 00140000</DIV>
<DIV>malloc 00140000</DIV>
<DIV>CPU: APIC: 01 enabled</DIV>
<DIV>PCI_DOMAIN: 0000 scanning...</DIV>
<DIV>PCI: pci_scan_bus for bus 00</DIV>
<DIV>PCI: 00:18.0 [1022/1100] bus ops</DIV>
<DIV>PCI: 00:18.0 [1022/1100] enabled</DIV>
<DIV>PCI: 00:18.1 [1022/1101] enabled</DIV>
<DIV>PCI: 00:18.2 [1022/1102] enabled</DIV>
<DIV>PCI: 00:18.3 [1022/1103] ops</DIV>
<DIV>PCI: 00:18.3 [1022/1103] enabled</DIV>
<DIV>PCI: Using configuration type 1</DIV>
<DIV>PCI: 00:00.0 [1106/0336] ops</DIV>
<DIV>PCI: 00:00.0 [1106/0336] enabled</DIV>
<DIV>Capability: type 0x02 @ 0x80</DIV>
<DIV>Capability: type 0x01 @ 0x50</DIV>
<DIV>Capability: type 0x08 @ 0x60</DIV>
<DIV>flags: 0x0060</DIV>
<DIV>PCI: 00:00.0 count: 0003 static_count: 0014</DIV>
<DIV>PCI: 00:00.0 [1106/0336] enabled next_unitid: 0014</DIV>
<DIV>PCI: pci_scan_bus for bus 00</DIV>
<DIV>PCI: 00:00.0 [1106/0336] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 001400e4</DIV>
<DIV>malloc 001400e4</DIV>
<DIV>PCI: 00:00.1 [1106/1336] ops</DIV>
<DIV>PCI: 00:00.1 [1106/1336] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 001401c8</DIV>
<DIV>malloc 001401c8</DIV>
<DIV>PCI: 00:00.2 [1106/2336] ops</DIV>
<DIV>PCI: 00:00.2 [1106/2336] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 001402ac</DIV>
<DIV>malloc 001402ac</DIV>
<DIV>PCI: 00:00.3 [1106/3336] ops</DIV>
<DIV>PCI: 00:00.3 [1106/3336] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 00140390</DIV>
<DIV>malloc 00140390</DIV>
<DIV>PCI: 00:00.4 [1106/4336] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 00140474</DIV>
<DIV>malloc 00140474</DIV>
<DIV>PCI: 00:00.5 [1106/5336] ops</DIV>
<DIV>PCI: 00:00.5 [1106/5336] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 00140558</DIV>
<DIV>malloc 00140558</DIV>
<DIV>PCI: 00:00.6 [1106/6290] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 0014063c</DIV>
<DIV>malloc 0014063c</DIV>
<DIV>PCI: 00:00.7 [1106/7336] ops</DIV>
<DIV>PCI: 00:00.7 [1106/7336] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 00140720</DIV>
<DIV>malloc 00140720</DIV>
<DIV>PCI: 00:01.0 [1106/b188] bus ops</DIV>
<DIV>B188 device dump</DIV>
<DIV>00: 06 11 88 b1 07 00 30 02 00 00 04 06 00 00 01 00 </DIV>
<DIV>10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 20 02 </DIV>
<DIV>20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>30: 00 00 00 00 70 00 00 00 00 00 00 00 00 00 16 00 </DIV>
<DIV>40: 91 40 08 44 31 3a 88 b1 00 00 00 00 00 00 00 00 </DIV>
<DIV>50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>70: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>80: 0e 70 35 00 0b 0a 00 1f 00 00 00 00 28 00 00 00 </DIV>
<DIV>90: 80 00 00 00 00 08 01 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>b0: 80 63 08 00 00 00 00 00 00 00 1f c4 00 04 00 00 </DIV>
<DIV>c0: 08 00 0b ff 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>PCI: 00:01.0 [1106/b188] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 00140804</DIV>
<DIV>malloc 00140804</DIV>
<DIV>PCI: 00:02.0 [1106/a238] bus ops</DIV>
<DIV>Configuring PCIe PEG</DIV>
<DIV>00: 06 11 38 a2 00 00 10 00 00 00 04 06 00 00 01 00 </DIV>
<DIV>10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 </DIV>
<DIV>20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>30: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00 </DIV>
<DIV>40: 10 68 41 01 c1 0e 00 00 00 00 10 00 01 0d 10 00 </DIV>
<DIV>50: 00 00 01 21 60 00 00 00 00 00 48 00 00 00 00 00 </DIV>
<DIV>60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 </DIV>
<DIV>70: 05 dc 80 01 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>90: 00 00 00 00 00 00 00 00 0d 00 00 00 06 11 36 c3 </DIV>
<DIV>a0: 01 04 00 00 5c 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>b0: 0c 12 40 81 00 00 03 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>c0: 03 00 27 8a 44 44 44 44 44 44 44 44 00 00 00 00 </DIV>
<DIV>d0: 50 00 00 00 02 00 00 00 00 00 00 00 08 00 02 a8 </DIV>
<DIV>e0: 0c 07 81 9a f8 00 00 00 81 82 f8 00 00 00 00 00 </DIV>
<DIV>f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>00: 06 11 38 a2 00 00 10 00 00 00 04 06 00 00 01 00 </DIV>
<DIV>10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 </DIV>
<DIV>20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>30: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00 </DIV>
<DIV>40: 10 68 41 01 c1 0e 00 00 00 00 10 00 01 0d 10 00 </DIV>
<DIV>50: 00 00 01 21 60 00 00 00 00 00 48 00 00 00 00 00 </DIV>
<DIV>60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 </DIV>
<DIV>70: 05 dc 80 01 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>90: 00 00 00 00 00 00 00 00 0d 00 00 00 06 11 36 c3 </DIV>
<DIV>a0: 01 04 00 00 7c 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>b0: 0c f0 40 81 00 00 03 00 01 00 00 00 00 00 00 00 </DIV>
<DIV>c0: 03 00 27 8a 44 44 44 44 44 44 44 44 00 00 00 00 </DIV>
<DIV>d0: 50 00 00 00 02 00 00 00 00 00 00 00 08 00 02 a8 </DIV>
<DIV>e0: 0c 0b 81 9a f8 00 00 00 81 82 f8 00 00 00 00 00 </DIV>
<DIV>f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>PCI: 00:02.0 [1106/a238] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 001408e8</DIV>
<DIV>malloc 001408e8</DIV>
<DIV>PCI: 00:03.0 [1106/c238] bus ops</DIV>
<DIV>Configuring PCIe PEXs</DIV>
<DIV>00: 06 11 38 c2 00 00 10 00 00 00 04 06 00 00 01 00 </DIV>
<DIV>10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 </DIV>
<DIV>20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>30: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00 </DIV>
<DIV>40: 10 68 41 01 01 0e 00 00 00 00 10 00 11 0c 10 01 </DIV>
<DIV>50: 00 00 01 00 60 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 </DIV>
<DIV>70: 05 dc 80 01 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>90: 00 00 00 00 00 00 00 00 0d 00 00 00 06 11 36 d3 </DIV>
<DIV>a0: 01 04 00 00 5c 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>b0: 3b 59 40 81 00 00 03 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>c0: 03 00 27 00 44 44 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>d0: 50 00 00 00 02 00 00 00 00 00 00 00 08 00 02 a8 </DIV>
<DIV>e0: 00 0b 01 9a f8 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>00: 06 11 38 c2 00 00 10 00 00 00 04 06 00 00 01 00 </DIV>
<DIV>10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00 </DIV>
<DIV>20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>30: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00 </DIV>
<DIV>40: 10 68 41 01 01 0e 00 00 00 00 10 00 11 0c 10 01 </DIV>
<DIV>50: 00 00 01 00 60 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 </DIV>
<DIV>70: 05 dc 80 01 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>90: 00 00 00 00 00 00 00 00 0d 00 00 00 06 11 36 d3 </DIV>
<DIV>a0: 01 04 00 00 5c 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>b0: 3b f0 40 81 00 00 03 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>c0: 03 00 27 00 44 44 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>d0: 50 00 00 00 02 00 00 00 00 00 00 00 08 00 02 a8 </DIV>
<DIV>e0: 00 0b 01 9a f8 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>PCI: 00:03.0 [1106/c238] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 001409cc</DIV>
<DIV>malloc 001409cc</DIV>
<DIV>PCI: 00:0f.0 [1106/5372] ops</DIV>
<DIV>PCI: 00:0f.0 [1106/5372] enabled</DIV>
<DIV>PCI: 00:0f.1 [1106/0571] ops</DIV>
<DIV>PCI: 00:0f.1 [1106/0571] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 00140ab0</DIV>
<DIV>malloc 00140ab0</DIV>
<DIV>PCI: 00:10.0 [1106/3038] ops</DIV>
<DIV>PCI: 00:10.0 [1106/3038] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 00140b94</DIV>
<DIV>malloc 00140b94</DIV>
<DIV>PCI: 00:10.1 [1106/3038] ops</DIV>
<DIV>PCI: 00:10.1 [1106/3038] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 00140c78</DIV>
<DIV>malloc 00140c78</DIV>
<DIV>PCI: 00:10.2 [1106/3038] ops</DIV>
<DIV>PCI: 00:10.2 [1106/3038] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 00140d5c</DIV>
<DIV>malloc 00140d5c</DIV>
<DIV>PCI: 00:10.3 [1106/3038] ops</DIV>
<DIV>PCI: 00:10.3 [1106/3038] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 00140e40</DIV>
<DIV>malloc 00140e40</DIV>
<DIV>PCI: 00:10.4 [1106/3104] ops</DIV>
<DIV>PCI: 00:10.4 [1106/3104] enabled</DIV>
<DIV>PCI: 00:11.0 [1106/3372] bus ops</DIV>
<DIV>PCI: 00:11.0 [1106/3372] enabled</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 00140f24</DIV>
<DIV>malloc 00140f24</DIV>
<DIV>PCI: 00:11.7 [1106/287e] ops</DIV>
<DIV>PCI: 00:11.7 [1106/287e] enabled</DIV>
<DIV>PCI: 00:12.0 [1106/3065] ops</DIV>
<DIV>PCI: 00:12.0 [1106/3065] enabled</DIV>
<DIV>Capability: type 0x08 @ 0x60</DIV>
<DIV>Capability: type 0x0d @ 0x70</DIV>
<DIV>Capability: type 0x08 @ 0x60</DIV>
<DIV>Capability: type 0x08 @ 0x60</DIV>
<DIV>Capability: type 0x0d @ 0x70</DIV>
<DIV>Capability: type 0x08 @ 0x60</DIV>
<DIV>Capability: type 0x0d @ 0x70</DIV>
<DIV>PCI: 00:13.0 [1106/337b] enabled</DIV>
<DIV>Capability: type 0x08 @ 0x60</DIV>
<DIV>Capability: type 0x0d @ 0x70</DIV>
<DIV>Capability: type 0x08 @ 0x60</DIV>
<DIV>Capability: type 0x08 @ 0x60</DIV>
<DIV>Capability: type 0x0d @ 0x70</DIV>
<DIV>Capability: type 0x08 @ 0x60</DIV>
<DIV>Capability: type 0x0d @ 0x70</DIV>
<DIV>PCI: 00:13.1 [1106/337a] enabled</DIV>
<DIV>do_pci_scan_bridge for PCI: 00:01.0</DIV>
<DIV>PCI: pci_scan_bus for bus 01</DIV>
<DIV>PCI: pci_scan_bus returning with max=001</DIV>
<DIV>do_pci_scan_bridge returns max 1</DIV>
<DIV>do_pci_scan_bridge for PCI: 00:02.0</DIV>
<DIV>PCI: pci_scan_bus for bus 02</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 00141008</DIV>
<DIV>malloc 00141008</DIV>
<DIV>PCI: 02:00.0 [10de/0641] enabled</DIV>
<DIV>PCI: pci_scan_bus returning with max=002</DIV>
<DIV>Capability: type 0x01 @ 0x60</DIV>
<DIV>Capability: type 0x05 @ 0x68</DIV>
<DIV>Capability: type 0x10 @ 0x78</DIV>
<DIV>do_pci_scan_bridge returns max 2</DIV>
<DIV>do_pci_scan_bridge for PCI: 00:03.0</DIV>
<DIV>PCI: pci_scan_bus for bus 03</DIV>
<DIV>PCI: pci_scan_bus returning with max=003</DIV>
<DIV>do_pci_scan_bridge returns max 3</DIV>
<DIV>scan_static_bus for PCI: 00:11.0</DIV>
<DIV>smbus: PCI: 00:11.0[0]->I2C: 01:50 enabled</DIV>
<DIV>smbus: PCI: 00:11.0[0]->I2C: 01:51 enabled</DIV>
<DIV>smbus: PCI: 00:11.0[0]->I2C: 01:52 enabled</DIV>
<DIV>smbus: PCI: 00:11.0[0]->I2C: 01:53 enabled</DIV>
<DIV>malloc Enter, size 2560, free_mem_ptr 001410ec</DIV>
<DIV>malloc 001410ec</DIV>
<DIV>PNP: 002e.0 enabled</DIV>
<DIV>PNP: 002e.1 enabled</DIV>
<DIV>PNP: 002e.2 disabled</DIV>
<DIV>PNP: 002e.3 enabled</DIV>
<DIV>PNP: 002e.4 enabled</DIV>
<DIV>PNP: 002e.5 disabled</DIV>
<DIV>PNP: 002e.6 disabled</DIV>
<DIV>PNP: 002e.7 disabled</DIV>
<DIV>PNP: 002e.8 disabled</DIV>
<DIV>PNP: 002e.9 disabled</DIV>
<DIV>PNP: 002e.a disabled</DIV>
<DIV>scan_static_bus for PCI: 00:11.0 done</DIV>
<DIV>do_pci_scan_bridge for PCI: 00:13.0</DIV>
<DIV>PCI: pci_scan_bus for bus 04</DIV>
<DIV>malloc Enter, size 228, free_mem_ptr 00141aec</DIV>
<DIV>malloc 00141aec</DIV>
<DIV>PCI: 04:01.0 [1106/3288] enabled</DIV>
<DIV>PCI: pci_scan_bus returning with max=004</DIV>
<DIV>do_pci_scan_bridge returns max 4</DIV>
<DIV>do_pci_scan_bridge for PCI: 00:13.1</DIV>
<DIV>PCI: pci_scan_bus for bus 05</DIV>
<DIV>PCI: pci_scan_bus returning with max=005</DIV>
<DIV>do_pci_scan_bridge returns max 5</DIV>
<DIV>PCI: pci_scan_bus returning with max=005</DIV>
<DIV>PCI: pci_scan_bus returning with max=005</DIV>
<DIV>PCI_DOMAIN: 0000 passpw: enabled</DIV>
<DIV>scan_static_bus for Root Device done</DIV>
<DIV>done</DIV>
<DIV>Setting up VGA for PCI: 02:00.0</DIV>
<DIV>Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:02.0</DIV>
<DIV>Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0</DIV>
<DIV>Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000</DIV>
<DIV>Setting PCI_BRIDGE_CTL_VGA for bridge Root Device</DIV>
<DIV>Allocating resources...</DIV>
<DIV>Reading resources...</DIV>
<DIV>Root Device read_resources bus 0 link: 0</DIV>
<DIV>APIC_CLUSTER: 0 read_resources bus 0 link: 0</DIV>
<DIV>APIC: 00 missing read_resources</DIV>
<DIV>APIC: 01 missing read_resources</DIV>
<DIV>APIC_CLUSTER: 0 read_resources bus 0 link: 0 done</DIV>
<DIV>PCI_DOMAIN: 0000 read_resources bus 0 link: 0</DIV>
<DIV>VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device</DIV>
<DIV>PCI: 00:18.0 read_resources bus 0 link: 0</DIV>
<DIV>PCI: 00:01.0 read_resources bus 1 link: 0</DIV>
<DIV>PCI: 00:01.0 read_resources bus 1 link: 0 done</DIV>
<DIV>PCI: 00:02.0 read_resources bus 2 link: 0</DIV>
<DIV>PCI: 00:02.0 read_resources bus 2 link: 0 done</DIV>
<DIV>PCI: 00:03.0 read_resources bus 3 link: 0</DIV>
<DIV>PCI: 00:03.0 read_resources bus 3 link: 0 done</DIV>
<DIV>PCI: 00:11.0 read_resources bus 1 link: 0</DIV>
<DIV>I2C: 01:50 missing read_resources</DIV>
<DIV>I2C: 01:51 missing read_resources</DIV>
<DIV>I2C: 01:52 missing read_resources</DIV>
<DIV>I2C: 01:53 missing read_resources</DIV>
<DIV>PCI: 00:11.0 read_resources bus 1 link: 0 done</DIV>
<DIV>PCI: 00:13.0 read_resources bus 4 link: 0</DIV>
<DIV>PCI: 00:13.0 read_resources bus 4 link: 0 done</DIV>
<DIV>malloc Enter, size 2560, free_mem_ptr 00141bd0</DIV>
<DIV>malloc 00141bd0</DIV>
<DIV>PCI: 00:13.1 read_resources bus 5 link: 0</DIV>
<DIV>PCI: 00:13.1 read_resources bus 5 link: 0 done</DIV>
<DIV>PCI: 00:18.0 read_resources bus 0 link: 0 done</DIV>
<DIV>PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done</DIV>
<DIV>Root Device read_resources bus 0 link: 0 done</DIV>
<DIV>Done reading resources.</DIV>
<DIV>Show resources in subtree (Root Device)...After reading.</DIV>
<DIV>Root Device links 1 child on link 0 APIC_CLUSTER: 0</DIV>
<DIV> APIC_CLUSTER: 0 links 1 child on link 0 APIC: 00</DIV>
<DIV> APIC: 00 links 0 child on link 0 NULL</DIV>
<DIV> APIC: 01 links 0 child on link 0 NULL</DIV>
<DIV> PCI_DOMAIN: 0000 links 1 child on link 0 PCI: 00:18.0</DIV>
<DIV> PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff
flags 40040100 index 10000000</DIV>
<DIV> PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit
ffffffff flags 40040200 index 10000100</DIV>
<DIV> PCI: 00:18.0 links 1 child on link 0 PCI: 00:00.0</DIV>
<DIV> PCI: 00:18.0 resource base fc0003 size 0 align 0 gran 0 limit
ffff00 flags 1 index 1b8</DIV>
<DIV> PCI: 00:18.0 resource base 3 size 0 align 0 gran 0 limit
1fff000 flags 1 index 1c0</DIV>
<DIV> PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit
ffff flags 80100 index 0</DIV>
<DIV> PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit
ffffffffff flags 81200 index 2</DIV>
<DIV> PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit
ffffffff flags 80200 index 1</DIV>
<DIV> PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0
limit ffffffff flags c0000200 index 4</DIV>
<DIV> PCI: 00:00.0 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:00.0 resource base 0 size 10000000 align 28 gran
28 limit ffffffff flags 1200 index 10</DIV>
<DIV> PCI: 00:00.1 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:00.2 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:00.3 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:00.4 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:00.5 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:00.5 resource base fecc0000 size 100 align 8
gran 8 limit fecc00ff flags e0000200 index 40</DIV>
<DIV> PCI: 00:00.5 resource base 0 size 10000000 align 28 gran
28 limit ffffffff flags 200 index 61</DIV>
<DIV> PCI: 00:00.6 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:00.7 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:01.0 links 1 child on link 0 NULL</DIV>
<DIV> PCI: 00:01.0 resource base 0 size 0 align 12 gran 12
limit ffff flags 80102 index 1c</DIV>
<DIV> PCI: 00:01.0 resource base 0 size 0 align 20 gran 20
limit ffffffff flags 81202 index 24</DIV>
<DIV> PCI: 00:01.0 resource base 0 size 0 align 20 gran 20
limit ffffffff flags 80202 index 20</DIV>
<DIV> PCI: 00:02.0 links 1 child on link 0 PCI: 02:00.0</DIV>
<DIV> PCI: 00:02.0 resource base 0 size 0 align 12 gran 12
limit ffff flags 80102 index 1c</DIV>
<DIV> PCI: 00:02.0 resource base 0 size 0 align 20 gran 20
limit ffffffffffffffff flags 81202 index 24</DIV>
<DIV> PCI: 00:02.0 resource base 0 size 0 align 20 gran 20
limit ffffffff flags 80202 index 20</DIV>
<DIV> PCI: 02:00.0 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 02:00.0 resource base 0 size 1000000 align 24
gran 24 limit ffffffff flags 200 index 10</DIV>
<DIV> PCI: 02:00.0 resource base 0 size 10000000 align
28 gran 28 limit ffffffffffffffff flags 1201 index 14</DIV>
<DIV> PCI: 02:00.0 resource base 0 size 2000000 align 25
gran 25 limit ffffffffffffffff flags 201 index 1c</DIV>
<DIV> PCI: 02:00.0 resource base 0 size 80 align 7 gran
7 limit ffff flags 100 index 24</DIV>
<DIV> PCI: 02:00.0 resource base 0 size 80000 align 19
gran 19 limit ffffffff flags 2200 index 30</DIV>
<DIV> PCI: 00:03.0 links 1 child on link 0 NULL</DIV>
<DIV> PCI: 00:03.0 resource base 0 size 0 align 12 gran 12
limit ffff flags 80102 index 1c</DIV>
<DIV> PCI: 00:03.0 resource base 0 size 0 align 20 gran 20
limit ffffffffffffffff flags 81202 index 24</DIV>
<DIV> PCI: 00:03.0 resource base 0 size 0 align 20 gran 20
limit ffffffff flags 80202 index 20</DIV>
<DIV> PCI: 00:0f.0 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:0f.0 resource base 0 size 8 align 3 gran 3 limit
ffff flags 100 index 10</DIV>
<DIV> PCI: 00:0f.0 resource base 0 size 4 align 2 gran 2 limit
ffff flags 100 index 14</DIV>
<DIV> PCI: 00:0f.0 resource base 0 size 8 align 3 gran 3 limit
ffff flags 100 index 18</DIV>
<DIV> PCI: 00:0f.0 resource base 0 size 4 align 2 gran 2 limit
ffff flags 100 index 1c</DIV>
<DIV> PCI: 00:0f.0 resource base 0 size 10 align 4 gran 4
limit ffff flags 100 index 20</DIV>
<DIV> PCI: 00:0f.0 resource base 0 size 100 align 8 gran 8
limit ffff flags 100 index 24</DIV>
<DIV> PCI: 00:0f.1 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:0f.1 resource base 0 size 10 align 4 gran 4
limit ffff flags 100 index 20</DIV>
<DIV> PCI: 00:10.0 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:10.0 resource base 0 size 20 align 5 gran 5
limit ffff flags 100 index 20</DIV>
<DIV> PCI: 00:10.1 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:10.1 resource base 0 size 20 align 5 gran 5
limit ffff flags 100 index 20</DIV>
<DIV> PCI: 00:10.2 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:10.2 resource base 0 size 20 align 5 gran 5
limit ffff flags 100 index 20</DIV>
<DIV> PCI: 00:10.3 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:10.3 resource base 0 size 20 align 5 gran 5
limit ffff flags 100 index 20</DIV>
<DIV> PCI: 00:10.4 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:10.4 resource base 0 size 100 align 8 gran 8
limit ffffffff flags 200 index 10</DIV>
<DIV> PCI: 00:11.0 links 1 child on link 0 I2C: 01:50</DIV>
<DIV> PCI: 00:11.0 resource base 500 size 80 align 0 gran 0
limit ffff flags e0000100 index 88</DIV>
<DIV> PCI: 00:11.0 resource base 4d0 size 2 align 0 gran 0
limit ffff flags e0000100 index 3</DIV>
<DIV> PCI: 00:11.0 resource base 400 size 10 align 0 gran 0
limit ffff flags e0000100 index d0</DIV>
<DIV> PCI: 00:11.0 resource base fec00000 size 100 align 8
gran 8 limit ffffffff flags e0000200 index 44</DIV>
<DIV> PCI: 00:11.0 resource base 0 size 1000 align 0 gran 0
limit ffff flags c0000100 index 1</DIV>
<DIV> I2C: 01:50 links 0 child on link 0 NULL</DIV>
<DIV> I2C: 01:51 links 0 child on link 0 NULL</DIV>
<DIV> I2C: 01:52 links 0 child on link 0 NULL</DIV>
<DIV> I2C: 01:53 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.0 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.0 resource base 3f0 size 8 align 3 gran
3 limit fff flags c0000100 index 60</DIV>
<DIV> PNP: 002e.0 resource base 6 size 1 align 0 gran 0
limit 0 flags c0000400 index 70</DIV>
<DIV> PNP: 002e.0 resource base 2 size 1 align 0 gran 0
limit 0 flags c0000800 index 74</DIV>
<DIV> PNP: 002e.1 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.1 resource base 3f8 size 8 align 3 gran
3 limit fff flags c0000100 index 60</DIV>
<DIV> PNP: 002e.1 resource base 4 size 1 align 0 gran 0
limit 0 flags c0000400 index 70</DIV>
<DIV> PNP: 002e.2 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.2 resource base 2f8 size 8 align 3 gran
3 limit fff flags c0000100 index 60</DIV>
<DIV> PNP: 002e.2 resource base 3 size 1 align 0 gran 0
limit 0 flags c0000400 index 70</DIV>
<DIV> PNP: 002e.3 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.3 resource base 378 size 4 align 2 gran
2 limit fff flags c0000100 index 60</DIV>
<DIV> PNP: 002e.3 resource base 7 size 1 align 0 gran 0
limit 0 flags c0000400 index 70</DIV>
<DIV> PNP: 002e.3 resource base 0 size 1 align 0 gran 0
limit 0 flags 800 index 74</DIV>
<DIV> PNP: 002e.4 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.4 resource base 290 size 8 align 3 gran
3 limit fff flags c0000100 index 60</DIV>
<DIV> PNP: 002e.4 resource base 230 size 8 align 3 gran
3 limit fff flags c0000100 index 62</DIV>
<DIV> PNP: 002e.4 resource base 0 size 1 align 0 gran 0
limit 0 flags c0000400 index 70</DIV>
<DIV> PNP: 002e.5 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.5 resource base 0 size 1 align 0 gran 0
limit ffffffff flags 100 index 60</DIV>
<DIV> PNP: 002e.5 resource base 0 size 1 align 0 gran 0
limit ffffffff flags 100 index 62</DIV>
<DIV> PNP: 002e.5 resource base 0 size 1 align 0 gran 0
limit 0 flags 400 index 70</DIV>
<DIV> PNP: 002e.6 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.6 resource base 0 size 1 align 0 gran 0
limit 0 flags 400 index 70</DIV>
<DIV> PNP: 002e.7 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.7 resource base 0 size 1 align 0 gran 0
limit ffffffff flags 100 index 60</DIV>
<DIV> PNP: 002e.7 resource base 0 size 8 align 3 gran 3
limit fff flags 100 index 62</DIV>
<DIV> PNP: 002e.7 resource base 0 size 8 align 3 gran 3
limit fff flags 100 index 64</DIV>
<DIV> PNP: 002e.7 resource base 0 size 1 align 0 gran 0
limit 0 flags 400 index 70</DIV>
<DIV> PNP: 002e.8 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.8 resource base 0 size 8 align 3 gran 3
limit fff flags 100 index 60</DIV>
<DIV> PNP: 002e.8 resource base 0 size 1 align 0 gran 0
limit 0 flags 400 index 70</DIV>
<DIV> PNP: 002e.9 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.9 resource base 0 size 1 align 0 gran 0
limit ffffffff flags 100 index 60</DIV>
<DIV> PNP: 002e.a links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.a resource base 0 size 8 align 3 gran 3
limit fff flags 100 index 60</DIV>
<DIV> PNP: 002e.a resource base 0 size 1 align 0 gran 0
limit 0 flags 400 index 70</DIV>
<DIV> PCI: 00:11.7 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:12.0 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:12.0 resource base 0 size 100 align 8 gran 8
limit ffff flags 100 index 10</DIV>
<DIV> PCI: 00:12.0 resource base 0 size 100 align 8 gran 8
limit ffffffff flags 200 index 14</DIV>
<DIV> PCI: 00:13.0 links 1 child on link 0 PCI: 04:01.0</DIV>
<DIV> PCI: 00:13.0 resource base 0 size 0 align 12 gran 12
limit ffff flags 80102 index 1c</DIV>
<DIV> PCI: 00:13.0 resource base 0 size 0 align 20 gran 20
limit ffffffffffffffff flags 81202 index 24</DIV>
<DIV> PCI: 00:13.0 resource base 0 size 0 align 20 gran 20
limit ffffffff flags 80202 index 20</DIV>
<DIV> PCI: 04:01.0 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 04:01.0 resource base 0 size 4000 align 14
gran 14 limit ffffffffffffffff flags 201 index 10</DIV>
<DIV> PCI: 00:13.1 links 1 child on link 0 NULL</DIV>
<DIV> PCI: 00:13.1 resource base 0 size 0 align 12 gran 12
limit ffff flags 80102 index 1c</DIV>
<DIV> PCI: 00:13.1 resource base 0 size 0 align 20 gran 20
limit ffffffffffffffff flags 81202 index 24</DIV>
<DIV> PCI: 00:13.1 resource base 0 size 0 align 20 gran 20
limit ffffffff flags 80202 index 20</DIV>
<DIV> PCI: 00:18.1 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:18.2 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:18.3 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26
limit ffffffff flags 200 index 94</DIV>
<DIV>PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0
limit: ffff</DIV>
<DIV>PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
limit: ffff</DIV>
<DIV>PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
limit: ffff</DIV>
<DIV>PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
limit: ffff done</DIV>
<DIV>PCI: 00:02.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
limit: ffff</DIV>
<DIV>PCI: 02:00.0 24 * [0x0 - 0x7f] io</DIV>
<DIV>PCI: 00:02.0 compute_resources_io: base: 80 size: 1000 align: 12 gran: 12
limit: ffff done</DIV>
<DIV>PCI: 00:03.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
limit: ffff</DIV>
<DIV>PCI: 00:03.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
limit: ffff done</DIV>
<DIV>PCI: 00:13.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
limit: ffff</DIV>
<DIV>PCI: 00:13.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
limit: ffff done</DIV>
<DIV>PCI: 00:13.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
limit: ffff</DIV>
<DIV>PCI: 00:13.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
limit: ffff done</DIV>
<DIV>PCI: 00:02.0 1c * [0x0 - 0xfff] io</DIV>
<DIV>PCI: 00:0f.0 24 * [0x1000 - 0x10ff] io</DIV>
<DIV>PCI: 00:12.0 10 * [0x1400 - 0x14ff] io</DIV>
<DIV>PCI: 00:10.0 20 * [0x1800 - 0x181f] io</DIV>
<DIV>PCI: 00:10.1 20 * [0x1820 - 0x183f] io</DIV>
<DIV>PCI: 00:10.2 20 * [0x1840 - 0x185f] io</DIV>
<DIV>PCI: 00:10.3 20 * [0x1860 - 0x187f] io</DIV>
<DIV>PCI: 00:0f.0 20 * [0x1880 - 0x188f] io</DIV>
<DIV>PCI: 00:0f.1 20 * [0x1890 - 0x189f] io</DIV>
<DIV>PCI: 00:0f.0 10 * [0x18a0 - 0x18a7] io</DIV>
<DIV>PCI: 00:0f.0 18 * [0x18a8 - 0x18af] io</DIV>
<DIV>PCI: 00:0f.0 14 * [0x18b0 - 0x18b3] io</DIV>
<DIV>PCI: 00:0f.0 1c * [0x18b4 - 0x18b7] io</DIV>
<DIV>PCI: 00:18.0 compute_resources_io: base: 18b8 size: 2000 align: 12 gran: 12
limit: ffff done</DIV>
<DIV>PCI: 00:18.0 00 * [0x0 - 0x1fff] io</DIV>
<DIV>PCI_DOMAIN: 0000 compute_resources_io: base: 2000 size: 2000 align: 12
gran: 0 limit: ffff done</DIV>
<DIV>PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0
limit: ffffffff</DIV>
<DIV>PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffff</DIV>
<DIV>PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffff</DIV>
<DIV>PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffff done</DIV>
<DIV>PCI: 00:02.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff</DIV>
<DIV>PCI: 02:00.0 14 * [0x0 - 0xfffffff] prefmem</DIV>
<DIV>PCI: 00:02.0 compute_resources_prefmem: base: 10000000 size: 10000000
align: 28 gran: 20 limit: ffffffffffffffff done</DIV>
<DIV>PCI: 00:03.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff</DIV>
<DIV>PCI: 00:03.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff done</DIV>
<DIV>PCI: 00:13.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff</DIV>
<DIV>PCI: 00:13.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff done</DIV>
<DIV>PCI: 00:13.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff</DIV>
<DIV>PCI: 00:13.1 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffffffffffff done</DIV>
<DIV>PCI: 00:00.0 10 * [0x0 - 0xfffffff] prefmem</DIV>
<DIV>PCI: 00:02.0 24 * [0x10000000 - 0x1fffffff] prefmem</DIV>
<DIV>PCI: 00:18.0 compute_resources_prefmem: base: 20000000 size: 20000000
align: 28 gran: 20 limit: ffffffff done</DIV>
<DIV>PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffff</DIV>
<DIV>PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffff</DIV>
<DIV>PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffff done</DIV>
<DIV>PCI: 00:02.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffff</DIV>
<DIV>PCI: 02:00.0 1c * [0x0 - 0x1ffffff] mem</DIV>
<DIV>PCI: 02:00.0 10 * [0x2000000 - 0x2ffffff] mem</DIV>
<DIV>PCI: 02:00.0 30 * [0x3000000 - 0x307ffff] mem</DIV>
<DIV>PCI: 00:02.0 compute_resources_mem: base: 3080000 size: 3100000 align: 25
gran: 20 limit: ffffffff done</DIV>
<DIV>PCI: 00:03.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffff</DIV>
<DIV>PCI: 00:03.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffff done</DIV>
<DIV>PCI: 00:13.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffff</DIV>
<DIV>PCI: 04:01.0 10 * [0x0 - 0x3fff] mem</DIV>
<DIV>PCI: 00:13.0 compute_resources_mem: base: 4000 size: 100000 align: 20 gran:
20 limit: ffffffff done</DIV>
<DIV>PCI: 00:13.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffff</DIV>
<DIV>PCI: 00:13.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
limit: ffffffff done</DIV>
<DIV>PCI: 00:00.5 61 * [0x0 - 0xfffffff] mem</DIV>
<DIV>PCI: 00:02.0 20 * [0x10000000 - 0x130fffff] mem</DIV>
<DIV>PCI: 00:13.0 20 * [0x13100000 - 0x131fffff] mem</DIV>
<DIV>PCI: 00:10.4 10 * [0x13200000 - 0x132000ff] mem</DIV>
<DIV>PCI: 00:12.0 14 * [0x13200100 - 0x132001ff] mem</DIV>
<DIV>PCI: 00:18.0 compute_resources_mem: base: 13200200 size: 13300000 align: 28
gran: 20 limit: ffffffff done</DIV>
<DIV>PCI: 00:18.0 02 * [0x0 - 0x1fffffff] prefmem</DIV>
<DIV>PCI: 00:18.0 01 * [0x20000000 - 0x332fffff] mem</DIV>
<DIV>PCI: 00:18.3 94 * [0x34000000 - 0x37ffffff] mem</DIV>
<DIV>PCI_DOMAIN: 0000 compute_resources_mem: base: 38000000 size: 38000000
align: 28 gran: 0 limit: ffffffff done</DIV>
<DIV>avoid_fixed_resources: PCI_DOMAIN: 0000</DIV>
<DIV>avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff</DIV>
<DIV>avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff</DIV>
<DIV>constrain_resources: PCI_DOMAIN: 0000</DIV>
<DIV>constrain_resources: PCI: 00:18.0</DIV>
<DIV>constrain_resources: PCI: 00:00.0</DIV>
<DIV>constrain_resources: PCI: 00:00.1</DIV>
<DIV>constrain_resources: PCI: 00:00.2</DIV>
<DIV>constrain_resources: PCI: 00:00.3</DIV>
<DIV>constrain_resources: PCI: 00:00.4</DIV>
<DIV>constrain_resources: PCI: 00:00.5</DIV>
<DIV>constrain_resources: PCI: 00:00.6</DIV>
<DIV>constrain_resources: PCI: 00:00.7</DIV>
<DIV>constrain_resources: PCI: 00:01.0</DIV>
<DIV>constrain_resources: PCI: 00:02.0</DIV>
<DIV>constrain_resources: PCI: 02:00.0</DIV>
<DIV>constrain_resources: PCI: 00:03.0</DIV>
<DIV>constrain_resources: PCI: 00:0f.0</DIV>
<DIV>constrain_resources: PCI: 00:0f.1</DIV>
<DIV>constrain_resources: PCI: 00:10.0</DIV>
<DIV>constrain_resources: PCI: 00:10.1</DIV>
<DIV>constrain_resources: PCI: 00:10.2</DIV>
<DIV>constrain_resources: PCI: 00:10.3</DIV>
<DIV>constrain_resources: PCI: 00:10.4</DIV>
<DIV>constrain_resources: PCI: 00:11.0</DIV>
<DIV>constrain_resources: I2C: 01:50</DIV>
<DIV>constrain_resources: I2C: 01:51</DIV>
<DIV>constrain_resources: I2C: 01:52</DIV>
<DIV>constrain_resources: I2C: 01:53</DIV>
<DIV>constrain_resources: PNP: 002e.0</DIV>
<DIV>constrain_resources: PNP: 002e.1</DIV>
<DIV>constrain_resources: PNP: 002e.3</DIV>
<DIV>constrain_resources: PNP: 002e.4</DIV>
<DIV>constrain_resources: PCI: 00:11.7</DIV>
<DIV>constrain_resources: PCI: 00:12.0</DIV>
<DIV>constrain_resources: PCI: 00:13.0</DIV>
<DIV>constrain_resources: PCI: 04:01.0</DIV>
<DIV>constrain_resources: PCI: 00:13.1</DIV>
<DIV>constrain_resources: PCI: 00:18.1</DIV>
<DIV>constrain_resources: PCI: 00:18.2</DIV>
<DIV>constrain_resources: PCI: 00:18.3</DIV>
<DIV>avoid_fixed_resources2: PCI_DOMAIN: 0000@10000000 limit 0000ffff</DIV>
<DIV> lim->base 00001000 lim->limit 0000ffff</DIV>
<DIV>avoid_fixed_resources2: PCI_DOMAIN: 0000@10000100 limit ffffffff</DIV>
<DIV> lim->base 000c0000 lim->limit febfffff</DIV>
<DIV>Setting resources...</DIV>
<DIV>PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:2000 align:12 gran:0
limit:ffff</DIV>
<DIV>Assigned: PCI: 00:18.0 00 * [0x1000 - 0x2fff] io</DIV>
<DIV>PCI_DOMAIN: 0000 allocate_resources_io: next_base: 3000 size: 2000 align:
12 gran: 0 done</DIV>
<DIV>PCI: 00:18.0 allocate_resources_io: base:1000 size:2000 align:12 gran:12
limit:ffff</DIV>
<DIV>Assigned: PCI: 00:02.0 1c * [0x1000 - 0x1fff] io</DIV>
<DIV>Assigned: PCI: 00:0f.0 24 * [0x2000 - 0x20ff] io</DIV>
<DIV>Assigned: PCI: 00:12.0 10 * [0x2400 - 0x24ff] io</DIV>
<DIV>Assigned: PCI: 00:10.0 20 * [0x2800 - 0x281f] io</DIV>
<DIV>Assigned: PCI: 00:10.1 20 * [0x2820 - 0x283f] io</DIV>
<DIV>Assigned: PCI: 00:10.2 20 * [0x2840 - 0x285f] io</DIV>
<DIV>Assigned: PCI: 00:10.3 20 * [0x2860 - 0x287f] io</DIV>
<DIV>Assigned: PCI: 00:0f.0 20 * [0x2880 - 0x288f] io</DIV>
<DIV>Assigned: PCI: 00:0f.1 20 * [0x2890 - 0x289f] io</DIV>
<DIV>Assigned: PCI: 00:0f.0 10 * [0x28a0 - 0x28a7] io</DIV>
<DIV>Assigned: PCI: 00:0f.0 18 * [0x28a8 - 0x28af] io</DIV>
<DIV>Assigned: PCI: 00:0f.0 14 * [0x28b0 - 0x28b3] io</DIV>
<DIV>Assigned: PCI: 00:0f.0 1c * [0x28b4 - 0x28b7] io</DIV>
<DIV>PCI: 00:18.0 allocate_resources_io: next_base: 28b8 size: 2000 align: 12
gran: 12 done</DIV>
<DIV>PCI: 00:01.0 allocate_resources_io: base:ffff size:0 align:12 gran:12
limit:ffff</DIV>
<DIV>PCI: 00:01.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran:
12 done</DIV>
<DIV>PCI: 00:02.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12
limit:ffff</DIV>
<DIV>Assigned: PCI: 02:00.0 24 * [0x1000 - 0x107f] io</DIV>
<DIV>PCI: 00:02.0 allocate_resources_io: next_base: 1080 size: 1000 align: 12
gran: 12 done</DIV>
<DIV>PCI: 00:03.0 allocate_resources_io: base:ffff size:0 align:12 gran:12
limit:ffff</DIV>
<DIV>PCI: 00:03.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran:
12 done</DIV>
<DIV>PCI: 00:13.0 allocate_resources_io: base:ffff size:0 align:12 gran:12
limit:ffff</DIV>
<DIV>PCI: 00:13.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran:
12 done</DIV>
<DIV>PCI: 00:13.1 allocate_resources_io: base:ffff size:0 align:12 gran:12
limit:ffff</DIV>
<DIV>PCI: 00:13.1 allocate_resources_io: next_base: ffff size: 0 align: 12 gran:
12 done</DIV>
<DIV>PCI_DOMAIN: 0000 allocate_resources_mem: base:c0000000 size:38000000
align:28 gran:0 limit:febfffff</DIV>
<DIV>Assigned: PCI: 00:18.0 02 * [0xc0000000 - 0xdfffffff] prefmem</DIV>
<DIV>Assigned: PCI: 00:18.0 01 * [0xe0000000 - 0xf32fffff] mem</DIV>
<DIV>Assigned: PCI: 00:18.3 94 * [0xf4000000 - 0xf7ffffff] mem</DIV>
<DIV>PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f8000000 size: 38000000
align: 28 gran: 0 done</DIV>
<DIV>PCI: 00:18.0 allocate_resources_prefmem: base:c0000000 size:20000000
align:28 gran:20 limit:febfffff</DIV>
<DIV>Assigned: PCI: 00:00.0 10 * [0xc0000000 - 0xcfffffff] prefmem</DIV>
<DIV>Assigned: PCI: 00:02.0 24 * [0xd0000000 - 0xdfffffff] prefmem</DIV>
<DIV>PCI: 00:18.0 allocate_resources_prefmem: next_base: e0000000 size: 20000000
align: 28 gran: 20 done</DIV>
<DIV>PCI: 00:01.0 allocate_resources_prefmem: base:febfffff size:0 align:20
gran:20 limit:febfffff</DIV>
<DIV>PCI: 00:01.0 allocate_resources_prefmem: next_base: febfffff size: 0 align:
20 gran: 20 done</DIV>
<DIV>PCI: 00:02.0 allocate_resources_prefmem: base:d0000000 size:10000000
align:28 gran:20 limit:febfffff</DIV>
<DIV>Assigned: PCI: 02:00.0 14 * [0xd0000000 - 0xdfffffff] prefmem</DIV>
<DIV>PCI: 00:02.0 allocate_resources_prefmem: next_base: e0000000 size: 10000000
align: 28 gran: 20 done</DIV>
<DIV>PCI: 00:03.0 allocate_resources_prefmem: base:febfffff size:0 align:20
gran:20 limit:febfffff</DIV>
<DIV>PCI: 00:03.0 allocate_resources_prefmem: next_base: febfffff size: 0 align:
20 gran: 20 done</DIV>
<DIV>PCI: 00:13.0 allocate_resources_prefmem: base:febfffff size:0 align:20
gran:20 limit:febfffff</DIV>
<DIV>PCI: 00:13.0 allocate_resources_prefmem: next_base: febfffff size: 0 align:
20 gran: 20 done</DIV>
<DIV>PCI: 00:13.1 allocate_resources_prefmem: base:febfffff size:0 align:20
gran:20 limit:febfffff</DIV>
<DIV>PCI: 00:13.1 allocate_resources_prefmem: next_base: febfffff size: 0 align:
20 gran: 20 done</DIV>
<DIV>PCI: 00:18.0 allocate_resources_mem: base:e0000000 size:13300000 align:28
gran:20 limit:febfffff</DIV>
<DIV>Assigned: PCI: 00:00.5 61 * [0xe0000000 - 0xefffffff] mem</DIV>
<DIV>Assigned: PCI: 00:02.0 20 * [0xf0000000 - 0xf30fffff] mem</DIV>
<DIV>Assigned: PCI: 00:13.0 20 * [0xf3100000 - 0xf31fffff] mem</DIV>
<DIV>Assigned: PCI: 00:10.4 10 * [0xf3200000 - 0xf32000ff] mem</DIV>
<DIV>Assigned: PCI: 00:12.0 14 * [0xf3200100 - 0xf32001ff] mem</DIV>
<DIV>PCI: 00:18.0 allocate_resources_mem: next_base: f3200200 size: 13300000
align: 28 gran: 20 done</DIV>
<DIV>PCI: 00:01.0 allocate_resources_mem: base:febfffff size:0 align:20 gran:20
limit:febfffff</DIV>
<DIV>PCI: 00:01.0 allocate_resources_mem: next_base: febfffff size: 0 align: 20
gran: 20 done</DIV>
<DIV>PCI: 00:02.0 allocate_resources_mem: base:f0000000 size:3100000 align:25
gran:20 limit:febfffff</DIV>
<DIV>Assigned: PCI: 02:00.0 1c * [0xf0000000 - 0xf1ffffff] mem</DIV>
<DIV>Assigned: PCI: 02:00.0 10 * [0xf2000000 - 0xf2ffffff] mem</DIV>
<DIV>Assigned: PCI: 02:00.0 30 * [0xf3000000 - 0xf307ffff] mem</DIV>
<DIV>PCI: 00:02.0 allocate_resources_mem: next_base: f3080000 size: 3100000
align: 25 gran: 20 done</DIV>
<DIV>PCI: 00:03.0 allocate_resources_mem: base:febfffff size:0 align:20 gran:20
limit:febfffff</DIV>
<DIV>PCI: 00:03.0 allocate_resources_mem: next_base: febfffff size: 0 align: 20
gran: 20 done</DIV>
<DIV>PCI: 00:13.0 allocate_resources_mem: base:f3100000 size:100000 align:20
gran:20 limit:febfffff</DIV>
<DIV>Assigned: PCI: 04:01.0 10 * [0xf3100000 - 0xf3103fff] mem</DIV>
<DIV>PCI: 00:13.0 allocate_resources_mem: next_base: f3104000 size: 100000
align: 20 gran: 20 done</DIV>
<DIV>PCI: 00:13.1 allocate_resources_mem: base:febfffff size:0 align:20 gran:20
limit:febfffff</DIV>
<DIV>PCI: 00:13.1 allocate_resources_mem: next_base: febfffff size: 0 align: 20
gran: 20 done</DIV>
<DIV>Root Device assign_resources, bus 0 link: 0</DIV>
<DIV>0: mmio_basek=00300000, basek=00000300, limitk=00100000</DIV>
<DIV>PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0</DIV>
<DIV>amdk8_set_resource, enabling legacy VGA IO forwarding for PCI: 00:18.0 link
0x0</DIV>
<DIV>PCI: 00:18.0 1c0 <- [0x0000001000 - 0x0000002fff] size 0x00002000 gran
0x0c io <node 0 link 0></DIV>
<DIV>PCI: 00:18.0 1b8 <- [0x00c0000000 - 0x00dfffffff] size 0x20000000 gran
0x14 prefmem <node 0 link 0></DIV>
<DIV>PCI: 00:18.0 1b0 <- [0x00e0000000 - 0x00f32fffff] size 0x13300000 gran
0x14 mem <node 0 link 0></DIV>
<DIV>PCI: 00:18.0 1a8 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran
0x00 mem <node 0 link 0></DIV>
<DIV>PCI: 00:18.0 assign_resources, bus 0 link: 0</DIV>
<DIV>PCI: 00:00.0 10 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran
0x1c prefmem</DIV>
<DIV>PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran
0x0c bus 01 io</DIV>
<DIV>PCI: 00:01.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran
0x14 bus 01 prefmem</DIV>
<DIV>PCI: 00:01.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran
0x14 bus 01 mem</DIV>
<DIV>PCI: 00:02.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran
0x0c bus 02 io</DIV>
<DIV>PCI: 00:02.0 24 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran
0x14 bus 02 prefmem</DIV>
<DIV>PCI: 00:02.0 20 <- [0x00f0000000 - 0x00f30fffff] size 0x03100000 gran
0x14 bus 02 mem</DIV>
<DIV>PCI: 00:02.0 assign_resources, bus 2 link: 0</DIV>
<DIV>PCI: 02:00.0 10 <- [0x00f2000000 - 0x00f2ffffff] size 0x01000000 gran
0x18 mem</DIV>
<DIV>PCI: 02:00.0 14 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran
0x1c prefmem64</DIV>
<DIV>PCI: 02:00.0 1c <- [0x00f0000000 - 0x00f1ffffff] size 0x02000000 gran
0x19 mem64</DIV>
<DIV>PCI: 02:00.0 24 <- [0x0000001000 - 0x000000107f] size 0x00000080 gran
0x07 io</DIV>
<DIV>PCI: 02:00.0 30 <- [0x00f3000000 - 0x00f307ffff] size 0x00080000 gran
0x13 romem</DIV>
<DIV>PCI: 00:02.0 assign_resources, bus 2 link: 0</DIV>
<DIV>PCI: 00:03.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran
0x0c bus 03 io</DIV>
<DIV>PCI: 00:03.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran
0x14 bus 03 prefmem</DIV>
<DIV>PCI: 00:03.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran
0x14 bus 03 mem</DIV>
<DIV>PCI: 00:0f.0 10 <- [0x00000028a0 - 0x00000028a7] size 0x00000008 gran
0x03 io</DIV>
<DIV>PCI: 00:0f.0 14 <- [0x00000028b0 - 0x00000028b3] size 0x00000004 gran
0x02 io</DIV>
<DIV>PCI: 00:0f.0 18 <- [0x00000028a8 - 0x00000028af] size 0x00000008 gran
0x03 io</DIV>
<DIV>PCI: 00:0f.0 1c <- [0x00000028b4 - 0x00000028b7] size 0x00000004 gran
0x02 io</DIV>
<DIV>PCI: 00:0f.0 20 <- [0x0000002880 - 0x000000288f] size 0x00000010 gran
0x04 io</DIV>
<DIV>PCI: 00:0f.0 24 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran
0x08 io</DIV>
<DIV>PCI: 00:0f.1 20 <- [0x0000002890 - 0x000000289f] size 0x00000010 gran
0x04 io</DIV>
<DIV>PCI: 00:10.0 20 <- [0x0000002800 - 0x000000281f] size 0x00000020 gran
0x05 io</DIV>
<DIV>PCI: 00:10.1 20 <- [0x0000002820 - 0x000000283f] size 0x00000020 gran
0x05 io</DIV>
<DIV>PCI: 00:10.2 20 <- [0x0000002840 - 0x000000285f] size 0x00000020 gran
0x05 io</DIV>
<DIV>PCI: 00:10.3 20 <- [0x0000002860 - 0x000000287f] size 0x00000020 gran
0x05 io</DIV>
<DIV>PCI: 00:10.4 10 <- [0x00f3200000 - 0x00f32000ff] size 0x00000100 gran
0x08 mem</DIV>
<DIV>PCI: 00:11.0 assign_resources, bus 1 link: 0</DIV>
<DIV>PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran
0x03 io</DIV>
<DIV>PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran
0x00 irq</DIV>
<DIV>PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran
0x00 drq</DIV>
<DIV>PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran
0x03 io</DIV>
<DIV>PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran
0x00 irq</DIV>
<DIV>PNP: 002e.3 60 <- [0x0000000378 - 0x000000037b] size 0x00000004 gran
0x02 io</DIV>
<DIV>PNP: 002e.3 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran
0x00 irq</DIV>
<DIV>ERROR: PNP: 002e.3 74 drq size: 0x0000000001 not assigned</DIV>
<DIV>PNP: 002e.4 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran
0x03 io</DIV>
<DIV>PNP: 002e.4 62 <- [0x0000000230 - 0x0000000237] size 0x00000008 gran
0x03 io</DIV>
<DIV>PNP: 002e.4 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran
0x00 irq</DIV>
<DIV>PCI: 00:11.0 assign_resources, bus 1 link: 0</DIV>
<DIV>PCI: 00:12.0 10 <- [0x0000002400 - 0x00000024ff] size 0x00000100 gran
0x08 io</DIV>
<DIV>PCI: 00:12.0 14 <- [0x00f3200100 - 0x00f32001ff] size 0x00000100 gran
0x08 mem</DIV>
<DIV>PCI: 00:13.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran
0x0c bus 04 io</DIV>
<DIV>PCI: 00:13.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran
0x14 bus 04 prefmem</DIV>
<DIV>PCI: 00:13.0 20 <- [0x00f3100000 - 0x00f31fffff] size 0x00100000 gran
0x14 bus 04 mem</DIV>
<DIV>PCI: 00:13.0 assign_resources, bus 4 link: 0</DIV>
<DIV>PCI: 04:01.0 10 <- [0x00f3100000 - 0x00f3103fff] size 0x00004000 gran
0x0e mem64</DIV>
<DIV>PCI: 00:13.0 assign_resources, bus 4 link: 0</DIV>
<DIV>PCI: 00:13.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran
0x0c bus 05 io</DIV>
<DIV>PCI: 00:13.1 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran
0x14 bus 05 prefmem</DIV>
<DIV>PCI: 00:13.1 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran
0x14 bus 05 mem</DIV>
<DIV>PCI: 00:18.0 assign_resources, bus 0 link: 0</DIV>
<DIV>PCI: 00:18.3 94 <- [0x00f4000000 - 0x00f7ffffff] size 0x04000000 gran
0x1a mem <gart></DIV>
<DIV>PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0</DIV>
<DIV>Root Device assign_resources, bus 0 link: 0</DIV>
<DIV>Done setting resources.</DIV>
<DIV>Show resources in subtree (Root Device)...After assigning values.</DIV>
<DIV>Root Device links 1 child on link 0 APIC_CLUSTER: 0</DIV>
<DIV> APIC_CLUSTER: 0 links 1 child on link 0 APIC: 00</DIV>
<DIV> APIC: 00 links 0 child on link 0 NULL</DIV>
<DIV> APIC: 01 links 0 child on link 0 NULL</DIV>
<DIV> PCI_DOMAIN: 0000 links 1 child on link 0 PCI: 00:18.0</DIV>
<DIV> PCI_DOMAIN: 0000 resource base 1000 size 2000 align 12 gran 0 limit
ffff flags 40040100 index 10000000</DIV>
<DIV> PCI_DOMAIN: 0000 resource base c0000000 size 38000000 align 28 gran
0 limit febfffff flags 40040200 index 10000100</DIV>
<DIV> PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0
flags e0004200 index 10</DIV>
<DIV> PCI_DOMAIN: 0000 resource base c0000 size 3ff40000 align 0 gran 0
limit 0 flags e0004200 index 20</DIV>
<DIV> PCI: 00:18.0 links 1 child on link 0 PCI: 00:00.0</DIV>
<DIV> PCI: 00:18.0 resource base 1000 size 2000 align 12 gran 12
limit ffff flags 60080100 index 1c0</DIV>
<DIV> PCI: 00:18.0 resource base c0000000 size 20000000 align 28
gran 20 limit febfffff flags 60081200 index 1b8</DIV>
<DIV> PCI: 00:18.0 resource base e0000000 size 13300000 align 28
gran 20 limit febfffff flags 60080200 index 1b0</DIV>
<DIV> PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0
limit ffffffff flags e0000200 index 1a8</DIV>
<DIV> PCI: 00:00.0 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:00.0 resource base c0000000 size 10000000 align
28 gran 28 limit febfffff flags 60001200 index 10</DIV>
<DIV> PCI: 00:00.1 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:00.2 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:00.3 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:00.4 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:00.5 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:00.5 resource base fecc0000 size 100 align 8
gran 8 limit fecc00ff flags e0000200 index 40</DIV>
<DIV> PCI: 00:00.5 resource base e0000000 size 10000000 align
28 gran 28 limit febfffff flags 60000200 index 61</DIV>
<DIV> PCI: 00:00.6 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:00.7 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:01.0 links 1 child on link 0 NULL</DIV>
<DIV> PCI: 00:01.0 resource base ffff size 0 align 12 gran 12
limit ffff flags 60080102 index 1c</DIV>
<DIV> PCI: 00:01.0 resource base febfffff size 0 align 20 gran
20 limit febfffff flags 60081202 index 24</DIV>
<DIV> PCI: 00:01.0 resource base febfffff size 0 align 20 gran
20 limit febfffff flags 60080202 index 20</DIV>
<DIV> PCI: 00:02.0 links 1 child on link 0 PCI: 02:00.0</DIV>
<DIV> PCI: 00:02.0 resource base 1000 size 1000 align 12 gran
12 limit ffff flags 60080102 index 1c</DIV>
<DIV> PCI: 00:02.0 resource base d0000000 size 10000000 align
28 gran 20 limit febfffff flags 60081202 index 24</DIV>
<DIV> PCI: 00:02.0 resource base f0000000 size 3100000 align
25 gran 20 limit febfffff flags 60080202 index 20</DIV>
<DIV> PCI: 02:00.0 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 02:00.0 resource base f2000000 size 1000000
align 24 gran 24 limit febfffff flags 60000200 index 10</DIV>
<DIV> PCI: 02:00.0 resource base d0000000 size 10000000
align 28 gran 28 limit febfffff flags 60001201 index 14</DIV>
<DIV> PCI: 02:00.0 resource base f0000000 size 2000000
align 25 gran 25 limit febfffff flags 60000201 index 1c</DIV>
<DIV> PCI: 02:00.0 resource base 1000 size 80 align 7
gran 7 limit ffff flags 60000100 index 24</DIV>
<DIV> PCI: 02:00.0 resource base f3000000 size 80000
align 19 gran 19 limit febfffff flags 60002200 index 30</DIV>
<DIV> PCI: 00:03.0 links 1 child on link 0 NULL</DIV>
<DIV> PCI: 00:03.0 resource base ffff size 0 align 12 gran 12
limit ffff flags 60080102 index 1c</DIV>
<DIV> PCI: 00:03.0 resource base febfffff size 0 align 20 gran
20 limit febfffff flags 60081202 index 24</DIV>
<DIV> PCI: 00:03.0 resource base febfffff size 0 align 20 gran
20 limit febfffff flags 60080202 index 20</DIV>
<DIV> PCI: 00:0f.0 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:0f.0 resource base 28a0 size 8 align 3 gran 3
limit ffff flags 60000100 index 10</DIV>
<DIV> PCI: 00:0f.0 resource base 28b0 size 4 align 2 gran 2
limit ffff flags 60000100 index 14</DIV>
<DIV> PCI: 00:0f.0 resource base 28a8 size 8 align 3 gran 3
limit ffff flags 60000100 index 18</DIV>
<DIV> PCI: 00:0f.0 resource base 28b4 size 4 align 2 gran 2
limit ffff flags 60000100 index 1c</DIV>
<DIV> PCI: 00:0f.0 resource base 2880 size 10 align 4 gran 4
limit ffff flags 60000100 index 20</DIV>
<DIV> PCI: 00:0f.0 resource base 2000 size 100 align 8 gran 8
limit ffff flags 60000100 index 24</DIV>
<DIV> PCI: 00:0f.1 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:0f.1 resource base 2890 size 10 align 4 gran 4
limit ffff flags 60000100 index 20</DIV>
<DIV> PCI: 00:10.0 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:10.0 resource base 2800 size 20 align 5 gran 5
limit ffff flags 60000100 index 20</DIV>
<DIV> PCI: 00:10.1 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:10.1 resource base 2820 size 20 align 5 gran 5
limit ffff flags 60000100 index 20</DIV>
<DIV> PCI: 00:10.2 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:10.2 resource base 2840 size 20 align 5 gran 5
limit ffff flags 60000100 index 20</DIV>
<DIV> PCI: 00:10.3 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:10.3 resource base 2860 size 20 align 5 gran 5
limit ffff flags 60000100 index 20</DIV>
<DIV> PCI: 00:10.4 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:10.4 resource base f3200000 size 100 align 8
gran 8 limit febfffff flags 60000200 index 10</DIV>
<DIV> PCI: 00:11.0 links 1 child on link 0 I2C: 01:50</DIV>
<DIV> PCI: 00:11.0 resource base 500 size 80 align 0 gran 0
limit ffff flags e0000100 index 88</DIV>
<DIV> PCI: 00:11.0 resource base 4d0 size 2 align 0 gran 0
limit ffff flags e0000100 index 3</DIV>
<DIV> PCI: 00:11.0 resource base 400 size 10 align 0 gran 0
limit ffff flags e0000100 index d0</DIV>
<DIV> PCI: 00:11.0 resource base fec00000 size 100 align 8
gran 8 limit ffffffff flags e0000200 index 44</DIV>
<DIV> PCI: 00:11.0 resource base 0 size 1000 align 0 gran 0
limit ffff flags c0000100 index 1</DIV>
<DIV> I2C: 01:50 links 0 child on link 0 NULL</DIV>
<DIV> I2C: 01:51 links 0 child on link 0 NULL</DIV>
<DIV> I2C: 01:52 links 0 child on link 0 NULL</DIV>
<DIV> I2C: 01:53 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.0 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.0 resource base 3f0 size 8 align 3 gran
3 limit fff flags e0000100 index 60</DIV>
<DIV> PNP: 002e.0 resource base 6 size 1 align 0 gran 0
limit 0 flags e0000400 index 70</DIV>
<DIV> PNP: 002e.0 resource base 2 size 1 align 0 gran 0
limit 0 flags e0000800 index 74</DIV>
<DIV> PNP: 002e.1 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.1 resource base 3f8 size 8 align 3 gran
3 limit fff flags e0000100 index 60</DIV>
<DIV> PNP: 002e.1 resource base 4 size 1 align 0 gran 0
limit 0 flags e0000400 index 70</DIV>
<DIV> PNP: 002e.2 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.2 resource base 2f8 size 8 align 3 gran
3 limit fff flags c0000100 index 60</DIV>
<DIV> PNP: 002e.2 resource base 3 size 1 align 0 gran 0
limit 0 flags c0000400 index 70</DIV>
<DIV> PNP: 002e.3 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.3 resource base 378 size 4 align 2 gran
2 limit fff flags e0000100 index 60</DIV>
<DIV> PNP: 002e.3 resource base 7 size 1 align 0 gran 0
limit 0 flags e0000400 index 70</DIV>
<DIV> PNP: 002e.3 resource base 0 size 1 align 0 gran 0
limit 0 flags 800 index 74</DIV>
<DIV> PNP: 002e.4 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.4 resource base 290 size 8 align 3 gran
3 limit fff flags e0000100 index 60</DIV>
<DIV> PNP: 002e.4 resource base 230 size 8 align 3 gran
3 limit fff flags e0000100 index 62</DIV>
<DIV> PNP: 002e.4 resource base 0 size 1 align 0 gran 0
limit 0 flags e0000400 index 70</DIV>
<DIV> PNP: 002e.5 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.5 resource base 0 size 1 align 0 gran 0
limit ffffffff flags 100 index 60</DIV>
<DIV> PNP: 002e.5 resource base 0 size 1 align 0 gran 0
limit ffffffff flags 100 index 62</DIV>
<DIV> PNP: 002e.5 resource base 0 size 1 align 0 gran 0
limit 0 flags 400 index 70</DIV>
<DIV> PNP: 002e.6 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.6 resource base 0 size 1 align 0 gran 0
limit 0 flags 400 index 70</DIV>
<DIV> PNP: 002e.7 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.7 resource base 0 size 1 align 0 gran 0
limit ffffffff flags 100 index 60</DIV>
<DIV> PNP: 002e.7 resource base 0 size 8 align 3 gran 3
limit fff flags 100 index 62</DIV>
<DIV> PNP: 002e.7 resource base 0 size 8 align 3 gran 3
limit fff flags 100 index 64</DIV>
<DIV> PNP: 002e.7 resource base 0 size 1 align 0 gran 0
limit 0 flags 400 index 70</DIV>
<DIV> PNP: 002e.8 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.8 resource base 0 size 8 align 3 gran 3
limit fff flags 100 index 60</DIV>
<DIV> PNP: 002e.8 resource base 0 size 1 align 0 gran 0
limit 0 flags 400 index 70</DIV>
<DIV> PNP: 002e.9 links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.9 resource base 0 size 1 align 0 gran 0
limit ffffffff flags 100 index 60</DIV>
<DIV> PNP: 002e.a links 0 child on link 0 NULL</DIV>
<DIV> PNP: 002e.a resource base 0 size 8 align 3 gran 3
limit fff flags 100 index 60</DIV>
<DIV> PNP: 002e.a resource base 0 size 1 align 0 gran 0
limit 0 flags 400 index 70</DIV>
<DIV> PCI: 00:11.7 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:12.0 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:12.0 resource base 2400 size 100 align 8 gran 8
limit ffff flags 60000100 index 10</DIV>
<DIV> PCI: 00:12.0 resource base f3200100 size 100 align 8
gran 8 limit febfffff flags 60000200 index 14</DIV>
<DIV> PCI: 00:13.0 links 1 child on link 0 PCI: 04:01.0</DIV>
<DIV> PCI: 00:13.0 resource base ffff size 0 align 12 gran 12
limit ffff flags 60080102 index 1c</DIV>
<DIV> PCI: 00:13.0 resource base febfffff size 0 align 20 gran
20 limit febfffff flags 60081202 index 24</DIV>
<DIV> PCI: 00:13.0 resource base f3100000 size 100000 align 20
gran 20 limit febfffff flags 60080202 index 20</DIV>
<DIV> PCI: 04:01.0 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 04:01.0 resource base f3100000 size 4000
align 14 gran 14 limit febfffff flags 60000201 index 10</DIV>
<DIV> PCI: 00:13.1 links 1 child on link 0 NULL</DIV>
<DIV> PCI: 00:13.1 resource base ffff size 0 align 12 gran 12
limit ffff flags 60080102 index 1c</DIV>
<DIV> PCI: 00:13.1 resource base febfffff size 0 align 20 gran
20 limit febfffff flags 60081202 index 24</DIV>
<DIV> PCI: 00:13.1 resource base febfffff size 0 align 20 gran
20 limit febfffff flags 60080202 index 20</DIV>
<DIV> PCI: 00:18.1 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:18.2 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:18.3 links 0 child on link 0 NULL</DIV>
<DIV> PCI: 00:18.3 resource base f4000000 size 4000000 align 26 gran
26 limit febfffff flags 60000200 index 94</DIV>
<DIV>Done allocating resources.</DIV>
<DIV>Enabling resources...</DIV>
<DIV>PCI: 00:18.0 cmd <- 00</DIV>
<DIV>PCI: 00:00.0 cmd <- 02</DIV>
<DIV>PCI: 00:00.1 cmd <- 06</DIV>
<DIV>PCI: 00:00.2 cmd <- 06</DIV>
<DIV>PCI: 00:00.3 cmd <- 06</DIV>
<DIV>PCI: 00:00.4 cmd <- 06</DIV>
<DIV>PCI: 00:00.5 cmd <- 06</DIV>
<DIV>PCI: 00:00.6 cmd <- 06</DIV>
<DIV>PCI: 00:00.7 cmd <- 06</DIV>
<DIV>PCI: 00:01.0 bridge ctrl <- 0017</DIV>
<DIV>PCI: 00:01.0 cmd <- 04</DIV>
<DIV>PCI: 00:02.0 bridge ctrl <- 000b</DIV>
<DIV>PCI: 00:02.0 cmd <- 07</DIV>
<DIV>PCI: 02:00.0 cmd <- 03</DIV>
<DIV>PCI: 00:03.0 bridge ctrl <- 0003</DIV>
<DIV>PCI: 00:03.0 cmd <- 00</DIV>
<DIV>PCI: 00:0f.0 cmd <- 01</DIV>
<DIV>PCI: 00:0f.1 cmd <- 01</DIV>
<DIV>PCI: 00:10.0 cmd <- 01</DIV>
<DIV>PCI: 00:10.1 cmd <- 01</DIV>
<DIV>PCI: 00:10.2 cmd <- 01</DIV>
<DIV>PCI: 00:10.3 cmd <- 01</DIV>
<DIV>PCI: 00:10.4 cmd <- 02</DIV>
<DIV>PCI: 00:11.0 cmd <- 01</DIV>
<DIV>I2C: 01:50 missing enable_resources</DIV>
<DIV>I2C: 01:51 missing enable_resources</DIV>
<DIV>I2C: 01:52 missing enable_resources</DIV>
<DIV>I2C: 01:53 missing enable_resources</DIV>
<DIV>PCI: 00:11.7 cmd <- 00</DIV>
<DIV>PCI: 00:12.0 cmd <- 03</DIV>
<DIV>PCI: 00:13.0 bridge ctrl <- 0003</DIV>
<DIV>PCI: 00:13.0 cmd <- 07</DIV>
<DIV>PCI: 04:01.0 cmd <- 02</DIV>
<DIV>PCI: 00:13.1 bridge ctrl <- 0003</DIV>
<DIV>PCI: 00:13.1 cmd <- 01</DIV>
<DIV>PCI: 00:18.1 subsystem <- 1043/00</DIV>
<DIV>PCI: 00:18.1 cmd <- 00</DIV>
<DIV>PCI: 00:18.2 subsystem <- 1043/00</DIV>
<DIV>PCI: 00:18.2 cmd <- 00</DIV>
<DIV>PCI: 00:18.3 cmd <- 00</DIV>
<DIV>done.</DIV>
<DIV>Initializing devices...</DIV>
<DIV>Root Device init</DIV>
<DIV>APIC_CLUSTER: 0 init</DIV>
<DIV>start_eip=0x0000e000, offset=0x00100000, code_size=0x0000005b</DIV>
<DIV>Initializing CPU #0</DIV>
<DIV>CPU: vendor AMD device 60fb2</DIV>
<DIV>CPU: family 0f, model 6b, stepping 02</DIV>
<DIV>Enabling cache</DIV>
<DIV> </DIV>
<DIV>Setting fixed MTRRs(0-88) type: UC</DIV>
<DIV>Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM</DIV>
<DIV>Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM</DIV>
<DIV>DONE fixed MTRRs</DIV>
<DIV>Setting variable MTRR 0, base: 0MB, range: 1024MB, type
WB</DIV>
<DIV>ADDRESS_MASK_HIGH=0xff</DIV>
<DIV>Zero-sized MTRR range @0KB</DIV>
<DIV>DONE variable MTRRs</DIV>
<DIV>Clear out the extra MTRR's</DIV>
<DIV>call enable_var_mtrr()</DIV>
<DIV>Leave x86_setup_var_mtrrs</DIV>
<DIV> </DIV>
<DIV>MTRR check</DIV>
<DIV>Fixed MTRRs : Enabled</DIV>
<DIV>Variable MTRRs: Enabled</DIV>
<DIV> </DIV>
<DIV>CPU model AMD Athlon(tm) 64 X2 Dual Core Processor 5200+</DIV>
<DIV>Setting up local apic... apic_id: 0x00 done.</DIV>
<DIV>ECC Disabled</DIV>
<DIV>CPU #0 initialized</DIV>
<DIV>Asserting INIT.</DIV>
<DIV>Waiting for send to finish...</DIV>
<DIV>+Deasserting INIT.</DIV>
<DIV>Waiting for send to finish...</DIV>
<DIV>+#startup loops: 2.</DIV>
<DIV>Sending STARTUP #1 to 1.</DIV>
<DIV>After apic_write.</DIV>
<DIV>Initializing CPU #1</DIV>
<DIV>Startup point 1.</DIV>
<DIV>Waiting for send to finish...</DIV>
<DIV>+CPU: vendor AMD device 60fb2</DIV>
<DIV>Sending STARTUP #2 to 1.</DIV>
<DIV>After apic_write.</DIV>
<DIV>CPU: family 0f, model 6b, stepping 02</DIV>
<DIV>Startup point 1.</DIV>
<DIV>Waiting for send to finish...</DIV>
<DIV>+Enabling cache</DIV>
<DIV>After Startup.</DIV>
<DIV>Waiting for 1 CPUS to stop</DIV>
<DIV> </DIV>
<DIV>Setting fixed MTRRs(0-88) type: UC</DIV>
<DIV>Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM</DIV>
<DIV>Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM</DIV>
<DIV>DONE fixed MTRRs</DIV>
<DIV>Setting variable MTRR 0, base: 0MB, range: 1024MB, type
WB</DIV>
<DIV>ADDRESS_MASK_HIGH=0xff</DIV>
<DIV>Zero-sized MTRR range @0KB</DIV>
<DIV>DONE variable MTRRs</DIV>
<DIV>Clear out the extra MTRR's</DIV>
<DIV>call enable_var_mtrr()</DIV>
<DIV>Leave x86_setup_var_mtrrs</DIV>
<DIV> </DIV>
<DIV>MTRR check</DIV>
<DIV>Fixed MTRRs : Enabled</DIV>
<DIV>Variable MTRRs: Enabled</DIV>
<DIV> </DIV>
<DIV>CPU model AMD Athlon(tm) 64 X2 Dual Core Processor 5200+</DIV>
<DIV>Setting up local apic... apic_id: 0x01 done.</DIV>
<DIV>CPU #1 initialized</DIV>
<DIV>All AP CPUs stopped</DIV>
<DIV>PCI: 00:18.0 init</DIV>
<DIV>PCI: 00:00.0 init</DIV>
<DIV>PCI: 00:0f.1 init</DIV>
<DIV>Primary IDE interface enabled</DIV>
<DIV>Secondary IDE interface enabled</DIV>
<DIV>Enables in reg 0x40 read back as 0xf</DIV>
<DIV>Enables in reg 0x42 read back as 0x9</DIV>
<DIV>PCI: 00:11.0 init</DIV>
<DIV>RTC Init</DIV>
<DIV>RTC: Checksum invalid zeroing cmos</DIV>
<DIV>Invalid CMOS LB checksum</DIV>
<DIV>IOAPIC: Initializing IOAPIC at 0xfec00000</DIV>
<DIV>IOAPIC: Bootstrap Processor Local APIC = 00</DIV>
<DIV>IOAPIC: ID = 0x02</DIV>
<DIV>IOAPIC: 23 interrupts</DIV>
<DIV>IOAPIC: Enabling interrupts on FSB</DIV>
<DIV>IOAPIC: reg 0x00000000 value 0x00000000 0x00000700</DIV>
<DIV>IOAPIC: reg 0x00000001 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000002 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000003 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000004 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000005 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000006 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000007 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000008 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000009 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x0000000a value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x0000000b value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x0000000c value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x0000000d value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x0000000e value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x0000000f value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000010 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000011 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000012 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000013 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000014 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000015 value 0x00000000 0x00010000</DIV>
<DIV>IOAPIC: reg 0x00000016 value 0x00000000 0x00010000</DIV>
<DIV>Keyboard init...</DIV>
<DIV>Keyboard controller output buffer result timeout</DIV>
<DIV>00: 06 11 72 33 01 00 10 02 00 00 01 06 00 00 80 00 </DIV>
<DIV>10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>40: 44 7f f8 0b 00 00 10 00 0c 20 00 00 44 00 00 00 </DIV>
<DIV>50: c0 1d 09 00 00 00 00 00 43 80 00 0b 00 00 00 00 </DIV>
<DIV>60: 00 00 00 00 00 00 00 04 80 00 d0 fe 80 00 00 00 </DIV>
<DIV>70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>80: 20 84 59 00 b2 30 00 00 01 05 00 00 05 18 00 00 </DIV>
<DIV>90: 00 7f ff 88 a0 cc 07 02 00 bf 00 00 00 00 00 00 </DIV>
<DIV>a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>b0: 00 00 00 00 00 00 00 00 00 00 00 00 20 d0 fe 00 </DIV>
<DIV>c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>d0: 01 04 01 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>e0: 00 00 00 00 04 40 08 00 00 00 00 00 04 00 00 00 </DIV>
<DIV>f0: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>PNP: 002e.0 init</DIV>
<DIV>PNP: 002e.1 init</DIV>
<DIV>PNP: 002e.3 init</DIV>
<DIV>PNP: 002e.4 init</DIV>
<DIV>PCI: 00:18.1 init</DIV>
<DIV>Check CBFS header at fffffc6e</DIV>
<DIV>magic is 4f524243</DIV>
<DIV>Found CBFS header at fffffc6e</DIV>
<DIV>Check fallback/romstage</DIV>
<DIV>CBFS: follow chain: fff80000 + 38 + b885 + align -> fff8b8c0</DIV>
<DIV>Check fallback/coreboot_ram</DIV>
<DIV>CBFS: follow chain: fff8b8c0 + 38 + c97a + align -> fff98280</DIV>
<DIV>Check fallback/payload</DIV>
<DIV>CBFS: follow chain: fff98280 + 38 + 9dfb + align -> fffa20c0</DIV>
<DIV>Check </DIV>
<DIV>CBFS: follow chain: fffa20c0 + 28 + 5db86 + align -> fffffc80</DIV>
<DIV>CBFS: Could not find file pci1022,1101.rom</DIV>
<DIV>PCI: 00:18.2 init</DIV>
<DIV>Check CBFS header at fffffc6e</DIV>
<DIV>magic is 4f524243</DIV>
<DIV>Found CBFS header at fffffc6e</DIV>
<DIV>Check fallback/romstage</DIV>
<DIV>CBFS: follow chain: fff80000 + 38 + b885 + align -> fff8b8c0</DIV>
<DIV>Check fallback/coreboot_ram</DIV>
<DIV>CBFS: follow chain: fff8b8c0 + 38 + c97a + align -> fff98280</DIV>
<DIV>Check fallback/payload</DIV>
<DIV>CBFS: follow chain: fff98280 + 38 + 9dfb + align -> fffa20c0</DIV>
<DIV>Check </DIV>
<DIV>CBFS: follow chain: fffa20c0 + 28 + 5db86 + align -> fffffc80</DIV>
<DIV>CBFS: Could not find file pci1022,1102.rom</DIV>
<DIV>PCI: 00:18.3 init</DIV>
<DIV>NB: Function 3 Misc Control.. done.</DIV>
<DIV>PCI: 00:00.3 init</DIV>
<DIV>PCI: 00:00.4 init</DIV>
<DIV>Check CBFS header at fffffc6e</DIV>
<DIV>magic is 4f524243</DIV>
<DIV>Found CBFS header at fffffc6e</DIV>
<DIV>Check fallback/romstage</DIV>
<DIV>CBFS: follow chain: fff80000 + 38 + b885 + align -> fff8b8c0</DIV>
<DIV>Check fallback/coreboot_ram</DIV>
<DIV>CBFS: follow chain: fff8b8c0 + 38 + c97a + align -> fff98280</DIV>
<DIV>Check fallback/payload</DIV>
<DIV>CBFS: follow chain: fff98280 + 38 + 9dfb + align -> fffa20c0</DIV>
<DIV>Check </DIV>
<DIV>CBFS: follow chain: fffa20c0 + 28 + 5db86 + align -> fffffc80</DIV>
<DIV>CBFS: Could not find file pci1106,4336.rom</DIV>
<DIV>PCI: 00:00.6 init</DIV>
<DIV>Check CBFS header at fffffc6e</DIV>
<DIV>magic is 4f524243</DIV>
<DIV>Found CBFS header at fffffc6e</DIV>
<DIV>Check fallback/romstage</DIV>
<DIV>CBFS: follow chain: fff80000 + 38 + b885 + align -> fff8b8c0</DIV>
<DIV>Check fallback/coreboot_ram</DIV>
<DIV>CBFS: follow chain: fff8b8c0 + 38 + c97a + align -> fff98280</DIV>
<DIV>Check fallback/payload</DIV>
<DIV>CBFS: follow chain: fff98280 + 38 + 9dfb + align -> fffa20c0</DIV>
<DIV>Check </DIV>
<DIV>CBFS: follow chain: fffa20c0 + 28 + 5db86 + align -> fffffc80</DIV>
<DIV>CBFS: Could not find file pci1106,6290.rom</DIV>
<DIV>PCI: 00:00.7 init</DIV>
<DIV>PCI: 00:0f.0 init</DIV>
<DIV>Configuring VIA SATA controller</DIV>
<DIV>PCI: 00:10.0 init</DIV>
<DIV>PCI: 00:10.1 init</DIV>
<DIV>PCI: 00:10.2 init</DIV>
<DIV>PCI: 00:10.3 init</DIV>
<DIV>PCI: 00:10.4 init</DIV>
<DIV>PCI: 00:11.7 init</DIV>
<DIV>00: 06 11 7e 28 00 00 10 22 00 00 00 06 00 00 00 00 </DIV>
<DIV>10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 7e 33 </DIV>
<DIV>30: 00 00 00 00 58 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>40: f4 24 00 80 82 00 00 00 a3 3b 88 80 82 44 00 43 </DIV>
<DIV>50: 00 03 33 01 00 04 01 40 08 00 01 80 00 00 00 00 </DIV>
<DIV>60: 00 ff ff 30 30 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>70: c2 c8 ee 01 3c 0f 50 48 01 00 00 00 77 00 12 12 </DIV>
<DIV>80: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>a0: fd 3f df 00 00 00 00 e0 00 00 00 00 00 00 00 00 </DIV>
<DIV>b0: 00 00 00 00 00 00 00 60 68 88 88 89 00 03 00 00 </DIV>
<DIV>c0: 01 00 02 00 00 00 00 00 0c 20 00 00 00 00 00 00 </DIV>
<DIV>d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>e0: 00 00 00 00 00 00 39 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 </DIV>
<DIV>PCI: 02:00.0 init</DIV>
<DIV>Check CBFS header at fffffc6e</DIV>
<DIV>magic is 4f524243</DIV>
<DIV>Found CBFS header at fffffc6e</DIV>
<DIV>Check fallback/romstage</DIV>
<DIV>CBFS: follow chain: fff80000 + 38 + b885 + align -> fff8b8c0</DIV>
<DIV>Check fallback/coreboot_ram</DIV>
<DIV>CBFS: follow chain: fff8b8c0 + 38 + c97a + align -> fff98280</DIV>
<DIV>Check fallback/payload</DIV>
<DIV>CBFS: follow chain: fff98280 + 38 + 9dfb + align -> fffa20c0</DIV>
<DIV>Check </DIV>
<DIV>CBFS: follow chain: fffa20c0 + 28 + 5db86 + align -> fffffc80</DIV>
<DIV>CBFS: Could not find file pci10de,0641.rom</DIV>
<DIV>On card, rom address for PCI: 02:00.0 = f3000000</DIV>
<DIV>PCI Expansion ROM, signature 0xaa55, INIT size 0xf800, data ptr
0x01f0</DIV>
<DIV>PCI ROM Image, Vendor 10de, Device 0641,</DIV>
<DIV>PCI ROM Image, Class Code 030000, Code Type 00</DIV>
<DIV>copying VGA ROM Image from f3000000 to 0xc0000, 0xf800 bytes</DIV>
<DIV>Real mode stub @00000600: 609 bytes</DIV>
<DIV>Calling Option ROM...</DIV></DIV></DIV></BODY></HTML>