Second try: 
- Fix race condition in option_table.h generation by moving the
  include statement to those files that actually need it. This significantly
  reduces the number of dependencies, so it's no longer extremely ugly to specify
  them manually (see the src/pc80/Makefile.inc portion)
- Add double include guards around option_table.h defines
- Also, drop the AMD DBM690T work around for the issue

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>


Index: src/include/pc80/mc146818rtc.h
===================================================================
--- src/include/pc80/mc146818rtc.h	(revision 5830)
+++ src/include/pc80/mc146818rtc.h	(working copy)
@@ -81,14 +81,6 @@
 #define PC_CKS_RANGE_END	45
 #define PC_CKS_LOC		46
 
-/* coreboot cmos checksum is usually only built over bytes 49..125
- * LB_CKS_RANGE_START, LB_CKS_RANGE_END and LB_CKS_LOC are defined
- * in option_table.h
- */
-#if CONFIG_HAVE_OPTION_TABLE
-#include <option_table.h>
-#endif
-
 #ifndef UTIL_BUILD_OPTION_TABLE
 #include <arch/io.h>
 static inline unsigned char cmos_read(unsigned char addr)
Index: src/cpu/amd/model_fxx/init_cpus.c
===================================================================
--- src/cpu/amd/model_fxx/init_cpus.c	(revision 5830)
+++ src/cpu/amd/model_fxx/init_cpus.c	(working copy)
@@ -1,3 +1,7 @@
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
+
 //it takes the CONFIG_ENABLE_APIC_EXT_ID and CONFIG_APIC_ID_OFFSET and CONFIG_LIFT_BSP_APIC_ID
 #ifndef SET_FIDVID
 #if CONFIG_K8_REV_F_SUPPORT == 0
Index: src/cpu/amd/dualcore/dualcore.c
===================================================================
--- src/cpu/amd/dualcore/dualcore.c	(revision 5830)
+++ src/cpu/amd/dualcore/dualcore.c	(working copy)
@@ -7,6 +7,9 @@
 
 #include "cpu/amd/dualcore/dualcore_id.c"
 #include <pc80/mc146818rtc.h>
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
 
 static inline unsigned get_core_num_in_bsp(unsigned nodeid)
 {
Index: src/cpu/amd/quadcore/quadcore.c
===================================================================
--- src/cpu/amd/quadcore/quadcore.c	(revision 5830)
+++ src/cpu/amd/quadcore/quadcore.c	(working copy)
@@ -20,6 +20,9 @@
 #include <console/console.h>
 #include <pc80/mc146818rtc.h>
 #include <northbridge/amd/amdht/ht_wrapper.c>
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
 
 #ifndef SET_NB_CFG_54
 	#define SET_NB_CFG_54 1
Index: src/mainboard/kontron/986lcd-m/romstage.c
===================================================================
--- src/mainboard/kontron/986lcd-m/romstage.c	(revision 5830)
+++ src/mainboard/kontron/986lcd-m/romstage.c	(working copy)
@@ -43,6 +43,7 @@
 #include "superio/winbond/w83627thg/w83627thg.h"
 
 #include <pc80/mc146818rtc.h>
+#include "option_table.h"
 
 #include <console/console.h>
 #include <cpu/x86/bist.h>
Index: src/mainboard/amd/dbm690t/Kconfig
===================================================================
--- src/mainboard/amd/dbm690t/Kconfig	(revision 5830)
+++ src/mainboard/amd/dbm690t/Kconfig	(working copy)
@@ -25,12 +25,6 @@
 	string
 	default amd/dbm690t
 
-# This is a temporary fix, and should be removed when the race condition for
-# building option_table.h is fixed.
-config WARNINGS_ARE_ERRORS
-	bool
-	default n
-
 config DCACHE_RAM_BASE
 	hex
 	default 0xc8000
Index: src/northbridge/amd/amdk8/coherent_ht.c
===================================================================
--- src/northbridge/amd/amdk8/coherent_ht.c	(revision 5830)
+++ src/northbridge/amd/amdk8/coherent_ht.c	(working copy)
@@ -69,6 +69,9 @@
 #include <stdlib.h>
 #include "arch/romcc_io.h"
 #include <pc80/mc146818rtc.h>
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
 
 #include "amdk8.h"
 
Index: src/northbridge/amd/amdk8/raminit.c
===================================================================
--- src/northbridge/amd/amdk8/raminit.c	(revision 5830)
+++ src/northbridge/amd/amdk8/raminit.c	(working copy)
@@ -10,6 +10,9 @@
 #include <reset.h>
 #include "raminit.h"
 #include "amdk8.h"
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
 
 #if (CONFIG_RAMTOP & (CONFIG_RAMTOP -1)) != 0
 # error "CONFIG_RAMTOP must be a power of 2"
Index: src/northbridge/amd/amdk8/raminit_f.c
===================================================================
--- src/northbridge/amd/amdk8/raminit_f.c	(revision 5830)
+++ src/northbridge/amd/amdk8/raminit_f.c	(working copy)
@@ -28,6 +28,9 @@
 #include "raminit.h"
 #include "amdk8_f.h"
 #include <spd_ddr2.h>
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
 
 #ifndef QRANK_DIMM_SUPPORT
 #define QRANK_DIMM_SUPPORT 0
Index: src/northbridge/intel/e7520/raminit.c
===================================================================
--- src/northbridge/intel/e7520/raminit.c	(revision 5830)
+++ src/northbridge/intel/e7520/raminit.c	(working copy)
@@ -23,6 +23,9 @@
 #include <stdlib.h>
 #include "raminit.h"
 #include "e7520.h"
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
 
 #define BAR 0x40000000
 
@@ -619,11 +622,13 @@
 
 	}
 	ecc = 2;
-	if (read_option(CMOS_VSTART_ECC_memory,CMOS_VLEN_ECC_memory,1) == 0) {
+#if CONFIG_HAVE_OPTION_TABLE
+	if (read_option(CMOS_VSTART_ECC_memory, CMOS_VLEN_ECC_memory, 1) == 0) {
 		ecc = 0;  /* ECC off in CMOS so disable it */
 		print_debug("ECC off\n");
-	}
-	else {
+	} else 
+#endif
+	{
 		print_debug("ECC on\n");
 	}
 	drc &= ~(3 << 20); /* clear the ecc bits */
Index: src/northbridge/intel/e7525/raminit.c
===================================================================
--- src/northbridge/intel/e7525/raminit.c	(revision 5830)
+++ src/northbridge/intel/e7525/raminit.c	(working copy)
@@ -23,6 +23,9 @@
 #include <stdlib.h>
 #include "raminit.h"
 #include "e7525.h"
+#if CONFIG_HAVE_OPTION_TABLE
+#include "option_table.h"
+#endif
 
 #define BAR 0x40000000
 
@@ -619,11 +622,13 @@
 
 	}
 	ecc = 2;
+#if CONFIG_HAVE_OPTION_TABLE
 	if (read_option(CMOS_VSTART_ECC_memory,CMOS_VLEN_ECC_memory,1) == 0) {
 		ecc = 0;  /* ECC off in CMOS so disable it */
 		print_debug("ECC off\n");
-	}
-	else {
+	} else
+#endif
+	{
 		print_debug("ECC on\n");
 	}
 	drc &= ~(3 << 20); /* clear the ecc bits */
Index: src/pc80/serial.c
===================================================================
--- src/pc80/serial.c	(revision 5830)
+++ src/pc80/serial.c	(working copy)
@@ -1,6 +1,9 @@
 #include <lib.h> /* Prototypes */
 #include <arch/io.h>
 #include "pc80/mc146818rtc.h"
+#if CONFIG_USE_OPTION_TABLE
+#include "option_table.h"
+#endif
 
 /* Base Address */
 #ifndef CONFIG_TTYS0_BASE
Index: src/pc80/mc146818rtc_early.c
===================================================================
--- src/pc80/mc146818rtc_early.c	(revision 5830)
+++ src/pc80/mc146818rtc_early.c	(working copy)
@@ -1,5 +1,8 @@
 #include <pc80/mc146818rtc.h>
 #include <fallback.h>
+#if CONFIG_USE_OPTION_TABLE
+#include "option_table.h"
+#endif
 
 #ifndef CONFIG_MAX_REBOOT_CNT
 #error "CONFIG_MAX_REBOOT_CNT not defined"
Index: src/pc80/Makefile.inc
===================================================================
--- src/pc80/Makefile.inc	(revision 5830)
+++ src/pc80/Makefile.inc	(working copy)
@@ -8,3 +8,4 @@
 subdirs-y += vga
 
 $(obj)/pc80/mc146818rtc.o : $(OPTION_TABLE_H)
+$(obj)/pc80/mc146818rtc_early.initobj.o : $(OPTION_TABLE_H)
Index: src/pc80/mc146818rtc.c
===================================================================
--- src/pc80/mc146818rtc.c	(revision 5830)
+++ src/pc80/mc146818rtc.c	(working copy)
@@ -2,6 +2,9 @@
 #include <pc80/mc146818rtc.h>
 #include <boot/coreboot_tables.h>
 #include <string.h>
+#if CONFIG_USE_OPTION_TABLE
+#include "option_table.h"
+#endif
 
 /* control registers - Moto names
  */
Index: src/arch/i386/Makefile.inc
===================================================================
--- src/arch/i386/Makefile.inc	(revision 5830)
+++ src/arch/i386/Makefile.inc	(working copy)
@@ -206,11 +206,11 @@
 
 $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
 	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -MMD $(CFLAGS) -I$(src) -I. -c $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
+	$(CC) -MMD $(CFLAGS) -I$(src) -I. -I$(obj) -c $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@
 
 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h
 	@printf "    CC         romstage.inc\n"
-	$(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -c -S $< -o $@
+	$(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
 
 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
 	@printf "    POST       romstage.inc\n"
Index: util/options/build_opt_tbl.c
===================================================================
--- util/options/build_opt_tbl.c	(revision 5830)
+++ util/options/build_opt_tbl.c	(working copy)
@@ -591,6 +591,10 @@
 		/* Walk through the entry records */
 		ptr = (struct lb_record *)(cmos_table + hdr->header_length);
 		end = (struct lb_record *)(cmos_table + hdr->size);
+		fprintf(fp, "/* This file is autogenerated.\n"
+			    " * See mainboard's cmos.layout file.\n */\n\n"
+			    "#ifndef __OPTION_TABLE_H\n#define __OPTION_TABLE_H\n\n");
+
 		for(;ptr < end; ptr = (struct lb_record *)(((char *)ptr) + ptr->size)) {
 			if (ptr->tag != LB_TAG_OPTION) {
 				continue;
@@ -620,6 +624,7 @@
 			unlink(tempfilename);
 			exit(1);
 		}
+		fprintf(fp, "\n#endif // __OPTION_TABLE_H\n");
 		fclose(fp);
 
 		UNLINK_IF_NECESSARY(header);
