

coreboot-4.0-1929-g79cfe7e-dirty-dk Fri Jan 20 15:20:39 CET 2012 starting...
BSP Family_Model: 00500f20 
cpu_init_detectedx = 00000000 
agesawrapper_amdinitmmio passed.
agesawrapper_amdinitreset passed.
agesawrapper_amdinitearly BSP Family_Model: 00500f20 
cpu_init_detectedx = 00000001 
agesawrapper_amdinitmmio passed.
agesawrapper_amdinitreset passed.
agesawrapper_amdinitearly <-------------- PCIe Config Start----------------->
  PSPP Policy - Disabled
  GFX Workaround - Disabled
  LinkL0Pooling - 60000us
  LinkGpioResetAssertionTime - 2000us
  LinkReceiverDetectionPooling - 60000us
  <---------Wrapper - GPPSB Config -------->
    PowerOffUnusedLanes - 1
    PowerOffUnusedPlls - 1
    ClkGating - 1
    LclkGating - 1
    TxclkGatingPllPowerDown - 1
    PllOffInL1 - 1
  <---------Wrapper - GPPSB Config End----->
  Engine Type - PCIe Port
    Start Phy Lane - 4
    End   Phy Lane - 4
    PCIe port configuration:
      Port Training - Enabled
      Start Core Lane - 4
      End Core Lane   - 4
      PCI Address - 0:4:0
      Native PCI Dev Number  - 4
      Native PCI Func Number - 0
      Hotplug - Disabled
      ASPM    - L0s & L1
      Speed   - 2
  Engine Type - PCIe Port
    Start Phy Lane - 5
    End   Phy Lane - 5
    PCIe port configuration:
      Port Training - Enabled
      Start Core Lane - 5
      End Core Lane   - 5
      PCI Address - 0:5:0
      Native PCI Dev Number  - 5
      Native PCI Func Number - 0
      Hotplug - Disabled
      ASPM    - L0s & L1
      Speed   - 2
  Engine Type - PCIe Port
    Start Phy Lane - 6
    End   Phy Lane - 6
    PCIe port configuration:
      Port Training - Enabled
      Start Core Lane - 6
      End Core Lane   - 6
      PCI Address - 0:6:0
      Native PCI Dev Number  - 6
      Native PCI Func Number - 0
      Hotplug - Disabled
      ASPM    - L0s & L1
      Speed   - 2
  Engine Type - PCIe Port
    Start Phy Lane - 7
    End   Phy Lane - 7
    PCIe port configuration:
      Port Training - Enabled
      Start Core Lane - 7
      End Core Lane   - 7
      PCI Address - 0:7:0
      Native PCI Dev Number  - 7
      Native PCI Func Number - 0
      Hotplug - Disabled
      ASPM    - L0s & L1
      Speed   - 2
  Engine Type - PCIe Port
    Start Phy Lane - 0
    End   Phy Lane - 3
    PCIe port configuration:
      Port Training - Enabled
      Start Core Lane - 0
      End Core Lane   - 3
      PCI Address - 0:8:0
      Native PCI Dev Number  - 8
      Native PCI Func Number - 0
      Hotplug - Disabled
      ASPM    - L0s & L1
      Speed   - 2
  <---------Wrapper - Virtual DDI Config -------->
    PowerOffUnusedLanes - 1
    PowerOffUnusedPlls - 1
    ClkGating - 1
    LclkGating - 1
    TxclkGatingPllPowerDown - 1
    PllOffInL1 - 0
  <---------Wrapper - Virtual DDI Config End----->
  Engine Type - DDI Link
    Start Phy Lane - 8
    End   Phy Lane - 11
    DDI configuration:
      Connector - LVDS
      Aux - Aux1
      Hdp - Hdp1
  Engine Type - DDI Link
    Start Phy Lane - 12
    End   Phy Lane - 15
    DDI configuration:
      Connector - DP
      Aux - Aux2
      Hdp - Hdp2
<-------------- PCIe Config End------------------>
passed.
agesawrapper_amdinitpost 
EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.

EventLog:	EventClass = 2, EventInfo = 8040100.
	Param1 = a00a, Param2 = 0.
	Param3 = 0, Param4 = 0.
error level: 4 
agesawrapper_amdinitenv passed.
Loading image.
Searching for fallback/coreboot_ram
Check cmos_layout.bin
Check pci1002,9804.rom
Check fallback/romstage
Check fallback/coreboot_ram
Stage: loading fallback/coreboot_ram @ 0x200000 (1441792 bytes), entry @ 0x200000
Stage: done loading.
Jumping to image.
coreboot-4.0-1929-g79cfe7e-dirty-dk Fri Jan 20 15:20:39 CET 2012 booting...
Enumerating buses...
Show all devs...Before device enumeration.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 1
PCI: 00:06.0: enabled 1
PCI: 00:07.0: enabled 1
PCI: 00:08.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.5: enabled 0
PNP: 002e.307: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 0
PNP: 002e.a: enabled 0
PNP: 002e.b: enabled 0
PNP: 002e.c: enabled 0
PCI: 00:14.4: enabled 0
PCI: 00:14.5: enabled 1
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:15.2: enabled 1
PCI: 00:15.3: enabled 1
PCI: 00:16.0: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:18.6: enabled 1
PCI: 00:18.7: enabled 1
Compare with tree...
Root Device: enabled 1
 APIC_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 PCI_DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:01.0: enabled 1
  PCI: 00:01.1: enabled 1
  PCI: 00:04.0: enabled 1
  PCI: 00:05.0: enabled 1
  PCI: 00:06.0: enabled 1
  PCI: 00:07.0: enabled 1
  PCI: 00:08.0: enabled 0
  PCI: 00:11.0: enabled 1
  PCI: 00:12.0: enabled 1
  PCI: 00:12.1: enabled 1
  PCI: 00:12.2: enabled 1
  PCI: 00:13.0: enabled 1
  PCI: 00:13.1: enabled 1
  PCI: 00:13.2: enabled 1
  PCI: 00:14.0: enabled 1
   I2C: 00:50: enabled 1
   I2C: 00:51: enabled 1
  PCI: 00:14.1: enabled 1
  PCI: 00:14.2: enabled 1
  PCI: 00:14.3: enabled 1
   PNP: 002e.0: enabled 0
   PNP: 002e.1: enabled 0
   PNP: 002e.2: enabled 1
   PNP: 002e.3: enabled 1
   PNP: 002e.5: enabled 0
   PNP: 002e.307: enabled 0
   PNP: 002e.8: enabled 0
   PNP: 002e.9: enabled 0
   PNP: 002e.109: enabled 0
   PNP: 002e.209: enabled 0
   PNP: 002e.309: enabled 0
   PNP: 002e.a: enabled 0
   PNP: 002e.b: enabled 0
   PNP: 002e.c: enabled 0
  PCI: 00:14.4: enabled 0
  PCI: 00:14.5: enabled 1
  PCI: 00:15.0: enabled 1
  PCI: 00:15.1: enabled 1
  PCI: 00:15.2: enabled 1
  PCI: 00:15.3: enabled 1
  PCI: 00:16.0: enabled 0
  PCI: 00:16.2: enabled 0
  PCI: 00:18.0: enabled 1
  PCI: 00:18.1: enabled 1
  PCI: 00:18.2: enabled 1
  PCI: 00:18.3: enabled 1
  PCI: 00:18.4: enabled 1
  PCI: 00:18.5: enabled 1
  PCI: 00:18.6: enabled 1
  PCI: 00:18.7: enabled 1
Mainboard Inagua Enable.
inagua_enable, TOP MEM: msr.lo = 0x7f000000, msr.hi = 0x00000000
inagua_enable, TOP MEM2: msr2.lo = 0x00000000, msr2.hi = 0x00000000
inagua_enable: uma size 0x18000000, memory start 0x67000000
scan_static_bus for Root Device
APIC_CLUSTER: 0 enabled
PCI_DOMAIN: 0000 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: Using configuration type 1
PCI: 00:00.0 [1022/1510] ops
PCI: 00:00.0 [1022/1510] enabled
PCI: 00:01.0 [1002/9804] enabled
PCI: 00:01.1 [1002/1314] enabled
PCI: Static device PCI: 00:04.0 not found, disabling it.
PCI: Static device PCI: 00:05.0 not found, disabling it.
PCI: Static device PCI: 00:06.0 not found, disabling it.
kamod PCI:PCIe PCI: 00:07.0 Bridge found, PCI_VENDOR_ID 15151022 
PCI: 00:07.0 pci_find_next_capability
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
PCI: 00:07.0 CONFIG_PCIEXP_PLUGIN_SUPPORT
PCI: 00:07.0 pci_find_next_capability
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:07.0 subordinate bus PCI Express
PCI: 00:07.0 [1022/1515] enabled
sb800_enable() PCI: 00:11.0 [1002/4390] enabled
sb800_enable() PCI: 00:12.0 [1002/4397] ops
PCI: 00:12.0 [1002/4397] enabled
sb800_enable() PCI: Static device PCI: 00:12.1 not found, disabling it.
sb800_enable() PCI: 00:12.2 [1002/4396] ops
PCI: 00:12.2 [1002/4396] enabled
sb800_enable() PCI: 00:13.0 [1002/4397] ops
PCI: 00:13.0 [1002/4397] enabled
sb800_enable() PCI: Static device PCI: 00:13.1 not found, disabling it.
sb800_enable() PCI: 00:13.2 [1002/4396] ops
PCI: 00:13.2 [1002/4396] enabled
sb800_enable() sm_init().
IOAPIC: Clearing IOAPIC at 0xfec00000
IOAPIC: 23 interrupts
IOAPIC: reg 0x00000000 value 0x00000000 0x00010000
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: 23 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
PCI: 00:14.0 [1002/4385] enabled
sb800_enable() PCI: Static device PCI: 00:14.1 not found, disabling it.
sb800_enable() hda enabled
PCI: 00:14.2 [1002/4383] ops
PCI: 00:14.2 [1002/4383] enabled
sb800_enable() PCI: 00:14.3 [1002/439d] bus ops
PCI: 00:14.3 [1002/439d] enabled
sb800_enable() PCI: 00:14.4 [1002/4384] bus ops
PCI: 00:14.4 [1002/4384] disabled
sb800_enable() PCI: 00:14.5 [1002/4399] ops
PCI: 00:14.5 [1002/4399] enabled
sb800_enable() kamod PCI: PCI: 00:15.0 South Bridge found.
kamod PCI: PCI: 00:15.0 South Bridge found.
kamod PCI: PCI: 00:15.0 South Bridge found.
kamod PCI: PCI: 00:15.0 South Bridge found.
kamod PCI:PCIe PCI: 00:15.0 Bridge found, PCI_VENDOR_ID ffffffff 
PCI: Static device PCI: 00:15.0 not found, disabling it.
sb800_enable() PCI: Static device PCI: 00:15.1 not found, disabling it.
sb800_enable() PCI: Static device PCI: 00:15.2 not found, disabling it.
sb800_enable() PCI: Static device PCI: 00:15.3 not found, disabling it.
sb800_enable() PCI: 00:16.0 [1002/4397] ops
PCI: 00:16.0 [1002/4397] disabled
sb800_enable() SB800 GPP port 0x0 training status=0xa0b0f10
SB800 GPP port 0x1 training status=0x1020304
SB800 GPP port 0x2 training status=0x1020304
SB800 GPP port 0x3 training status=0x2030400
PCI: 00:18.0 [1022/1700] enabled
PCI: 00:18.1 [1022/1701] enabled
PCI: 00:18.2 [1022/1702] enabled
PCI: 00:18.3 [1022/1703] enabled
PCI: 00:18.4 [1022/1704] enabled
PCI: 00:18.5 [1022/1718] enabled
PCI: 00:18.6 [1022/1716] enabled
PCI: 00:18.7 [1022/1719] enabled
pciexp_scan_bridge for PCI: 00:07.0
do_pci_scan_bridge for PCI: 00:07.0
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
Capability: type 0x01 @ 0xc0
PCI: 01:00.0 CONFIG_PCIEXP_PLUGIN_SUPPORT
PCI: 01:00.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
PCI: 01:00.0 subordinate bus PCI Express
PCI: 01:00.0 [111d/803c] enabled
pciexp_scan_bridge for PCI: 01:00.0
do_pci_scan_bridge for PCI: 01:00.0
PCI: pci_scan_bus for bus 02
PCI: 02:02.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
Capability: type 0x01 @ 0xc0
Capability: type 0x05 @ 0xd0
PCI: 02:02.0 CONFIG_PCIEXP_PLUGIN_SUPPORT
PCI: 02:02.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
PCI: 02:02.0 subordinate bus PCI Express
PCI: 02:02.0 [111d/803c] enabled
PCI: 02:03.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
Capability: type 0x01 @ 0xc0
Capability: type 0x05 @ 0xd0
PCI: 02:03.0 CONFIG_PCIEXP_PLUGIN_SUPPORT
PCI: 02:03.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
PCI: 02:03.0 subordinate bus PCI Express
PCI: 02:03.0 [111d/803c] enabled
PCI: 02:04.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
Capability: type 0x01 @ 0xc0
Capability: type 0x05 @ 0xd0
PCI: 02:04.0 CONFIG_PCIEXP_PLUGIN_SUPPORT
PCI: 02:04.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
PCI: 02:04.0 subordinate bus PCI Express
PCI: 02:04.0 [111d/803c] enabled
PCI: 02:05.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
Capability: type 0x01 @ 0xc0
Capability: type 0x05 @ 0xd0
PCI: 02:05.0 CONFIG_PCIEXP_PLUGIN_SUPPORT
PCI: 02:05.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
PCI: 02:05.0 subordinate bus PCI Express
PCI: 02:05.0 [111d/803c] enabled
pciexp_scan_bridge for PCI: 02:02.0
do_pci_scan_bridge for PCI: 02:02.0
PCI: pci_scan_bus for bus 03
PCI: pci_scan_bus returning with max=003
do_pci_scan_bridge returns max 3
pciexp_scan_bridge for PCI: 02:03.0
do_pci_scan_bridge for PCI: 02:03.0
PCI: pci_scan_bus for bus 04
PCI: pci_scan_bus returning with max=004
do_pci_scan_bridge returns max 4
pciexp_scan_bridge for PCI: 02:04.0
do_pci_scan_bridge for PCI: 02:04.0
PCI: pci_scan_bus for bus 05
PCI: pci_scan_bus returning with max=005
do_pci_scan_bridge returns max 5
pciexp_scan_bridge for PCI: 02:05.0
do_pci_scan_bridge for PCI: 02:05.0
PCI: pci_scan_bus for bus 06
PCI: pci_scan_bus returning with max=006
do_pci_scan_bridge returns max 6
PCI: pci_scan_bus returning with max=006
PCI: 02:02.0 pciexp_tune_dev
PCI: 02:02.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
PCI: 02:03.0 pciexp_tune_dev
PCI: 02:03.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
PCI: 02:04.0 pciexp_tune_dev
PCI: 02:04.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
PCI: 02:05.0 pciexp_tune_dev
PCI: 02:05.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
do_pci_scan_bridge returns max 6
PCI: pci_scan_bus returning with max=006
PCI: 01:00.0 pciexp_tune_dev
PCI: 01:00.0 pci_find_next_capability
Capability: type 0x10 @ 0x40
do_pci_scan_bridge returns max 6
scan_static_bus for PCI: 00:14.3
PNP: 002e.0 disabled
PNP: 002e.1 disabled
PNP: 002e.2 enabled
PNP: 002e.3 enabled
PNP: 002e.5 disabled
PNP: 002e.307 disabled
PNP: 002e.8 disabled
PNP: 002e.9 disabled
PNP: 002e.109 disabled
PNP: 002e.209 disabled
PNP: 002e.309 disabled
PNP: 002e.a disabled
PNP: 002e.b disabled
PNP: 002e.c disabled
scan_static_bus for PCI: 00:14.3 done
PCI: pci_scan_bus returning with max=006
scan_static_bus for Root Device done
device enumeration done
Setting up VGA for PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0

Fam14h - cpu_bus_read_resources.
APIC_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
APIC_CLUSTER: 0 read_resources bus 0 link: 0 done

Fam14h - domain_read_resources.
PCI_DOMAIN: 0000 read_resources bus 0 link: 0

Fam14h - read_resources.
PCI: 00:07.0 read_resources bus 1 link: 0
PCI: 01:00.0 read_resources bus 2 link: 0
PCI: 02:02.0 read_resources bus 3 link: 0
PCI: 02:02.0 read_resources bus 3 link: 0 done
PCI: 02:03.0 read_resources bus 4 link: 0
PCI: 02:03.0 read_resources bus 4 link: 0 done
PCI: 02:04.0 read_resources bus 5 link: 0
PCI: 02:04.0 read_resources bus 5 link: 0 done
PCI: 02:05.0 read_resources bus 6 link: 0
PCI: 02:05.0 read_resources bus 6 link: 0 done
PCI: 01:00.0 read_resources bus 2 link: 0 done
PCI: 00:07.0 read_resources bus 1 link: 0 done
PCI: 00:14.0 read_resources bus 0 link: 0
I2C: 00:50 missing read_resources
I2C: 00:51 missing read_resources
PCI: 00:14.0 read_resources bus 0 link: 0 done
SB800 - Lpc.c - lpc_read_resources - Start.
SB800 - Lpc.c - lpc_read_resources - End.
PCI: 00:14.3 read_resources bus 0 link: 0
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 APIC_CLUSTER: 0
  APIC_CLUSTER: 0 child on link 0 APIC: 00
  APIC_CLUSTER: 0 resource base f8000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
   APIC: 00
  PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
  PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:01.0
   PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
   PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
   PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18
   PCI: 00:01.1
   PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
   PCI: 00:04.0
   PCI: 00:05.0
   PCI: 00:06.0
   PCI: 00:07.0 child on link 0 PCI: 01:00.0
   PCI: 00:07.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
   PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 01:00.0 child on link 0 PCI: 02:02.0
    PCI: 01:00.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
    PCI: 01:00.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
    PCI: 01:00.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 02:02.0
     PCI: 02:02.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
     PCI: 02:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
     PCI: 02:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 02:03.0
     PCI: 02:03.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
     PCI: 02:03.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
     PCI: 02:03.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 02:04.0
     PCI: 02:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
     PCI: 02:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
     PCI: 02:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 02:05.0
     PCI: 02:05.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
     PCI: 02:05.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
     PCI: 02:05.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:08.0
   PCI: 00:11.0
   PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
   PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24
   PCI: 00:12.0
   PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:12.1
   PCI: 00:12.2
   PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
   PCI: 00:13.0
   PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:13.1
   PCI: 00:13.2
   PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
   PCI: 00:14.0 child on link 0 I2C: 00:50
    I2C: 00:50
    I2C: 00:51
   PCI: 00:14.1
   PCI: 00:14.2
   PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:14.3 child on link 0 PNP: 002e.0
   PCI: 00:14.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 200 index a0
   PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 002e.0
    PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
    PNP: 002e.1
    PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 002e.2
    PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.3
    PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.5
    PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
    PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
    PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 72
    PNP: 002e.307
    PNP: 002e.8
    PNP: 002e.9
    PNP: 002e.109
    PNP: 002e.209
    PNP: 002e.309
    PNP: 002e.a
    PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 002e.b
    PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit 7ff flags c0000100 index 60
    PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 002e.c
   PCI: 00:14.4
   PCI: 00:14.5
   PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:15.0
   PCI: 00:15.1
   PCI: 00:15.2
   PCI: 00:15.3
   PCI: 00:16.0
   PCI: 00:16.2
   PCI: 00:18.0
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.4
   PCI: 00:18.5
   PCI: 00:18.6
   PCI: 00:18.7
PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:07.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 01:00.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 02:02.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 02:02.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 02:03.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 02:03.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 02:04.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 02:04.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 02:05.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 02:05.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 01:00.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:07.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:01.0 14 *  [0x0 - 0xff] io
PCI: 00:11.0 20 *  [0x400 - 0x40f] io
PCI: 00:11.0 10 *  [0x410 - 0x417] io
PCI: 00:11.0 18 *  [0x418 - 0x41f] io
PCI: 00:11.0 14 *  [0x420 - 0x423] io
PCI: 00:11.0 1c *  [0x424 - 0x427] io
PCI_DOMAIN: 0000 compute_resources_io: base: 428 size: 428 align: 8 gran: 0 limit: ffff done
PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:07.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 01:00.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 02:02.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 02:02.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 02:03.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 02:03.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 02:04.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 02:04.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 02:05.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 02:05.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 01:00.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:07.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:07.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:02.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:02.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 02:03.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:03.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 02:04.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:04.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 02:05.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:05.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 01:00.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:07.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:01.0 10 *  [0x0 - 0xfffffff] prefmem
PCI: 00:01.0 18 *  [0x10000000 - 0x1003ffff] mem
PCI: 00:01.1 10 *  [0x10040000 - 0x10043fff] mem
PCI: 00:14.2 10 *  [0x10044000 - 0x10047fff] mem
PCI: 00:12.0 10 *  [0x10048000 - 0x10048fff] mem
PCI: 00:13.0 10 *  [0x10049000 - 0x10049fff] mem
PCI: 00:14.5 10 *  [0x1004a000 - 0x1004afff] mem
PCI: 00:11.0 24 *  [0x1004b000 - 0x1004b3ff] mem
PCI: 00:12.2 10 *  [0x1004b400 - 0x1004b4ff] mem
PCI: 00:13.2 10 *  [0x1004b500 - 0x1004b5ff] mem
PCI: 00:14.3 a0 *  [0x1004b600 - 0x1004b600] mem
PCI_DOMAIN: 0000 compute_resources_mem: base: 1004b601 size: 1004b601 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: PCI_DOMAIN: 0000
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI_DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:01.0
constrain_resources: PCI: 00:01.1
constrain_resources: PCI: 00:07.0
constrain_resources: PCI: 01:00.0
constrain_resources: PCI: 02:02.0
constrain_resources: PCI: 02:03.0
constrain_resources: PCI: 02:04.0
constrain_resources: PCI: 02:05.0
constrain_resources: PCI: 00:11.0
constrain_resources: PCI: 00:12.0
constrain_resources: PCI: 00:12.2
constrain_resources: PCI: 00:13.0
constrain_resources: PCI: 00:13.2
constrain_resources: PCI: 00:14.0
constrain_resources: I2C: 00:50
constrain_resources: I2C: 00:51
constrain_resources: PCI: 00:14.2
constrain_resources: PCI: 00:14.3
constrain_resources: PNP: 002e.2
constrain_resources: PNP: 002e.3
constrain_resources: PCI: 00:14.5
constrain_resources: PCI: 00:18.0
constrain_resources: PCI: 00:18.1
constrain_resources: PCI: 00:18.2
constrain_resources: PCI: 00:18.3
constrain_resources: PCI: 00:18.4
constrain_resources: PCI: 00:18.5
constrain_resources: PCI: 00:18.6
constrain_resources: PCI: 00:18.7
avoid_fixed_resources2: PCI_DOMAIN: 0000@10000000 limit 0000ffff
	lim->base 00001000 lim->limit 0000ffff
avoid_fixed_resources2: PCI_DOMAIN: 0000@10000100 limit ffffffff
	lim->base 00000000 lim->limit febfffff
Setting resources...
PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:428 align:8 gran:0 limit:ffff
Assigned: PCI: 00:01.0 14 *  [0x1000 - 0x10ff] io
Assigned: PCI: 00:11.0 20 *  [0x1400 - 0x140f] io
Assigned: PCI: 00:11.0 10 *  [0x1410 - 0x1417] io
Assigned: PCI: 00:11.0 18 *  [0x1418 - 0x141f] io
Assigned: PCI: 00:11.0 14 *  [0x1420 - 0x1423] io
Assigned: PCI: 00:11.0 1c *  [0x1424 - 0x1427] io
PCI_DOMAIN: 0000 allocate_resources_io: next_base: 1428 size: 428 align: 8 gran: 0 done
PCI: 00:07.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:07.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 01:00.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 01:00.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 02:02.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 02:02.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 02:03.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 02:03.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 02:04.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 02:04.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 02:05.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 02:05.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI_DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:1004b601 align:28 gran:0 limit:febfffff
Assigned: PCI: 00:01.0 10 *  [0xe0000000 - 0xefffffff] prefmem
Assigned: PCI: 00:01.0 18 *  [0xf0000000 - 0xf003ffff] mem
Assigned: PCI: 00:01.1 10 *  [0xf0040000 - 0xf0043fff] mem
Assigned: PCI: 00:14.2 10 *  [0xf0044000 - 0xf0047fff] mem
Assigned: PCI: 00:12.0 10 *  [0xf0048000 - 0xf0048fff] mem
Assigned: PCI: 00:13.0 10 *  [0xf0049000 - 0xf0049fff] mem
Assigned: PCI: 00:14.5 10 *  [0xf004a000 - 0xf004afff] mem
Assigned: PCI: 00:11.0 24 *  [0xf004b000 - 0xf004b3ff] mem
Assigned: PCI: 00:12.2 10 *  [0xf004b400 - 0xf004b4ff] mem
Assigned: PCI: 00:13.2 10 *  [0xf004b500 - 0xf004b5ff] mem
Assigned: PCI: 00:14.3 a0 *  [0xf004b600 - 0xf004b600] mem
PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f004b601 size: 1004b601 align: 28 gran: 0 done
PCI: 00:07.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:07.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 01:00.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 01:00.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 02:02.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 02:02.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 02:03.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 02:03.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 02:04.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 02:04.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 02:05.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 02:05.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:07.0 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:07.0 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 01:00.0 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 01:00.0 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 02:02.0 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 02:02.0 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 02:03.0 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 02:03.0 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 02:04.0 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 02:04.0 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 02:05.0 allocate_resources_mem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 02:05.0 allocate_resources_mem: next_base: febfffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0

Fam14h - cpu_bus_set_resources.
APIC_CLUSTER: 0 c0010058 <- [0x00f8000000 - 0x00f8ffffff] size 0x01000000 gran 0x00 mem <mmconfig>
APIC_CLUSTER: 0 assign_resources, bus 0 link: 0
APIC_CLUSTER: 0 assign_resources, bus 0 link: 0

Fam14h - domain_set_resources.
  amsr - incoming dev = 0026ef9c
adsr: (before) basek = 0, limitk = 7effffff.
adsr: (after) basek = 0, limitk = 1fbfff, sizek = 1fc000.
adsr - 0xa0000 to 0xbffff resource.
adsr: mmio_basek=00380000, basek=00000300, limitk=001fbfff
0: mmio_basek=00380000, basek=00000300, limitk=001fbfff
  adsr - uma_memory_base = 67000000.
  adsr - mmio_basek = 380000.
  adsr - high_tables_size = 10000.
adsr - adding uma resource.

Fam14h - Adding UMA memory.
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 14 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 00:01.0 18 <- [0x00f0000000 - 0x00f003ffff] size 0x00040000 gran 0x12 mem
PCI: 00:01.1 10 <- [0x00f0040000 - 0x00f0043fff] size 0x00004000 gran 0x0e mem
PCI: 00:07.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:07.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:07.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:07.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 01:00.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 01:00.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 01:00.0 assign_resources, bus 2 link: 0
PCI: 02:02.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 02:02.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 02:02.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 03 mem
PCI: 02:03.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 02:03.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 02:03.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 04 mem
PCI: 02:04.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io
PCI: 02:04.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 05 prefmem
PCI: 02:04.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 05 mem
PCI: 02:05.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 06 io
PCI: 02:05.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 06 prefmem
PCI: 02:05.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 06 mem
PCI: 01:00.0 assign_resources, bus 2 link: 0
PCI: 00:07.0 assign_resources, bus 1 link: 0
PCI: 00:11.0 10 <- [0x0000001410 - 0x0000001417] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000001420 - 0x0000001423] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000001418 - 0x000000141f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000001424 - 0x0000001427] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000001400 - 0x000000140f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f004b000 - 0x00f004b3ff] size 0x00000400 gran 0x0a mem
PCI: 00:12.0 10 <- [0x00f0048000 - 0x00f0048fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00f004b400 - 0x00f004b4ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00f0049000 - 0x00f0049fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00f004b500 - 0x00f004b5ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.2 10 <- [0x00f0044000 - 0x00f0047fff] size 0x00004000 gran 0x0e mem64
SB800 - Lpc.c - lpc_set_resources - Start.
PCI: 00:14.3 a0 <- [0x00f004b600 - 0x00f004b600] size 0x00000001 gran 0x00 mem
PCI: 00:14.3 assign_resources, bus 0 link: 0
PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
PCI: 00:14.3 assign_resources, bus 0 link: 0
SB800 - Lpc.c - lpc_set_resources - End.
PCI: 00:14.5 10 <- [0x00f004a000 - 0x00f004afff] size 0x00001000 gran 0x0c mem
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
  adsr - leaving this lovely routine.
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 APIC_CLUSTER: 0
  APIC_CLUSTER: 0 child on link 0 APIC: 00
  APIC_CLUSTER: 0 resource base f8000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
   APIC: 00
  PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
  PCI_DOMAIN: 0000 resource base 1000 size 428 align 8 gran 0 limit ffff flags 40040100 index 10000000
  PCI_DOMAIN: 0000 resource base e0000000 size 1004b601 align 28 gran 0 limit febfffff flags 40040200 index 10000100
  PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
  PCI_DOMAIN: 0000 resource base c0000 size 7ef3fc00 align 0 gran 0 limit 0 flags e0004200 index 20
  PCI_DOMAIN: 0000 resource base 67000000 size 18000000 align 0 gran 0 limit 0 flags f0000200 index 7
   PCI: 00:00.0
   PCI: 00:01.0
   PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit febfffff flags 60001200 index 10
   PCI: 00:01.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 14
   PCI: 00:01.0 resource base f0000000 size 40000 align 18 gran 18 limit febfffff flags 60000200 index 18
   PCI: 00:01.1
   PCI: 00:01.1 resource base f0040000 size 4000 align 14 gran 14 limit febfffff flags 60000200 index 10
   PCI: 00:04.0
   PCI: 00:05.0
   PCI: 00:06.0
   PCI: 00:07.0 child on link 0 PCI: 01:00.0
   PCI: 00:07.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:07.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
   PCI: 00:07.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
    PCI: 01:00.0 child on link 0 PCI: 02:02.0
    PCI: 01:00.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
    PCI: 01:00.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
    PCI: 01:00.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
     PCI: 02:02.0
     PCI: 02:02.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
     PCI: 02:02.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
     PCI: 02:02.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
     PCI: 02:03.0
     PCI: 02:03.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
     PCI: 02:03.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
     PCI: 02:03.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
     PCI: 02:04.0
     PCI: 02:04.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
     PCI: 02:04.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
     PCI: 02:04.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
     PCI: 02:05.0
     PCI: 02:05.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
     PCI: 02:05.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
     PCI: 02:05.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60080202 index 20
   PCI: 00:08.0
   PCI: 00:11.0
   PCI: 00:11.0 resource base 1410 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
   PCI: 00:11.0 resource base 1420 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
   PCI: 00:11.0 resource base 1418 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
   PCI: 00:11.0 resource base 1424 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
   PCI: 00:11.0 resource base 1400 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
   PCI: 00:11.0 resource base f004b000 size 400 align 10 gran 10 limit febfffff flags 60000200 index 24
   PCI: 00:12.0
   PCI: 00:12.0 resource base f0048000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10
   PCI: 00:12.1
   PCI: 00:12.2
   PCI: 00:12.2 resource base f004b400 size 100 align 8 gran 8 limit febfffff flags 60000200 index 10
   PCI: 00:13.0
   PCI: 00:13.0 resource base f0049000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10
   PCI: 00:13.1
   PCI: 00:13.2
   PCI: 00:13.2 resource base f004b500 size 100 align 8 gran 8 limit febfffff flags 60000200 index 10
   PCI: 00:14.0 child on link 0 I2C: 00:50
    I2C: 00:50
    I2C: 00:51
   PCI: 00:14.1
   PCI: 00:14.2
   PCI: 00:14.2 resource base f0044000 size 4000 align 14 gran 14 limit febfffff flags 60000201 index 10
   PCI: 00:14.3 child on link 0 PNP: 002e.0
   PCI: 00:14.3 resource base f004b600 size 1 align 0 gran 0 limit febfffff flags 60000200 index a0
   PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 002e.0
    PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
    PNP: 002e.1
    PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
    PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 002e.2
    PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 002e.3
    PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
    PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 002e.5
    PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
    PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
    PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 72
    PNP: 002e.307
    PNP: 002e.8
    PNP: 002e.9
    PNP: 002e.109
    PNP: 002e.209
    PNP: 002e.309
    PNP: 002e.a
    PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 002e.b
    PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit 7ff flags c0000100 index 60
    PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 002e.c
   PCI: 00:14.4
   PCI: 00:14.5
   PCI: 00:14.5 resource base f004a000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10
   PCI: 00:15.0
   PCI: 00:15.1
   PCI: 00:15.2
   PCI: 00:15.3
   PCI: 00:16.0
   PCI: 00:16.2
   PCI: 00:18.0
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.4
   PCI: 00:18.5
   PCI: 00:18.6
   PCI: 00:18.7
Done allocating resources.
Enabling resources...

Fam14h - domain_enable_resources: AmdInitMid.
  ader - leaving domain_enable_resources.
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 subsystem <- 1022/1510
PCI: 00:01.0 cmd <- 07
PCI: 00:01.1 subsystem <- 1022/1510
PCI: 00:01.1 cmd <- 02
PCI: 00:07.0 bridge ctrl <- 0003
PCI: 00:07.0 cmd <- 00
PCI: 00:11.0 subsystem <- 1022/1510
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1022/1510
PCI: 00:12.0 cmd <- 02
PCI: 00:12.2 subsystem <- 1022/1510
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1022/1510
PCI: 00:13.0 cmd <- 02
PCI: 00:13.2 subsystem <- 1022/1510
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1022/1510
PCI: 00:14.0 cmd <- 403
PCI: 00:14.2 subsystem <- 1022/1510
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1022/1510
PCI: 00:14.3 cmd <- 0f
PCI: 00:14.5 subsystem <- 1022/1510
PCI: 00:14.5 cmd <- 02
PCI: 00:18.0 subsystem <- 1022/1510
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1022/1510
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/1510
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 subsystem <- 1022/1510
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1022/1510
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 subsystem <- 1022/1510
PCI: 00:18.5 cmd <- 00
PCI: 00:18.6 subsystem <- 1022/1510
PCI: 00:18.6 cmd <- 00
PCI: 00:18.7 subsystem <- 1022/1510
PCI: 00:18.7 cmd <- 00
PCI: 01:00.0 bridge ctrl <- 0003
PCI: 01:00.0 cmd <- 00
PCI: 02:02.0 bridge ctrl <- 0003
PCI: 02:02.0 cmd <- 00
PCI: 02:03.0 bridge ctrl <- 0003
PCI: 02:03.0 cmd <- 00
PCI: 02:04.0 bridge ctrl <- 0003
PCI: 02:04.0 cmd <- 00
PCI: 02:05.0 bridge ctrl <- 0003
PCI: 02:05.0 cmd <- 00
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
start_eip=0x00004000, offset=0x00200000, code_size=0x0000005b
Initializing CPU #0
CPU: vendor AMD device 500f20
CPU: family 14, model 02, stepping 00
Model 14 Init.
Setting up local apic... apic_id: 0x00 done.
siblings = 01, CPU #0 initialized
All AP CPUs stopped
PCI: 00:00.0 init
Northbridge init
PCI: 00:01.0 init
PCI: 00:01.1 init
PCI: 00:11.0 init
PCI: 00:14.0 init
PCI: 00:18.0 init
PCI: 00:18.1 init
PCI: 00:18.2 init
PCI: 00:18.3 init
PCI: 00:18.4 init
PCI: 00:18.5 init
PCI: 00:18.6 init
PCI: 00:18.7 init
PNP: 002e.2 init
PNP: 002e.3 init
Devices initialized
Show all devs...After init.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:04.0: enabled 0
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 1
PCI: 00:08.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.1: enabled 0
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.1: enabled 0
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.5: enabled 0
PNP: 002e.307: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.109: enabled 0
PNP: 002e.209: enabled 0
PNP: 002e.309: enabled 0
PNP: 002e.a: enabled 0
PNP: 002e.b: enabled 0
PNP: 002e.c: enabled 0
PCI: 00:14.4: enabled 0
PCI: 00:14.5: enabled 1
PCI: 00:15.0: enabled 0
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:18.6: enabled 1
PCI: 00:18.7: enabled 1
PCI: 01:00.0: enabled 1
PCI: 02:02.0: enabled 1
PCI: 02:03.0: enabled 1
PCI: 02:04.0: enabled 1
PCI: 02:05.0: enabled 1
APIC: 01: enabled 1
Initializing CBMEM area to 0x66ff0000 (65536 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 66ff0200...ok
High Tables Base is 66ff0000.
agesawrapper_amdinitlate: AmdLateParamsPtr = 2003C
CreatSystemTable: Start
CreatSystemTable: End
DispatchCpuFeatures: LateStart
DispatchCpuFeatures: LateEnd
AmdCpuLate: Start
AmdCpuLate: End

AmdInitLate: End

In agesawrapper_amdinitlate, AGESA generated ACPI tables:
   DmiTable:00000000
   AcpiPstate: 000200ef
   AcpiSrat:00000000
   AcpiSlit:00000000
   Mce:000204d9
   Cmc:0002057f
   Alib:0002061d
Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
Adding CBMEM entry as no. 2
Writing IRQ routing tables to 0x66ff0400...write_pirq_routing_table done.
PIRQ table: 48 bytes.
Wrote the mp table end at: 000f0410 - 000f0534
Adding CBMEM entry as no. 3
Wrote the mp table end at: 66ff1410 - 66ff1534
MP table: 308 bytes.
Adding CBMEM entry as no. 4
ACPI: Writing ACPI tables at 66ff2400...
ACPI:  * DSDT at 66ff24c8
ACPI:  * DSDT @ 66ff24c8 Length 2978
ACPI:  * FACS at 66ff4e40
ACPI:  * FADT at 66ff4e80
ACPI_BLK_BASE: 0x0800
ACPI: added table 1/32, length now 40
ACPI:  * HPET at 66ff4f78
ACPI: added table 2/32, length now 44
ACPI:  * MADT at 66ff4fb0
ACPI: added table 3/32, length now 48
ACPI:  * SRAT at 66ff5010
  AGESA SRAT table NULL. Skipping.
ACPI:  * SLIT at 66ff5010
  AGESA SLIT table NULL. Skipping.
ACPI:  * AGESA ALIB SSDT at 66ff5010
ACPI: added table 4/32, length now 52
ACPI:  * coreboot TOM SSDT2 at 66ff66a0
ACPI: added table 5/32, length now 56
ACPI: done.
ACPI tables: 17125 bytes.
Adding CBMEM entry as no. 5
smbios_write_tables: 66ffd800
Root Device (AMD Inagua Mainboard)
APIC_CLUSTER: 0 (AMD Family 14h Root Complex)
APIC: 00 (AMD CPU Family 14h)
PCI_DOMAIN: 0000 (AMD Family 14h Root Complex)
PCI: 00:00.0 (AMD Family 14h Northbridge)
PCI: 00:01.0 (AMD Family 14h Northbridge)
PCI: 00:01.1 (AMD Family 14h Northbridge)
PCI: 00:04.0 (AMD Family 14h Northbridge)
PCI: 00:05.0 (AMD Family 14h Northbridge)
PCI: 00:06.0 (AMD Family 14h Northbridge)
PCI: 00:07.0 (AMD Family 14h Northbridge)
PCI: 00:08.0 (AMD Family 14h Northbridge)
PCI: 00:11.0 (ATI SB800)
PCI: 00:12.0 (ATI SB800)
PCI: 00:12.1 (ATI SB800)
PCI: 00:12.2 (ATI SB800)
PCI: 00:13.0 (ATI SB800)
PCI: 00:13.1 (ATI SB800)
PCI: 00:13.2 (ATI SB800)
PCI: 00:14.0 (ATI SB800)
I2C: 00:50 ()
I2C: 00:51 ()
PCI: 00:14.1 (ATI SB800)
PCI: 00:14.2 (ATI SB800)
PCI: 00:14.3 (ATI SB800)
PNP: 002e.0 (Winbond W83627DHG Super I/O)
PNP: 002e.1 (Winbond W83627DHG Super I/O)
PNP: 002e.2 (Winbond W83627DHG Super I/O)
PNP: 002e.3 (Winbond W83627DHG Super I/O)
PNP: 002e.5 (Winbond W83627DHG Super I/O)
PNP: 002e.307 (Winbond W83627DHG Super I/O)
PNP: 002e.8 (Winbond W83627DHG Super I/O)
PNP: 002e.9 (Winbond W83627DHG Super I/O)
PNP: 002e.109 (Winbond W83627DHG Super I/O)
PNP: 002e.209 (Winbond W83627DHG Super I/O)
PNP: 002e.309 (Winbond W83627DHG Super I/O)
PNP: 002e.a (Winbond W83627DHG Super I/O)
PNP: 002e.b (Winbond W83627DHG Super I/O)
PNP: 002e.c (Winbond W83627DHG Super I/O)
PCI: 00:14.4 (ATI SB800)
PCI: 00:14.5 (ATI SB800)
PCI: 00:15.0 (ATI SB800)
PCI: 00:15.1 (ATI SB800)
PCI: 00:15.2 (ATI SB800)
PCI: 00:15.3 (ATI SB800)
PCI: 00:16.0 (ATI SB800)
PCI: 00:16.2 (ATI SB800)
PCI: 00:18.0 (AMD Family 14h Northbridge)
PCI: 00:18.1 (AMD Family 14h Northbridge)
PCI: 00:18.2 (AMD Family 14h Northbridge)
PCI: 00:18.3 (AMD Family 14h Northbridge)
PCI: 00:18.4 (AMD Family 14h Northbridge)
PCI: 00:18.5 (AMD Family 14h Northbridge)
PCI: 00:18.6 (AMD Family 14h Northbridge)
PCI: 00:18.7 (AMD Family 14h Northbridge)
PCI: 01:00.0 ()
PCI: 02:02.0 ()
PCI: 02:03.0 ()
PCI: 02:04.0 ()
PCI: 02:05.0 ()
APIC: 01 ()
SMBIOS tables: 262 bytes.
Adding CBMEM entry as no. 6
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518  checksum b8de
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x66ffe000
rom_table_end = 0x66ffe000
Adjust low_table_end from 0x00000518 to 0x00001000 
Adjust rom_table_end from 0x66ffe000 to 0x67000000 
Adding high table area
uma_memory_start=0x67000000, uma_memory_size=0x18000000 
coreboot memory table:
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-0000000066feffff: RAM
 3. 0000000066ff0000-0000000066ffffff: CONFIGURATION TABLES
 4. 0000000067000000-000000007effffff: RESERVED
 5. 00000000f8000000-00000000f8ffffff: RESERVED
Wrote coreboot table at: 66ffe000 - 66ffe1d4  checksum b84f
coreboot table: 468 bytes.
Multiboot Information structure has been written.
 0. FREE SPACE 67000000 00000000
 1. GDT        66ff0200 00000200
 2. IRQ TABLE  66ff0400 00001000
 3. SMP TABLE  66ff1400 00001000
 4. ACPI       66ff2400 0000b400
 5. SMBIOS     66ffd800 00000800
 6. COREBOOT   66ffe000 00002000
Searching for fallback/payload
Check cmos_layout.bin
Check pci1002,9804.rom
Check fallback/romstage
Check fallback/coreboot_ram
Check fallback/payload
Got a payload
Loading segment from rom address 0xffc93578
  data (compression=1)
  New segment dstaddr 0xea140 memsize 0x15ec0 srcaddr 0xffc935b0 filesize 0xb907
  (cleaned up) New segment addr 0xea140 size 0x15ec0 offset 0xffc935b0 filesize 0xb907
Loading segment from rom address 0xffc93594
  Entry Point 0x00000000
Loading Segment: addr: 0x00000000000ea140 memsz: 0x0000000000015ec0 filesz: 0x000000000000b907
lb: [0x0000000000200000, 0x0000000000360000)
Post relocation: addr: 0x00000000000ea140 memsz: 0x0000000000015ec0 filesz: 0x000000000000b907
using LZMA
[ 0x000ea140, 00100000, 0x00100000) <- ffc935b0
dest 000ea140, end 00100000, bouncebuffer 66d30000
Loaded segments
Jumping to boot code at fc9c1
entry    = 0x000fc9c1
lb_start = 0x00200000
lb_size  = 0x00160000
adjust   = 0x66c90000
buffer   = 0x66d30000
     elf_boot_notes = 0x0026fd54
adjusted_boot_notes = 0x66effd54
Start bios (version pre-1.6.4-20120120_152152-dkws01u)
Found mainboard AMD Inagua
Found CBFS header at 0xfffffbf0
Ram Size=0x66ff0000 (0x0000000000000000 high)
Relocating init from 0x000ea6f0 to 0x66fd66f0 (size 38896)
CPU Mhz=1000
Found 28 PCI devices (max PCI bus is 06)
Found 2 cpu(s) max supported 2 cpu(s)
Copying PIR from 0x66ff0400 to 0x000fdbc0
Copying MPTABLE from 0x66ff1400/66ff1410 to 0x000fda80
Copying ACPI RSDP from 0x66ff2400 to 0x000fda60
Copying SMBIOS entry point from 0x66ffd800 to 0x000fda40
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version pre-1.6.4-20120120_152152-dkws01u)

EHCI init on dev 00:12.2 (regs=0xf004b420)
EHCI init on dev 00:13.2 (regs=0xf004b520)
OHCI init on dev 00:14.5 (regs=0xf004a000)
Found 2 serial ports
ATA controller 1 at 1410/1420/0 (irq 0 dev 88)
ATA controller 2 at 1418/1424/0 (irq 0 dev 88)
OHCI init on dev 00:13.0 (regs=0xf0049000)
ata0-1: GLS85LS1004A CS 04GBN A101C0 ATA-8 Hard-Disk (3362 MiBytes)
Searching bootorder for: /pci@i0cf8/*@11/drive@0/disk@1
OHCI init on dev 00:12.0 (regs=0xf0048000)
ebda moved from 9fc00 to 9f800
USB mouse initialized
USB keyboard initialized
Initialized USB HUB (1 ports used)
All threads complete.
Scan for option roms
Press F12 for boot menu.

