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<TITLE>HP XW9300 the coreboot.rom failed</TITLE>
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<P><FONT SIZE=2>Hi,<BR>
<BR>
the HP XW9300 with coreboot failed.<BR>
I have before flashing the coreboot.rom, a backup from the bios<BR>
<BR>
OUTPUT:<BR>
<BR>
sudo flashrom -w coreboot.rom<BR>
flashrom v0.9.4-r1394 on Linux 3.0.0-12-generic (i686), built with libpci 3.1.7, GCC 4.6.1, little endian<BR>
flashrom is free software, get the source code at <A HREF="http://www.flashrom.org">http://www.flashrom.org</A><BR>
<BR>
Calibrating delay loop... OK.<BR>
Found chipset "NVIDIA CK804". Enabling flash write... OK.<BR>
WARNING: unexpected second chipset match: "NVIDIA CK804"<BR>
ignoring, please report lspci and board URL to flashrom@flashrom.org<BR>
with 'CHIPSET: your board name' in the subject line.<BR>
This chipset supports the following protocols: Non-SPI.<BR>
Found SST flash chip "SST49LF080A" (1024 kB, LPC) at physical address 0xfff00000.<BR>
Note: If the following flash access fails, try -m <vendor>:<mainboard>.<BR>
Reading old flash chip contents... done.<BR>
Erasing and writing flash chip... ERASE FAILED at 0x00000000! Expected=0xff, Read=0x48, failed byte count from 0x00000000-0x00000fff: 0x100<BR>
ERASE FAILED!<BR>
Reading current flash chip contents... done. ERASE FAILED at 0x00000000! Expected=0xff, Read=0x48, failed byte count from 0x00000000-0x0000ffff: 0x100<BR>
ERASE FAILED!<BR>
FAILED!<BR>
Uh oh. Erase/write failed. Checking if anything changed.<BR>
Good. It seems nothing was changed.<BR>
Writing to the flash chip apparently didn't do anything.<BR>
This means we have to add special support for your board, programmer or flash chip.<BR>
Please report this on IRC at irc.freenode.net (channel #flashrom) or<BR>
mail flashrom@flashrom.org!<BR>
-------------------------------------------------------------------------------<BR>
You may now reboot or simply leave the machine running.<BR>
<BR>
sudo flashrom -w hp.rom<BR>
flashrom v0.9.4-r1394 on Linux 3.0.0-12-generic (i686), built with libpci 3.1.7, GCC 4.6.1, little endian<BR>
flashrom is free software, get the source code at <A HREF="http://www.flashrom.org">http://www.flashrom.org</A><BR>
<BR>
Calibrating delay loop... OK.<BR>
Found chipset "NVIDIA CK804". Enabling flash write... OK.<BR>
WARNING: unexpected second chipset match: "NVIDIA CK804"<BR>
ignoring, please report lspci and board URL to flashrom@flashrom.org<BR>
with 'CHIPSET: your board name' in the subject line.<BR>
This chipset supports the following protocols: Non-SPI.<BR>
Found SST flash chip "SST49LF080A" (1024 kB, LPC) at physical address 0xfff00000.<BR>
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.<BR>
Reading old flash chip contents... done.<BR>
Erasing and writing flash chip... Erase/write done.<BR>
Verifying flash... VERIFIED.</FONT>
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