chip northbridge/amd/amdk8/root_complex			# Root complex
	device lapic_cluster 0 on			# APIC cluster
		chip cpu/amd/socket_AM2			# CPU
			device lapic 0 on end		# APIC
		end
	end

	device pci_domain 0 on			# PCI domain
		subsystemid 0x1043 0 inherit
		chip northbridge/amd/amdk8			# mc0
			device pci 18.0 on			# Northbridge
				# Devices on link 0, link 0 == LDT 0
				chip southbridge/via/k8t890		# "Southbridge" K8M890
					device pci 0.0 on end			# HT

					device pci 0.5 on #APIC SETUP
						chip drivers/generic/ioapic
							register "irq_on_fsb" = "1"
							register "base" = "0xfecc0000"
							device ioapic 9 on end
						end
					end

					device pci 1.0 on #AGP/iGFX (internal to chipset)
						device pci 0.0 on #PCIx16 slot
							#This is connected to SB IOAPIC via a PIN from chipset
							ioapic_irq 8 INTA 0x10
						end
					end

					device pci 2.0 on #PCIx16 slot
						ioapic_irq 9 INTA 0x3 #most likely wrong?
						device pci 0.0 on #PCIx16 slot
							ioapic_irq 9 INTA 0x0
							ioapic_irq 9 INTB 0x1
							ioapic_irq 9 INTC 0x2
							ioapic_irq 9 INTD 0x3
						end
					end

					device pci 2.0 on #PCIx1 slot
						ioapic_irq 9 INTA 0x3 #most likely wrong?
						device pci 0.0 on #PCIx16 slot
							ioapic_irq 9 INTA 0x4
							ioapic_irq 9 INTB 0x5
							ioapic_irq 9 INTC 0x6
							ioapic_irq 9 INTD 0x7
						end
					end
				end #end NB chip

				chip southbridge/via/vt8237r		# Southbridge
					register "ide0_enable" = "1"		# Enable IDE channel 0
					register "ide1_enable" = "1"		# Enable IDE channel 1
					register "ide0_80pin_cable" = "1"	# 80pin cable on IDE channel 0
					register "ide1_80pin_cable" = "1"	# 80pin cable on IDE channel 1
					register "fn_ctrl_lo" = "0xc0"	# Enable SB functions
					register "fn_ctrl_hi" = "0x1d"	# Enable SB functions

					device pci f.1 on #IDE
						ioapic_irq 8 INTB 0x14
					end

					device pci f.0 on #SATA
						ioapic_irq 8 INTA 0x15
					end

					device pci 10.0 on #USB
						ioapic_irq 8 INTA 0x14
					end

					device pci 10.1 on #USB
						ioapic_irq 8 INTB 0x16
					end

					device pci 10.2 on #USB
						ioapic_irq 8 INTC 0x15
					end

					device pci 10.3 on #USB
						ioapic_irq 8 INTC 0x17
					end

					device pci 10.4 on #USB
						ioapic_irq 8 INTC 0x15
					end

					device pci 11.0 on			# LPC

						chip drivers/generic/ioapic
							register "have_isa_interrupts" = "1"
							register "irq_on_fsb" = "1"
							register "enable_virtual_wire" = "1"
							register "base" = "0xfec00000"
							device ioapic 8 on end
						end

						chip drivers/generic/generic	# DIMM 0-0-0
							device i2c 50 on end
						end
						chip drivers/generic/generic	# DIMM 0-0-1
							device i2c 51 on end
						end
						chip drivers/generic/generic	# DIMM 0-1-0
							device i2c 52 on end
						end
						chip drivers/generic/generic	# DIMM 0-1-1
							device i2c 53 on end
						end
						chip superio/ite/it8712f		# Super I/O
							device pnp 2e.0 on		# Floppy
								io 0x60 = 0x3f0
								irq 0x70 = 6
								drq 0x74 = 2
							end
							device pnp 2e.1 on		# Com1
								io 0x60 = 0x3f8
								irq 0x70 = 4
							end
							device pnp 2e.2 off		# Com2
									io 0x60 = 0x2f8
								irq 0x70 = 3
							end
							device pnp 2e.3 on		# Parallel port
								io 0x60 = 0x378
								irq 0x70 = 7
							end
							device pnp 2e.4 on		# Environment controller
								io 0x60 = 0x290
								io 0x62 = 0x230
								irq 0x70 = 0x00
							end
							device pnp 2e.5 off end		# PS/2 keyboard
							device pnp 2e.6 off end		# PS/2 mouse
							device pnp 2e.7 off end		# GPIO config
							device pnp 2e.8 off end		# Midi port
							device pnp 2e.9 off end		# Game port
							device pnp 2e.a off end		# IR
						end #end superio
					end #end pci 11.0

					device pci 12.0 on # VIA LAN
						ioapic_irq 8 INTA 0x17
					end

					device pci 13.0 on #Audio Bridge
						ioapic_irq 8 INTC 0x16
						device pci 1.0 on # VIA AUDIO
							ioapic_irq 8 INTA 0x11
						end
					end

					device pci 13.1 on #PCI BUS
						ioapic_irq 8 INTA 0x14

						device pci 6.0 on # SLOT 6
							ioapic_irq 8 INTA 0x10
							ioapic_irq 8 INTB 0x11
							ioapic_irq 8 INTC 0x12
							ioapic_irq 8 INTD 0x13
						end

						device pci 7.0 on # SLOT 7
							ioapic_irq 8 INTA 0x11
							ioapic_irq 8 INTB 0x12
							ioapic_irq 8 INTC 0x13
							ioapic_irq 8 INTD 0x10
						end
					end
				end  #SB end chip
			end #end LDT0 18.0
			device pci 18.1 on end
			device pci 18.2 on end
			device pci 18.3 on end
		end #mc0
	end #pci_domain
end #root complex
