======= Wed Apr 3 09:28:02 2013 (adjust=86.8us) 00.000: <00> 00.726: 00.726: 00.726: coreboot-4.0-3962-g60a4a73 Tue Apr 2 22:32:15 CEST 2013 starting... 00.726: BSP Family_Model: 00500f10 00.727: cpu_init_detectedx = 00000000 00.727: agesawrapper_amdinitmmio passed. 00.727: agesawrapper_amdinitreset passed. 00.731: agesawrapper_amdinitearly BSP Family_Model: 00500f10 00.756: cpu_init_detectedx = 00000001 00.756: agesawrapper_amdinitmmio passed. 00.757: agesawrapper_amdinitreset passed. 00.761: agesawrapper_amdinitearly passed. 00.896: agesawrapper_amdinitpost passed. 01.021: agesawrapper_amdinitenv passed. 01.036: Loading image. 01.036: CBFS: Looking for 'fallback/coreboot_ram' starting from 0x0. 01.036: CBFS: (unmatched file @0x0: cmos_layout.bin) 01.037: CBFS: (unmatched file @0x740: pci1002,9802.rom) 01.037: CBFS: (unmatched file @0x10780: fallback/romstage) 01.037: CBFS: Found file (offset=0x653b8, len=205987). 01.037: CBFS: loading stage fallback/coreboot_ram @ 0x200000 (1507384 bytes), entry @ 0x200000 01.142: Jumping to image. 01.143: coreboot-4.0-3962-g60a4a73 Tue Apr 2 22:32:15 CEST 2013 booting... 01.143: Enumerating buses... 01.143: Show all devs...Before device enumeration. 01.143: Root Device: enabled 1 01.143: CPU_CLUSTER: 0: enabled 1 01.143: APIC: 00: enabled 1 01.143: DOMAIN: 0000: enabled 1 01.143: PCI: 00:00.0: enabled 1 01.143: PCI: 00:01.0: enabled 1 01.143: PCI: 00:01.1: enabled 1 01.143: PCI: 00:04.0: enabled 1 01.143: PCI: 00:05.0: enabled 0 01.143: PCI: 00:06.0: enabled 0 01.143: PCI: 00:07.0: enabled 0 01.143: PCI: 00:08.0: enabled 0 01.143: PCI: 00:11.0: enabled 1 01.143: PCI: 00:12.0: enabled 1 01.143: PCI: 00:12.2: enabled 1 01.144: PCI: 00:13.0: enabled 1 01.143: PCI: 00:13.2: enabled 1 01.143: PCI: 00:14.0: enabled 1 01.143: I2C: 00:50: enabled 1 01.143: I2C: 00:51: enabled 1 01.143: PCI: 00:14.1: enabled 1 01.143: PCI: 00:14.2: enabled 1 01.143: PCI: 00:14.3: enabled 1 01.143: PNP: 002e.0: enabled 0 01.143: PNP: 002e.1: enabled 0 01.143: PNP: 002e.2: enabled 1 01.143: PNP: 002e.3: enabled 0 01.143: PNP: 002e.5: enabled 1 01.143: PNP: 002e.6: enabled 0 01.143: PNP: 002e.7: enabled 0 01.143: PNP: 002e.8: enabled 0 01.143: PNP: 002e.9: enabled 0 01.143: PNP: 002e.a: enabled 1 01.143: PNP: 002e.b: enabled 1 01.143: PCI: 00:14.4: enabled 1 01.143: PCI: 00:14.5: enabled 1 01.143: PCI: 00:15.0: enabled 1 01.143: PCI: 00:15.1: enabled 1 01.143: PCI: 00:15.2: enabled 1 01.143: PCI: 00:15.3: enabled 0 01.143: PCI: 00:16.0: enabled 0 01.143: PCI: 00:16.2: enabled 0 01.143: PCI: 00:18.0: enabled 1 01.143: PCI: 00:18.1: enabled 1 01.143: PCI: 00:18.2: enabled 1 01.143: PCI: 00:18.3: enabled 1 01.143: PCI: 00:18.4: enabled 1 01.143: PCI: 00:18.5: enabled 1 01.143: PCI: 00:18.6: enabled 1 01.143: PCI: 00:18.7: enabled 1 01.143: Compare with tree... 01.143: Root Device: enabled 1 01.143: CPU_CLUSTER: 0: enabled 1 01.143: APIC: 00: enabled 1 01.143: DOMAIN: 0000: enabled 1 01.143: PCI: 00:00.0: enabled 1 01.143: PCI: 00:01.0: enabled 1 01.143: PCI: 00:01.1: enabled 1 01.144: PCI: 00:04.0: enabled 1 01.143: PCI: 00:05.0: enabled 0 01.143: PCI: 00:06.0: enabled 0 01.143: PCI: 00:07.0: enabled 0 01.143: PCI: 00:08.0: enabled 0 01.143: PCI: 00:11.0: enabled 1 01.143: PCI: 00:12.0: enabled 1 01.143: PCI: 00:12.2: enabled 1 01.144: PCI: 00:13.0: enabled 1 01.144: PCI: 00:13.2: enabled 1 01.144: PCI: 00:14.0: enabled 1 01.144: I2C: 00:50: enabled 1 01.144: I2C: 00:51: enabled 1 01.144: PCI: 00:14.1: enabled 1 01.144: PCI: 00:14.2: enabled 1 01.144: PCI: 00:14.3: enabled 1 01.143: PNP: 002e.0: enabled 0 01.144: PNP: 002e.1: enabled 0 01.144: PNP: 002e.2: enabled 1 01.144: PNP: 002e.3: enabled 0 01.144: PNP: 002e.5: enabled 1 01.144: PNP: 002e.6: enabled 0 01.144: PNP: 002e.7: enabled 0 01.144: PNP: 002e.8: enabled 0 01.144: PNP: 002e.9: enabled 0 01.144: PNP: 002e.a: enabled 1 01.144: PNP: 002e.b: enabled 1 01.144: PCI: 00:14.4: enabled 1 01.144: PCI: 00:14.5: enabled 1 01.144: PCI: 00:15.0: enabled 1 01.144: PCI: 00:15.1: enabled 1 01.144: PCI: 00:15.2: enabled 1 01.144: PCI: 00:15.3: enabled 0 01.144: PCI: 00:16.0: enabled 0 01.144: PCI: 00:16.2: enabled 0 01.144: PCI: 00:18.0: enabled 1 01.144: PCI: 00:18.1: enabled 1 01.144: PCI: 00:18.2: enabled 1 01.144: PCI: 00:18.3: enabled 1 01.144: PCI: 00:18.4: enabled 1 01.144: PCI: 00:18.5: enabled 1 01.144: PCI: 00:18.6: enabled 1 01.144: PCI: 00:18.7: enabled 1 01.144: Mainboard E350M1 Enable. 01.144: scan_static_bus for Root Device 01.144: setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000 01.144: setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000002 01.144: setup_uma_memory: uma size 0x18000000, memory start 0xc8000000 01.144: CPU_CLUSTER: 0 enabled 01.144: DOMAIN: 0000 enabled 01.144: CPU_CLUSTER: 0 scanning... 01.144: AP siblings=1 01.144: CPU: APIC: 00 enabled 01.144: CPU: APIC: 01 enabled 01.144: DOMAIN: 0000 scanning... 01.144: PCI: pci_scan_bus for bus 00 01.144: PCI: 00:00.0 [1022/1510] ops 01.144: PCI: 00:00.0 [1022/1510] enabled 01.144: PCI: 00:01.0 [1002/9802] enabled 01.144: PCI: 00:01.1 [1002/1314] enabled 01.144: PCI: Static device PCI: 00:04.0 not found, disabling it. 01.144: sb800_enable() SB800 - Smbus.c - alink_ab_indx - Start. 01.144: SB800 - Smbus.c - alink_ab_indx - End. 01.144: PCI: 00:11.0 [1002/4390] enabled 01.144: sb800_enable() PCI: 00:12.0 [1002/4397] ops 01.145: PCI: 00:12.0 [1002/4397] enabled 01.144: sb800_enable() PCI: 00:12.2 [1002/4396] ops 01.145: PCI: 00:12.2 [1002/4396] enabled 01.145: sb800_enable() PCI: 00:13.0 [1002/4397] ops 01.144: PCI: 00:13.0 [1002/4397] enabled 01.145: sb800_enable() PCI: 00:13.2 [1002/4396] ops 01.145: PCI: 00:13.2 [1002/4396] enabled 01.145: sb800_enable() sm_init(). 01.145: IOAPIC: Clearing IOAPIC at 0xfec00000 01.145: IOAPIC: 24 interrupts 01.145: IOAPIC: reg 0x00000000 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 01.146: IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 01.144: IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 01.145: IOAPIC: Initializing IOAPIC at 0xfec00000 01.145: IOAPIC: Bootstrap Processor Local APIC = 0x00 01.145: IOAPIC: ID = 0x02 01.145: IOAPIC: 24 interrupts 01.145: IOAPIC: Enabling interrupts on FSB 01.145: IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 01.145: IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 01.145: IOAPIC: reg 0x00000017 value 0x00000000 0x00010000 01.145: PCI: 00:14.0 [1002/4385] enabled 01.145: sb800_enable() PCI: Static device PCI: 00:14.1 not found, disabling it. 01.145: sb800_enable() hda enabled 01.145: PCI: 00:14.2 [1002/4383] ops 01.145: PCI: 00:14.2 [1002/4383] enabled 01.146: sb800_enable() PCI: 00:14.3 [1002/439d] bus ops 01.145: PCI: 00:14.3 [1002/439d] enabled 01.145: sb800_enable() PCI: 00:14.4 [1002/4384] bus ops 01.145: PCI: 00:14.4 [1002/4384] enabled 01.145: sb800_enable() PCI: 00:14.5 [1002/4399] ops 01.145: PCI: 00:14.5 [1002/4399] enabled 01.146: sb800_enable() Capability: type 0x01 @ 0x50 01.145: Capability: type 0x10 @ 0x58 01.146: Capability: type 0x0d @ 0xb0 01.146: Capability: type 0x08 @ 0xb8 01.146: Capability: type 0x01 @ 0x50 01.146: Capability: type 0x10 @ 0x58 01.146: PCI: 00:15.0 subordinate bus PCI Express 01.146: PCI: 00:15.0 [1002/43a0] enabled 01.146: sb800_enable() PCI: 00:16.0 [1002/4397] ops 01.146: PCI: 00:16.0 [1002/4397] disabled 01.146: sb800_enable() SB800 - Late.c - sb800_callout_entry - Start. 01.534: SB800 - Late.c - sb800_callout_entry - End. 01.534: SB800 - Late.c - sb800_callout_entry - Start. 01.534: SB800 - Late.c - sb800_callout_entry - End. 05.227: SB800 - Late.c - sb800_callout_entry - Start. 05.227: SB800 - Late.c - sb800_callout_entry - End. 05.228: SB800 - Late.c - sb800_callout_entry - Start. 05.228: SB800 - Late.c - sb800_callout_entry - End. 16.338: SB800 - Late.c - sb800_callout_entry - Start. 16.338: SB800 - Late.c - sb800_callout_entry - End. 16.339: SB800 - Late.c - sb800_callout_entry - Start. 16.339: SB800 - Late.c - sb800_callout_entry - End. 28.124: SB800 - Late.c - sb800_callout_entry - Start. 28.124: SB800 - Late.c - sb800_callout_entry - End. 28.124: SB800 - Late.c - sb800_callout_entry - Start. 28.124: SB800 - Late.c - sb800_callout_entry - End. 35.189: SB800 - Late.c - sb800_callout_entry - Start. 35.189: SB800 - Late.c - sb800_callout_entry - End. 35.189: SB800 - Late.c - sb800_callout_entry - Start. 35.189: SB800 - Late.c - sb800_callout_entry - End. 40.231: SB800 - Late.c - sb800_callout_entry - Start. 40.231: SB800 - Late.c - sb800_callout_entry - End. 40.231: SB800 - Late.c - sb800_callout_entry - Start. 40.231: SB800 - Late.c - sb800_callout_entry - End. 50.668: SB800 - Late.c - sb800_callout_entry - Start. 50.668: SB800 - Late.c - sb800_callout_entry - End. 50.668: SB800 - Late.c - sb800_callout_entry - Start. 50.668: SB800 - Late.c - sb800_callout_entry - End. 55.035: SB800 - Late.c - sb800_callout_entry - Start. 55.035: SB800 - Late.c - sb800_callout_entry - End. 55.035: SB800 - Late.c - sb800_callout_entry - Start. 55.036: SB800 - Late.c - sb800_callout_entry - End. 55.036: PCI: 00:18.0 [1022/1700] enabled 55.036: PCI: 00:18.1 [1022/1701] enabled 55.036: PCI: 00:18.2 [1022/1702] enabled 55.036: PCI: 00:18.3 [1022/1703] enabled 55.036: PCI: 00:18.4 [1022/1704] enabled 55.036: PCI: 00:18.5 [1022/1718] enabled 55.036: PCI: 00:18.6 [1022/1716] enabled 55.036: PCI: 00:18.7 [1022/1719] enabled 55.036: PCI: Left over static devices: 55.036: PCI: 00:15.1 55.036: PCI: 00:15.2 55.036: PCI: 00:15.3 55.036: PCI: Check your devicetree.cb. 55.036: scan_static_bus for PCI: 00:14.3 55.036: PNP: 002e.0 disabled 55.036: PNP: 002e.1 disabled 55.036: PNP: 002e.2 enabled 55.036: PNP: 002e.3 disabled 55.036: PNP: 002e.5 enabled 55.036: PNP: 002e.6 disabled 55.036: PNP: 002e.7 disabled 55.036: PNP: 002e.8 disabled 55.036: PNP: 002e.9 disabled 55.036: PNP: 002e.a enabled 55.036: PNP: 002e.b enabled 55.036: scan_static_bus for PCI: 00:14.3 done 55.037: do_pci_scan_bridge for PCI: 00:14.4 55.036: PCI: pci_scan_bus for bus 01 55.036: PCI: pci_scan_bus returning with max=001 55.036: do_pci_scan_bridge returns max 1 55.036: do_pci_scan_bridge for PCI: 00:15.0 55.036: PCI: pci_scan_bus for bus 02 55.037: PCI: pci_scan_bus returning with max=002 55.037: do_pci_scan_bridge returns max 2 55.037: PCI: pci_scan_bus returning with max=002 55.037: scan_static_bus for Root Device done 55.037: done 55.037: found VGA at PCI: 00:01.0 55.037: Setting up VGA for PCI: 00:01.0 55.037: Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 55.037: Setting PCI_BRIDGE_CTL_VGA for bridge Root Device 55.037: Allocating resources... 55.037: Reading resources... 55.037: Root Device read_resources bus 0 link: 0 55.037: CPU_CLUSTER: 0 read_resources bus 0 link: 0 55.037: APIC: 00 missing read_resources 55.037: APIC: 01 missing read_resources 55.037: CPU_CLUSTER: 0 read_resources bus 0 link: 0 done 55.037: 55.037: Fam14h - domain_read_resources 55.037: DOMAIN: 0000 read_resources bus 0 link: 0 55.037: 55.037: Fam14h - nb_read_resources 55.037: PCI: 00:14.0 read_resources bus 0 link: 0 55.038: I2C: 00:50 missing read_resources 55.037: I2C: 00:51 missing read_resources 55.038: PCI: 00:14.0 read_resources bus 0 link: 0 done 55.038: SB800 - Lpc.c - lpc_read_resources - Start. 55.038: SB800 - Lpc.c - lpc_read_resources - End. 55.038: PCI: 00:14.3 read_resources bus 0 link: 0 55.038: PCI: 00:14.3 read_resources bus 0 link: 0 done 55.038: PCI: 00:14.4 read_resources bus 1 link: 0 55.038: PCI: 00:14.4 read_resources bus 1 link: 0 done 55.038: PCI: 00:15.0 register 10(ffffffff), read-only ignoring it 55.038: PCI: 00:15.0 register 14(ffffffff), read-only ignoring it 55.038: PCI: 00:15.0 register 38(ffffffff), read-only ignoring it 55.038: PCI: 00:15.0 read_resources bus 2 link: 0 55.038: PCI: 00:15.0 read_resources bus 2 link: 0 done 55.038: DOMAIN: 0000 read_resources bus 0 link: 0 done 55.039: Root Device read_resources bus 0 link: 0 done 55.039: Done reading resources. 55.039: Show resources in subtree (Root Device)...After reading. 55.039: Root Device child on link 0 CPU_CLUSTER: 0 55.039: CPU_CLUSTER: 0 child on link 0 APIC: 00 55.039: APIC: 00 55.039: APIC: 01 55.039: DOMAIN: 0000 child on link 0 PCI: 00:00.0 55.039: DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 55.039: DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 55.039: PCI: 00:00.0 55.039: PCI: 00:00.0 resource base f8000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 55.039: PCI: 00:01.0 55.039: PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10 55.039: PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14 55.039: PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18 55.039: PCI: 00:01.1 55.039: PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10 55.039: PCI: 00:04.0 55.039: PCI: 00:05.0 55.039: PCI: 00:06.0 55.039: PCI: 00:07.0 55.039: PCI: 00:08.0 55.039: PCI: 00:11.0 55.039: PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 55.039: PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 55.039: PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 55.039: PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c 55.039: PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 55.039: PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24 55.039: PCI: 00:12.0 55.039: PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 55.039: PCI: 00:12.2 55.039: PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 55.039: PCI: 00:13.0 55.039: PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 55.039: PCI: 00:13.2 55.039: PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 55.039: PCI: 00:14.0 child on link 0 I2C: 00:50 55.039: I2C: 00:50 55.039: I2C: 00:51 55.039: PCI: 00:14.1 55.039: PCI: 00:14.2 55.039: PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 55.039: PCI: 00:14.3 child on link 0 PNP: 002e.0 55.039: PCI: 00:14.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 200 index a0 55.039: PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 55.040: PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 55.040: PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 55.040: PNP: 002e.0 55.040: PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 55.040: PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 55.040: PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74 55.040: PNP: 002e.1 55.040: PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 55.040: PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 55.040: PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 55.040: PNP: 002e.2 55.040: PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 55.040: PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 55.040: PNP: 002e.3 55.040: PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 55.040: PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 55.040: PNP: 002e.5 55.040: PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60 55.040: PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62 55.040: PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 55.040: PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72 55.040: PNP: 002e.6 55.040: PNP: 002e.6 resource base 100 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 55.040: PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 55.040: PNP: 002e.7 55.040: PNP: 002e.7 resource base 220 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60 55.040: PNP: 002e.7 resource base 300 size 2 align 1 gran 1 limit 7ff flags c0000100 index 62 55.040: PNP: 002e.7 resource base 9 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 55.040: PNP: 002e.8 55.040: PNP: 002e.9 55.041: PNP: 002e.a 55.041: PNP: 002e.b 55.041: PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags c0000100 index 60 55.041: PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 55.041: PCI: 00:14.4 55.041: PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c 55.041: PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24 55.041: PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 55.041: PCI: 00:14.5 55.041: PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 55.041: PCI: 00:15.0 55.041: PCI: 00:16.0 55.041: PCI: 00:16.2 55.041: PCI: 00:18.0 55.041: PCI: 00:18.1 55.041: PCI: 00:18.2 55.041: PCI: 00:18.3 55.041: PCI: 00:18.4 55.041: PCI: 00:18.5 55.041: PCI: 00:18.6 55.041: PCI: 00:18.7 55.041: DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff 55.041: PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff 55.041: PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done 55.041: PCI: 00:01.0 14 * [0x0 - 0xff] io 55.041: PCI: 00:11.0 20 * [0x400 - 0x40f] io 55.041: PCI: 00:11.0 10 * [0x410 - 0x417] io 55.041: PCI: 00:11.0 18 * [0x418 - 0x41f] io 55.041: PCI: 00:11.0 14 * [0x420 - 0x423] io 55.041: PCI: 00:11.0 1c * [0x424 - 0x427] io 55.041: DOMAIN: 0000 compute_resources_io: base: 428 size: 428 align: 8 gran: 0 limit: ffff done 55.041: DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff 55.041: PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff 55.041: PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done 55.040: PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff 55.041: PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done 55.040: PCI: 00:01.0 10 * [0x0 - 0xfffffff] prefmem 55.041: PCI: 00:01.0 18 * [0x10000000 - 0x1003ffff] mem 55.041: PCI: 00:01.1 10 * [0x10040000 - 0x10043fff] mem 55.041: PCI: 00:14.2 10 * [0x10044000 - 0x10047fff] mem 55.041: PCI: 00:12.0 10 * [0x10048000 - 0x10048fff] mem 55.041: PCI: 00:13.0 10 * [0x10049000 - 0x10049fff] mem 55.041: PCI: 00:14.5 10 * [0x1004a000 - 0x1004afff] mem 55.041: PCI: 00:11.0 24 * [0x1004b000 - 0x1004b3ff] mem 55.041: PCI: 00:12.2 10 * [0x1004b400 - 0x1004b4ff] mem 55.041: PCI: 00:13.2 10 * [0x1004b500 - 0x1004b5ff] mem 55.041: PCI: 00:14.3 a0 * [0x1004b600 - 0x1004b600] mem 55.041: DOMAIN: 0000 compute_resources_mem: base: 1004b601 size: 1004b601 align: 28 gran: 0 limit: ffffffff done 55.041: avoid_fixed_resources: DOMAIN: 0000 55.041: avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff 55.041: avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff 55.041: constrain_resources: DOMAIN: 0000 55.041: constrain_resources: PCI: 00:00.0 55.041: constrain_resources: PCI: 00:01.0 55.041: constrain_resources: PCI: 00:01.1 55.041: constrain_resources: PCI: 00:11.0 55.041: constrain_resources: PCI: 00:12.0 55.041: constrain_resources: PCI: 00:12.2 55.041: constrain_resources: PCI: 00:13.0 55.041: constrain_resources: PCI: 00:13.2 55.041: constrain_resources: PCI: 00:14.0 55.041: constrain_resources: I2C: 00:50 55.041: constrain_resources: I2C: 00:51 55.041: constrain_resources: PCI: 00:14.2 55.041: constrain_resources: PCI: 00:14.3 55.041: constrain_resources: PNP: 002e.2 55.041: constrain_resources: PNP: 002e.5 55.041: constrain_resources: PNP: 002e.a 55.041: constrain_resources: PNP: 002e.b 55.041: constrain_resources: PCI: 00:14.4 55.041: constrain_resources: PCI: 00:14.5 55.041: constrain_resources: PCI: 00:15.0 55.041: constrain_resources: PCI: 00:18.0 55.041: constrain_resources: PCI: 00:18.1 55.041: constrain_resources: PCI: 00:18.2 55.041: constrain_resources: PCI: 00:18.3 55.041: constrain_resources: PCI: 00:18.4 55.041: constrain_resources: PCI: 00:18.5 55.041: constrain_resources: PCI: 00:18.6 55.041: constrain_resources: PCI: 00:18.7 55.041: avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff 55.041: <09>lim->base 00001000 lim->limit 0000ffff 55.041: avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff 55.041: <09>lim->base 00000000 lim->limit f7ffffff 55.041: Setting resources... 55.041: DOMAIN: 0000 allocate_resources_io: base:1000 size:428 align:8 gran:0 limit:ffff 55.041: Assigned: PCI: 00:01.0 14 * [0x1000 - 0x10ff] io 55.041: Assigned: PCI: 00:11.0 20 * [0x1400 - 0x140f] io 55.041: Assigned: PCI: 00:11.0 10 * [0x1410 - 0x1417] io 55.041: Assigned: PCI: 00:11.0 18 * [0x1418 - 0x141f] io 55.041: Assigned: PCI: 00:11.0 14 * [0x1420 - 0x1423] io 55.041: Assigned: PCI: 00:11.0 1c * [0x1424 - 0x1427] io 55.041: DOMAIN: 0000 allocate_resources_io: next_base: 1428 size: 428 align: 8 gran: 0 done 55.041: PCI: 00:14.4 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff 55.041: PCI: 00:14.4 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done 55.041: DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:1004b601 align:28 gran:0 limit:f7ffffff 55.041: Assigned: PCI: 00:01.0 10 * [0xe0000000 - 0xefffffff] prefmem 55.041: Assigned: PCI: 00:01.0 18 * [0xf0000000 - 0xf003ffff] mem 55.041: Assigned: PCI: 00:01.1 10 * [0xf0040000 - 0xf0043fff] mem 55.041: Assigned: PCI: 00:14.2 10 * [0xf0044000 - 0xf0047fff] mem 55.041: Assigned: PCI: 00:12.0 10 * [0xf0048000 - 0xf0048fff] mem 55.041: Assigned: PCI: 00:13.0 10 * [0xf0049000 - 0xf0049fff] mem 55.041: Assigned: PCI: 00:14.5 10 * [0xf004a000 - 0xf004afff] mem 55.041: Assigned: PCI: 00:11.0 24 * [0xf004b000 - 0xf004b3ff] mem 55.041: Assigned: PCI: 00:12.2 10 * [0xf004b400 - 0xf004b4ff] mem 55.041: Assigned: PCI: 00:13.2 10 * [0xf004b500 - 0xf004b5ff] mem 55.041: Assigned: PCI: 00:14.3 a0 * [0xf004b600 - 0xf004b600] mem 55.041: DOMAIN: 0000 allocate_resources_mem: next_base: f004b601 size: 1004b601 align: 28 gran: 0 done 55.041: PCI: 00:14.4 allocate_resources_prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff 55.041: PCI: 00:14.4 allocate_resources_prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done 55.041: PCI: 00:14.4 allocate_resources_mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff 55.041: PCI: 00:14.4 allocate_resources_mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done 55.041: Root Device assign_resources, bus 0 link: 0 55.041: 55.041: Fam14h - domain_set_resources 55.041: amsr - incoming dev = 0027a9a0 55.041: adsr: (before) basek = 0, limitk = 21effffff. 55.041: adsr: (after) basek = 0, limitk = 87bfff, sizek = 87c000. 55.041: adsr - 0xa0000 to 0xbffff resource. 55.041: adsr: mmio_basek=00380000, basek=00000300, limitk=0087bfff 55.041: split: 128K table at =c7fe0000 55.041: 0: mmio_basek=00380000, basek=00400000, limitk=0087bfff 55.041: adsr - mmio_basek = 380000. 55.042: adsr - high_tables_size = 20000. 55.042: DOMAIN: 0000 assign_resources, bus 0 link: 0 55.041: 55.041: Fam14h - nb_set_resources 55.041: 55.041: Fam14h - create_vga_resource 55.041: 55.041: Fam14h - set_resource 55.041: PCI: 00:00.0 c0010058 <- [0x00f8000000 - 0x00f8ffffff] size 0x01000000 gran 0x00 mem 55.041: PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem 55.042: PCI: 00:01.0 14 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io 55.041: PCI: 00:01.0 18 <- [0x00f0000000 - 0x00f003ffff] size 0x00040000 gran 0x12 mem 55.042: PCI: 00:01.1 10 <- [0x00f0040000 - 0x00f0043fff] size 0x00004000 gran 0x0e mem 55.041: PCI: 00:11.0 10 <- [0x0000001410 - 0x0000001417] size 0x00000008 gran 0x03 io 55.042: PCI: 00:11.0 14 <- [0x0000001420 - 0x0000001423] size 0x00000004 gran 0x02 io 55.042: PCI: 00:11.0 18 <- [0x0000001418 - 0x000000141f] size 0x00000008 gran 0x03 io 55.042: PCI: 00:11.0 1c <- [0x0000001424 - 0x0000001427] size 0x00000004 gran 0x02 io 55.042: PCI: 00:11.0 20 <- [0x0000001400 - 0x000000140f] size 0x00000010 gran 0x04 io 55.042: PCI: 00:11.0 24 <- [0x00f004b000 - 0x00f004b3ff] size 0x00000400 gran 0x0a mem 55.042: PCI: 00:12.0 10 <- [0x00f0048000 - 0x00f0048fff] size 0x00001000 gran 0x0c mem 55.042: PCI: 00:12.2 10 <- [0x00f004b400 - 0x00f004b4ff] size 0x00000100 gran 0x08 mem 55.042: PCI: 00:13.0 10 <- [0x00f0049000 - 0x00f0049fff] size 0x00001000 gran 0x0c mem 55.042: PCI: 00:13.2 10 <- [0x00f004b500 - 0x00f004b5ff] size 0x00000100 gran 0x08 mem 55.042: PCI: 00:14.2 10 <- [0x00f0044000 - 0x00f0047fff] size 0x00004000 gran 0x0e mem64 55.042: SB800 - Lpc.c - lpc_set_resources - Start. 55.042: PCI: 00:14.3 a0 <- [0x00f004b602 - 0x00f004b602] size 0x00000001 gran 0x00 mem 55.042: PCI: 00:14.3 assign_resources, bus 0 link: 0 55.042: PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io 55.042: PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq 55.042: PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io 55.042: PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io 55.042: PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq 55.042: PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq 55.042: PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io 55.042: PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] size 0x00000001 gran 0x00 irq 55.042: PCI: 00:14.3 assign_resources, bus 0 link: 0 55.042: SB800 - Lpc.c - lpc_set_resources - End. 55.042: PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io 55.042: PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem 55.042: PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem 55.042: PCI: 00:14.5 10 <- [0x00f004a000 - 0x00f004afff] size 0x00001000 gran 0x0c mem 55.042: DOMAIN: 0000 assign_resources, bus 0 link: 0 55.042: adsr - leaving this lovely routine. 55.042: Root Device assign_resources, bus 0 link: 0 55.042: Done setting resources. 55.042: Show resources in subtree (Root Device)...After assigning values. 55.042: Root Device child on link 0 CPU_CLUSTER: 0 55.042: CPU_CLUSTER: 0 child on link 0 APIC: 00 55.042: APIC: 00 55.042: APIC: 01 55.042: DOMAIN: 0000 child on link 0 PCI: 00:00.0 55.042: DOMAIN: 0000 resource base 1000 size 428 align 8 gran 0 limit ffff flags 40040100 index 10000000 55.042: DOMAIN: 0000 resource base e0000000 size 1004b601 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100 55.042: DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 55.042: DOMAIN: 0000 resource base c0000 size dff40000 align 0 gran 0 limit 0 flags e0004200 index 20 55.042: DOMAIN: 0000 resource base 100000000 size 11efffc00 align 0 gran 0 limit 0 flags e0004200 index 30 55.042: DOMAIN: 0000 resource base c8000000 size 18000000 align 0 gran 0 limit 0 flags f0000200 index 7 55.042: PCI: 00:00.0 55.042: PCI: 00:00.0 resource base f8000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 55.042: PCI: 00:01.0 55.042: PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit f7ffffff flags 60001200 index 10 55.042: PCI: 00:01.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 14 55.042: PCI: 00:01.0 resource base f0000000 size 40000 align 18 gran 18 limit f7ffffff flags 60000200 index 18 55.042: PCI: 00:01.1 55.042: PCI: 00:01.1 resource base f0040000 size 4000 align 14 gran 14 limit f7ffffff flags 60000200 index 10 55.042: PCI: 00:04.0 55.042: PCI: 00:05.0 55.042: PCI: 00:06.0 55.042: PCI: 00:07.0 55.042: PCI: 00:08.0 55.043: PCI: 00:11.0 55.042: PCI: 00:11.0 resource base 1410 size 8 align 3 gran 3 limit ffff flags 60000100 index 10 55.042: PCI: 00:11.0 resource base 1420 size 4 align 2 gran 2 limit ffff flags 60000100 index 14 55.042: PCI: 00:11.0 resource base 1418 size 8 align 3 gran 3 limit ffff flags 60000100 index 18 55.042: PCI: 00:11.0 resource base 1424 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c 55.042: PCI: 00:11.0 resource base 1400 size 10 align 4 gran 4 limit ffff flags 60000100 index 20 55.043: PCI: 00:11.0 resource base f004b000 size 400 align 10 gran 10 limit f7ffffff flags 60000200 index 24 55.042: PCI: 00:12.0 55.043: PCI: 00:12.0 resource base f0048000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10 55.043: PCI: 00:12.2 55.043: PCI: 00:12.2 resource base f004b400 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10 55.043: PCI: 00:13.0 55.043: PCI: 00:13.0 resource base f0049000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10 55.043: PCI: 00:13.2 55.043: PCI: 00:13.2 resource base f004b500 size 100 align 8 gran 8 limit f7ffffff flags 60000200 index 10 55.043: PCI: 00:14.0 child on link 0 I2C: 00:50 55.043: I2C: 00:50 55.044: I2C: 00:51 55.043: PCI: 00:14.1 55.043: PCI: 00:14.2 55.043: PCI: 00:14.2 resource base f0044000 size 4000 align 14 gran 14 limit f7ffffff flags 60000201 index 10 55.043: PCI: 00:14.3 child on link 0 PNP: 002e.0 55.043: PCI: 00:14.3 resource base f004b602 size 1 align 0 gran 0 limit f7ffffff flags 60000200 index a0 55.043: PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 55.043: PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 55.043: PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 55.043: PNP: 002e.0 55.043: PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 55.043: PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 55.043: PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74 55.043: PNP: 002e.1 55.043: PNP: 002e.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 55.043: PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 55.044: PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 55.043: PNP: 002e.2 55.043: PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 55.043: PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 55.043: PNP: 002e.3 55.043: PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 55.043: PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 55.043: PNP: 002e.5 55.043: PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60 55.043: PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62 55.043: PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 55.043: PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72 55.043: PNP: 002e.6 55.043: PNP: 002e.6 resource base 100 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 55.043: PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 55.043: PNP: 002e.7 55.043: PNP: 002e.7 resource base 220 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60 55.043: PNP: 002e.7 resource base 300 size 2 align 1 gran 1 limit 7ff flags c0000100 index 62 55.043: PNP: 002e.7 resource base 9 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 55.043: PNP: 002e.8 55.043: PNP: 002e.9 55.043: PNP: 002e.a 55.043: PNP: 002e.b 55.043: PNP: 002e.b resource base 290 size 8 align 3 gran 3 limit fff flags e0000100 index 60 55.043: PNP: 002e.b resource base 5 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 55.043: PCI: 00:14.4 55.044: PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c 55.044: PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 55.043: PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 55.043: PCI: 00:14.5 55.043: PCI: 00:14.5 resource base f004a000 size 1000 align 12 gran 12 limit f7ffffff flags 60000200 index 10 55.043: PCI: 00:15.0 55.043: PCI: 00:16.0 55.044: PCI: 00:16.2 55.043: PCI: 00:18.0 55.044: PCI: 00:18.1 55.044: PCI: 00:18.2 55.044: PCI: 00:18.3 55.044: PCI: 00:18.4 55.044: PCI: 00:18.5 55.044: PCI: 00:18.6 55.044: PCI: 00:18.7 55.044: Done allocating resources. 55.044: Enabling resources... 55.049: 55.049: Fam14h - domain_enable_resources 55.050: agesawrapper_amdinitmid passed. 55.054: ader - leaving domain_enable_resources. 55.054: PCI: 00:00.0 cmd <- 06 55.054: PCI: 00:01.0 subsystem <- 1022/1510 55.053: PCI: 00:01.0 cmd <- 07 55.054: PCI: 00:01.1 subsystem <- 1022/1510 55.053: PCI: 00:01.1 cmd <- 02 55.054: PCI: 00:11.0 subsystem <- 1022/1510 55.054: PCI: 00:11.0 cmd <- 03 55.054: PCI: 00:12.0 subsystem <- 1022/1510 55.054: PCI: 00:12.0 cmd <- 02 55.054: PCI: 00:12.2 subsystem <- 1022/1510 55.054: PCI: 00:12.2 cmd <- 02 55.054: PCI: 00:13.0 subsystem <- 1022/1510 55.054: PCI: 00:13.0 cmd <- 02 55.054: PCI: 00:13.2 subsystem <- 1022/1510 55.054: PCI: 00:13.2 cmd <- 02 55.054: PCI: 00:14.0 subsystem <- 1022/1510 55.054: PCI: 00:14.0 cmd <- 403 55.054: PCI: 00:14.2 subsystem <- 1022/1510 55.054: PCI: 00:14.2 cmd <- 02 55.054: PCI: 00:14.3 subsystem <- 1022/1510 55.054: PCI: 00:14.3 cmd <- 0f 55.054: PCI: 00:14.4 bridge ctrl <- 0003 55.054: PCI: 00:14.4 subsystem <- 1022/1510 55.054: PCI: 00:14.4 cmd <- 21 55.054: PCI: 00:14.5 subsystem <- 1022/1510 55.054: PCI: 00:14.5 cmd <- 02 55.054: PCI: 00:15.0 bridge ctrl <- ffff 55.054: PCI: 00:15.0 cmd <- ffff 55.054: PCI: 00:18.0 subsystem <- 1022/1510 55.054: PCI: 00:18.0 cmd <- 00 55.054: PCI: 00:18.1 subsystem <- 1022/1510 55.054: PCI: 00:18.1 cmd <- 00 55.054: PCI: 00:18.2 subsystem <- 1022/1510 55.054: PCI: 00:18.2 cmd <- 00 55.054: PCI: 00:18.3 subsystem <- 1022/1510 55.054: PCI: 00:18.3 cmd <- 00 55.054: PCI: 00:18.4 subsystem <- 1022/1510 55.054: PCI: 00:18.4 cmd <- 00 55.054: PCI: 00:18.5 subsystem <- 1022/1510 55.054: PCI: 00:18.5 cmd <- 00 55.054: PCI: 00:18.6 subsystem <- 1022/1510 55.054: PCI: 00:18.6 cmd <- 00 55.054: PCI: 00:18.7 subsystem <- 1022/1510 55.054: PCI: 00:18.7 cmd <- 00 55.054: W83627HF HWM SMBus enabled 55.054: done. 55.054: Initializing devices... 55.055: Root Device init 55.055: CPU_CLUSTER: 0 init 55.055: start_eip=0x00001000, code_size=0x00000031 55.055: Initializing CPU #0 55.055: CPU: vendor AMD device 500f10 55.055: CPU: family 14, model 01, stepping 00 55.055: Model 14 Init. 55.055: 55.055: MTRR check 55.055: Fixed MTRRs : Enabled 55.056: Variable MTRRs: Enabled 55.056: 55.056: Enabling cache 55.056: Setting up local apic... apic_id: 0x00 done. 55.056: model_14_init done. 55.056: CPU #0 initialized 55.056: CPU1: stack_base 00290000, stack_end 0029fff8 55.056: Asserting INIT. 55.056: Waiting for send to finish... 55.056: +Deasserting INIT. 55.066: Waiting for send to finish... 55.066: +#startup loops: 2. 55.066: Sending STARTUP #1 to 1. 55.066: After apic_write. 55.067: Startup point 1. 55.067: Waiting for send to finish... 55.067: +Sending STARTUP #2 to 1. 55.067: After apic_write. 55.067: Startup point 1. 55.067: Waiting for send to finish... 55.068: +After Startup. 55.068: Initializing CPU #1 55.068: Waiting for 1 CPUS to stop 55.068: CPU: vendor AMD device 500f10 55.068: CPU: family 14, model 01, stepping 00 55.068: Model 14 Init. 55.068: 55.068: MTRR check 55.068: Fixed MTRRs : Enabled 55.068: Variable MTRRs: Enabled 55.068: 55.068: Enabling cache 55.068: Setting up local apic... apic_id: 0x01 done. 55.068: model_14_init done. 55.068: CPU #1 initialized 55.068: All AP CPUs stopped (2222 loops) 55.068: CPU1: stack: 00290000 - 002a0000, lowest used address 0029fda8, stack used: 600 bytes 55.068: PCI: 00:00.0 init 55.069: Northbridge init 55.068: PCI: 00:01.0 init 55.069: CBFS: Looking for 'pci1002,9802.rom' starting from 0x0. 55.069: CBFS: (unmatched file @0x0: cmos_layout.bin) 55.069: CBFS: Found file (offset=0x778, len=65536). 55.069: In CBFS, ROM address for PCI: 00:01.0 = ffc00778 55.069: PCI expansion ROM, signature 0xaa55, INIT size 0xe200, data ptr 0x01b4 55.069: PCI ROM image, vendor ID 1002, device ID 9802, 55.069: PCI ROM image, Class Code 030000, Code Type 00 55.069: Copying VGA ROM Image from ffc00778 to 0xc0000, 0xe200 bytes 55.085: Real mode stub @00000600: 867 bytes 55.085: Calling Option ROM... 55.127: ... Option ROM returned. 55.127: PCI: 00:01.1 init 55.127: PCI: 00:11.0 init 55.127: PCI: 00:14.0 init 55.127: PCI: 00:14.3 init 55.127: SB800 - Late.c - lpc_init - Start. 55.127: RTC Init 55.127: SB800 - Late.c - lpc_init - End. 55.127: PCI: 00:14.4 init 55.127: PCI: 00:18.0 init 55.127: PCI: 00:18.1 init 55.127: PCI: 00:18.2 init 55.127: PCI: 00:18.3 init 55.127: PCI: 00:18.4 init 55.127: PCI: 00:18.5 init 55.127: PCI: 00:18.6 init 55.127: PCI: 00:18.7 init 55.127: PNP: 002e.2 init 55.127: PNP: 002e.5 init 55.127: PNP: 002e.a init 55.127: PNP: 002e.b init 55.127: base = 0x0295, reg = 0x40, value = 0x83 55.127: base = 0x0295, reg = 0x48, value = 0x2a 55.127: base = 0x0295, reg = 0x4a, value = 0x21 55.127: base = 0x0295, reg = 0x4e, value = 0x80 55.127: base = 0x0295, reg = 0x43, value = 0xff 55.127: base = 0x0295, reg = 0x44, value = 0x3f 55.127: base = 0x0295, reg = 0x4c, value = 0x18 55.127: base = 0x0295, reg = 0x4d, value = 0x95 55.127: Devices initialized 55.127: Show all devs...After init. 55.127: Root Device: enabled 1 55.127: CPU_CLUSTER: 0: enabled 1 55.127: APIC: 00: enabled 1 55.127: DOMAIN: 0000: enabled 1 55.127: PCI: 00:00.0: enabled 1 55.127: PCI: 00:01.0: enabled 1 55.127: PCI: 00:01.1: enabled 1 55.127: PCI: 00:04.0: enabled 0 55.127: PCI: 00:05.0: enabled 0 55.127: PCI: 00:06.0: enabled 0 55.127: PCI: 00:07.0: enabled 0 55.127: PCI: 00:08.0: enabled 0 55.127: PCI: 00:11.0: enabled 1 55.127: PCI: 00:12.0: enabled 1 55.127: PCI: 00:12.2: enabled 1 55.127: PCI: 00:13.0: enabled 1 55.127: PCI: 00:13.2: enabled 1 55.127: PCI: 00:14.0: enabled 1 55.127: I2C: 00:50: enabled 1 55.127: I2C: 00:51: enabled 1 55.127: PCI: 00:14.1: enabled 0 55.127: PCI: 00:14.2: enabled 1 55.127: PCI: 00:14.3: enabled 1 55.127: PNP: 002e.0: enabled 0 55.127: PNP: 002e.1: enabled 0 55.127: PNP: 002e.2: enabled 1 55.127: PNP: 002e.3: enabled 0 55.127: PNP: 002e.5: enabled 1 55.128: PNP: 002e.6: enabled 0 55.128: PNP: 002e.7: enabled 0 55.128: PNP: 002e.8: enabled 0 55.127: PNP: 002e.9: enabled 0 55.128: PNP: 002e.a: enabled 1 55.128: PNP: 002e.b: enabled 1 55.128: PCI: 00:14.4: enabled 1 55.128: PCI: 00:14.5: enabled 1 55.128: PCI: 00:15.0: enabled 1 55.128: PCI: 00:15.1: enabled 1 55.128: PCI: 00:15.2: enabled 1 55.128: PCI: 00:15.3: enabled 0 55.128: PCI: 00:16.0: enabled 0 55.128: PCI: 00:16.2: enabled 0 55.128: PCI: 00:18.0: enabled 1 55.128: PCI: 00:18.1: enabled 1 55.128: PCI: 00:18.2: enabled 1 55.128: PCI: 00:18.3: enabled 1 55.128: PCI: 00:18.4: enabled 1 55.128: PCI: 00:18.5: enabled 1 55.128: PCI: 00:18.6: enabled 1 55.128: PCI: 00:18.7: enabled 1 55.128: APIC: 01: enabled 1 55.128: Re-Initializing CBMEM area to 0xc7fe0000 55.128: Initializing CBMEM area to 0xc7fe0000 (131072 bytes) 55.128: dword=c7fe0000 55.128: nvram_pos=f8, dword>>(8*i)=0 55.128: nvram_pos=f9, dword>>(8*i)=0 55.128: nvram_pos=fa, dword>>(8*i)=fe 55.128: nvram_pos=fb, dword>>(8*i)=c7 55.128: Adding CBMEM entry as no. 1 55.128: Moving GDT to c7fe0200...ok 55.128: High Tables Base is c7fe0000. 55.128: agesawrapper_amdinitlate: AmdLateParamsPtr = 2003C 55.128: Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done. 55.128: Adding CBMEM entry as no. 2 55.128: Writing IRQ routing tables to 0xc7fe0400...write_pirq_routing_table done. 55.129: PIRQ table: 48 bytes. 55.129: Wrote the mp table end at: 000f0410 - 000f0514 55.129: Adding CBMEM entry as no. 3 55.129: Wrote the mp table end at: c7fe1410 - c7fe1514 55.129: MP table: 276 bytes. 55.129: Adding CBMEM entry as no. 4 55.129: ACPI: Writing ACPI tables at c7fe2400... 55.129: ACPI: * DSDT at c7fe24c8 55.129: ACPI: * DSDT @ c7fe24c8 Length 28e6 55.129: ACPI: * FACS at c7fe4db0 55.129: ACPI: * FADT at c7fe4df0 55.129: ACPI_BLK_BASE: 0x0800 55.129: ACPI: added table 1/32, length now 40 55.129: ACPI: * HPET at c7fe4ee8 55.129: ACPI: added table 2/32, length now 44 55.129: ACPI: * MADT at c7fe4f20 55.129: ACPI: added table 3/32, length now 48 55.129: ACPI: added table 4/32, length now 52 55.129: ACPI: * SRAT at c7fe4fa8 55.129: AGESA SRAT table NULL. Skipping. 55.129: ACPI: * SLIT at c7fe4fa8 55.129: AGESA SLIT table NULL. Skipping. 55.130: ACPI: * AGESA ALIB SSDT at c7fe4fb0 55.129: ACPI: added table 5/32, length now 56 55.129: ACPI: * AGESA SSDT Pstate at c7fe6640 55.129: ACPI: added table 6/32, length now 60 55.129: ACPI: * coreboot TOM SSDT2 at c7fe6a20 55.129: ACPI: added table 7/32, length now 64 55.129: ACPI: done. 55.130: ACPI tables: 18021 bytes. 55.129: Adding CBMEM entry as no. 5 55.129: smbios_write_tables: c7fed800 55.130: Root Device (ASROCK E350M1) 55.129: CPU_CLUSTER: 0 (AMD Family 14h Root Complex) 55.129: APIC: 00 (AMD CPU Family 14h) 55.129: DOMAIN: 0000 (AMD Family 14h Root Complex) 55.130: PCI: 00:00.0 (AMD Family 14h Northbridge) 55.130: PCI: 00:01.0 (AMD Family 14h Northbridge) 55.130: PCI: 00:01.1 (AMD Family 14h Northbridge) 55.130: PCI: 00:04.0 (AMD Family 14h Northbridge) 55.130: PCI: 00:05.0 (AMD Family 14h Northbridge) 55.130: PCI: 00:06.0 (AMD Family 14h Northbridge) 55.130: PCI: 00:07.0 (AMD Family 14h Northbridge) 55.130: PCI: 00:08.0 (AMD Family 14h Northbridge) 55.130: PCI: 00:11.0 (ATI SB800) 55.130: PCI: 00:12.0 (ATI SB800) 55.130: PCI: 00:12.2 (ATI SB800) 55.130: PCI: 00:13.0 (ATI SB800) 55.130: PCI: 00:13.2 (ATI SB800) 55.130: PCI: 00:14.0 (ATI SB800) 55.130: I2C: 00:50 (unknown) 55.130: I2C: 00:51 (unknown) 55.130: PCI: 00:14.1 (ATI SB800) 55.130: PCI: 00:14.2 (ATI SB800) 55.130: PCI: 00:14.3 (ATI SB800) 55.130: PNP: 002e.0 (Winbond W83627HF Super I/O) 55.130: PNP: 002e.1 (Winbond W83627HF Super I/O) 55.130: PNP: 002e.2 (Winbond W83627HF Super I/O) 55.130: PNP: 002e.3 (Winbond W83627HF Super I/O) 55.130: PNP: 002e.5 (Winbond W83627HF Super I/O) 55.130: PNP: 002e.6 (Winbond W83627HF Super I/O) 55.130: PNP: 002e.7 (Winbond W83627HF Super I/O) 55.130: PNP: 002e.8 (Winbond W83627HF Super I/O) 55.130: PNP: 002e.9 (Winbond W83627HF Super I/O) 55.130: PNP: 002e.a (Winbond W83627HF Super I/O) 55.130: PNP: 002e.b (Winbond W83627HF Super I/O) 55.130: PCI: 00:14.4 (ATI SB800) 55.130: PCI: 00:14.5 (ATI SB800) 55.130: PCI: 00:15.0 (ATI SB800) 55.130: PCI: 00:15.1 (ATI SB800) 55.130: PCI: 00:15.2 (ATI SB800) 55.130: PCI: 00:15.3 (ATI SB800) 55.130: PCI: 00:16.0 (ATI SB800) 55.130: PCI: 00:16.2 (ATI SB800) 55.130: PCI: 00:18.0 (AMD Family 14h Northbridge) 55.130: PCI: 00:18.1 (AMD Family 14h Northbridge) 55.130: PCI: 00:18.2 (AMD Family 14h Northbridge) 55.130: PCI: 00:18.3 (AMD Family 14h Northbridge) 55.130: PCI: 00:18.4 (AMD Family 14h Northbridge) 55.130: PCI: 00:18.5 (AMD Family 14h Northbridge) 55.130: PCI: 00:18.6 (AMD Family 14h Northbridge) 55.130: PCI: 00:18.7 (AMD Family 14h Northbridge) 55.130: APIC: 01 (unknown) 55.130: SMBIOS tables: 275 bytes. 55.130: Adding CBMEM entry as no. 6 55.130: Writing table forward entry at 0x00000500 55.130: Wrote coreboot table at: 00000500, 0x10 bytes, checksum 57df 55.130: Table forward entry ends at 0x00000528. 55.130: ... aligned to 0x00001000 55.130: Writing coreboot table at 0xc7fee000 55.130: rom_table_end = 0xc7fee000 55.130: ... aligned to 0xc7ff0000 55.130: 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 55.130: 1. 0000000000001000-000000000009ffff: RAM 55.130: 2. 00000000000c0000-00000000c7fdffff: RAM 55.130: 3. 00000000c7fe0000-00000000c7ffffff: CONFIGURATION TABLES 55.130: 4. 00000000c8000000-00000000dfffffff: RESERVED 55.130: 5. 00000000f8000000-00000000f8ffffff: RESERVED 55.130: 6. 0000000100000000-000000021effffff: RAM 55.130: Wrote coreboot table at: c7fee000, 0x200 bytes, checksum 68f0 55.130: coreboot table: 536 bytes. 55.130: Multiboot Information structure has been written. 55.130: FREE SPACE 0. c7ff6000 0000a000 55.131: GDT 1. c7fe0200 00000200 55.131: IRQ TABLE 2. c7fe0400 00001000 55.131: SMP TABLE 3. c7fe1400 00001000 55.131: ACPI 4. c7fe2400 0000b400 55.131: SMBIOS 5. c7fed800 00000800 55.131: COREBOOT 6. c7fee000 00008000 55.131: CBFS: Looking for 'fallback/payload' starting from 0x0. 55.131: CBFS: (unmatched file @0x0: cmos_layout.bin) 55.131: CBFS: (unmatched file @0x740: pci1002,9802.rom) 55.131: CBFS: (unmatched file @0x10780: fallback/romstage) 55.131: CBFS: (unmatched file @0x65380: fallback/coreboot_ram) 55.131: CBFS: Found file (offset=0x978b8, len=195112). 55.131: Loading segment from rom address 0xffc978b8 55.131: code (compression=1) 55.131: New segment dstaddr 0x8200 memsize 0xe504 srcaddr 0xffc9790c filesize 0x417d 55.131: (cleaned up) New segment addr 0x8200 size 0xe504 offset 0xffc9790c filesize 0x417d 55.131: Loading segment from rom address 0xffc978d4 55.131: code (compression=1) 55.131: New segment dstaddr 0x100000 memsize 0x9d424 srcaddr 0xffc9ba89 filesize 0x2b857 55.131: (cleaned up) New segment addr 0x100000 size 0x9d424 offset 0xffc9ba89 filesize 0x2b857 55.131: Loading segment from rom address 0xffc978f0 55.131: Entry Point 0x00008200 55.131: Loading Segment: addr: 0x0000000000008200 memsz: 0x000000000000e504 filesz: 0x000000000000417d 55.131: lb: [0x0000000000200000, 0x0000000000370038) 55.131: Post relocation: addr: 0x0000000000008200 memsz: 0x000000000000e504 filesz: 0x000000000000417d 55.137: using LZMA 55.139: [ 0x00008200, 0000f14f, 0x00016704) <- ffc9790c 55.139: Clearing Segment: addr: 0x000000000000f14f memsz: 0x00000000000075b5 55.139: dest 00008200, end 00016704, bouncebuffer c7cfff90 55.139: Loading Segment: addr: 0x0000000000100000 memsz: 0x000000000009d424 filesz: 0x000000000002b857 55.139: lb: [0x0000000000200000, 0x0000000000370038) 55.139: Post relocation: addr: 0x0000000000100000 memsz: 0x000000000009d424 filesz: 0x000000000002b857 55.139: using LZMA 55.229: [ 0x00100000, 0019d424, 0x0019d424) <- ffc9ba89 55.229: dest 00100000, end 0019d424, bouncebuffer c7cfff90 55.229: Loaded segments 55.229: Jumping to boot code at 8200 55.229: CPU0: stack: 002a0000 - 002b0000, lowest used address 002af77c, stack used: 2180 bytes 55.229: entry = 0x00008200 55.229: lb_start = 0x00200000 55.229: lb_size = 0x00170038 55.229: adjust = 0xc7c6ffc8 55.229: buffer = 0xc7cfff90 55.229: elf_boot_notes = 0x0027faf0 55.230: adjusted_boot_notes = 0xc7eefab8