USB


coreboot-4.0-4739-gcd9abf9-dirty Mon Oct 21 12:20:58 IST 2013 starting...
Setting up static southbridge registers... done.
Disabling Watchdog reboot... done.
Setting up static northbridge registers... done.
Initializing Graphics...
Back from sandybridge_early_initialization()
SMBus controller enabled.
Memory Straps:
 - memory capacity 2GB
 - die revision 1
 - vendor Samsung
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffff9c0/0x800000
CBFS: CBFS location: 0x600000~0x7ff9e0, align: 64
CBFS: Looking for 'spd.bin' starting from 0x600000.
CBFS:  - load entry 0x600000 file name (16 bytes)...
CBFS:  (unmatched file @0x600000: cmos_layout.bin)
CBFS:  - load entry 0x6004c0 file name (32 bytes)...
CBFS:  (unmatched file @0x6004c0: pci8086,0106.rom)
CBFS:  - load entry 0x610500 file name (72 bytes)...
CBFS:  (unmatched file @0x610500: cpu_microcode_blob.bin)
CBFS:  - load entry 0x6155c0 file name (32 bytes)...
CBFS:  (unmatched file @0x6155c0: fallback/romstage)
CBFS:  - load entry 0x61fec0 file name (32 bytes)...
CBFS:  (unmatched file @0x61fec0: fallback/coreboot_ram)
CBFS:  - load entry 0x636bc0 file name (32 bytes)...
CBFS:  (unmatched file @0x636bc0: fallback/payload)
CBFS:  - load entry 0x6d46c0 file name (16 bytes)...
CBFS:  (unmatched file @0x6d46c0: config)
CBFS:  - load entry 0x6d5b00 file name (16 bytes)...
CBFS:  (unmatched file @0x6d5b00: )
CBFS:  - load entry 0x77ffc0 file name (40 bytes)...
CBFS:  (unmatched file @0x77ffc0: mrc.cache)
CBFS:  - load entry 0x780000 file name (16 bytes)...
CBFS:  (unmatched file @0x780000: )
CBFS:  - load entry 0x79ffc0 file name (40 bytes)...
CBFS:  (unmatched file @0x79ffc0: mrc.bin)
CBFS:  - load entry 0x7cfcc0 file name (16 bytes)...
CBFS:  (unmatched file @0x7cfcc0: )
CBFS:  - load entry 0x7dbfc0 file name (40 bytes)...
CBFS: Found file (offset=0x7dc000, len=1536).
CPU id(206a7): Intel(R) Celeron(R) CPU 867 @ 1.30GHz
AES NOT supported, TXT NOT supported, VT supported
PCH type: Unknown, device id: 1c49, rev id 5
Intel ME early init
Intel ME firmware is ready
ME: Requested 8MB UMA
Starting UEFI PEI System Agent
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffff9c0/0x800000
CBFS: CBFS location: 0x600000~0x7ff9e0, align: 64
CBFS: Looking for 'mrc.bin' starting from 0x600000.
CBFS:  - load entry 0x600000 file name (16 bytes)...
CBFS:  (unmatched file @0x600000: cmos_layout.bin)
CBFS:  - load entry 0x6004c0 file name (32 bytes)...
CBFS:  (unmatched file @0x6004c0: pci8086,0106.rom)
CBFS:  - load entry 0x610500 file name (72 bytes)...
CBFS:  (unmatched file @0x610500: cpu_microcode_blob.bin)
CBFS:  - load entry 0x6155c0 file name (32 bytes)...
CBFS:  (unmatched file @0x6155c0: fallback/romstage)
CBFS:  - load entry 0x61fec0 file name (32 bytes)...
CBFS:  (unmatched file @0x61fec0: fallback/coreboot_ram)
CBFS:  - load entry 0x636bc0 file name (32 bytes)...
CBFS:  (unmatched file @0x636bc0: fallback/payload)
CBFS:  - load entry 0x6d46c0 file name (16 bytes)...
CBFS:  (unmatched file @0x6d46c0: config)
CBFS:  - load entry 0x6d5b00 file name (16 bytes)...
CBFS:  (unmatched file @0x6d5b00: )
CBFS:  - load entry 0x77ffc0 file name (40 bytes)...
CBFS:  (unmatched file @0x77ffc0: mrc.cache)
CBFS:  - load entry 0x780000 file name (16 bytes)...
CBFS:  (unmatched file @0x780000: )
CBFS:  - load entry 0x79ffc0 file name (40 bytes)...
CBFS: Found file (offset=0x7a0000, len=195732).
USB
System Agent Version 1.2.2 Build 0
ME: Sending Init Done with status: 0, UMA base: 0x0ff8
ME: Requested BIOS Action: Continue to boot
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : YES
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Normal
ME: Current Operation State : M0 with UMA
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : Host Communication
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : Host communication established
memcfg DDR3 clock 1333 MHz
memcfg channel assignment: A: 0, B  1, C  2
memcfg channel[0] config (00600008):
   ECC inactive
   enhanced interleave mode on
   rank interleave on
   DIMMA 2048 MB width x8 single rank, selected
   DIMMB 0 MB width x8 single rank
memcfg channel[1] config (00600008):
   ECC inactive
   enhanced interleave mode on
   rank interleave on
   DIMMA 2048 MB width x8 single rank, selected
   DIMMB 0 MB width x8 single rank
CBMEM region acee0000-acffffff (cbmem_reinit)
CBMEM region acee0000-acffffff (cbmem_init)
Adding CBMEM entry as no. 1
Adding CBMEM entry as no. 2
Adding CBMEM entry as no. 3
Adding CBMEM entry as no. 4
Relocate MRC DATA from ff7e3237 to acee0800 (2992 bytes)
Save scrambler seed    0x0000e6d9 to CMOS 0x98
Save s3 scrambler seed 0x00009e3b to CMOS 0x9c
CBMEM region acee0000-acffffff (cbmem_reinit)
Loading image.
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffff9c0/0x800000
CBFS: CBFS location: 0x600000~0x7ff9e0, align: 64
CBFS: Looking for 'fallback/coreboot_ram' starting from 0x600000.
CBFS:  - load entry 0x600000 file name (16 bytes)...
CBFS:  (unmatched file @0x600000: cmos_layout.bin)
CBFS:  - load entry 0x6004c0 file name (32 bytes)...
CBFS:  (unmatched file @0x6004c0: pci8086,0106.rom)
CBFS:  - load entry 0x610500 file name (72 bytes)...
CBFS:  (unmatched file @0x610500: cpu_microcode_blob.bin)
CBFS:  - load entry 0x6155c0 file name (32 bytes)...
CBFS:  (unmatched file @0x6155c0: fallback/romstage)
CBFS:  - load entry 0x61fec0 file name (32 bytes)...
CBFS: Found file (offset=0x61fef8, len=93359).
CBFS: loading stage fallback/coreboot_ram @ 0x100000 (393280 bytes), entry @ 0x100000
CBFS: stage loaded.
Jumping to image.
EHCI debug port found in CBMEM.
coreboot-4.0-4739-gcd9abf9-dirty Mon Oct 21 12:20:58 IST 2013 booting...
Enumerating buses...
Show all devs...Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 0
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 0
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 0
PNP: 002e.3: enabled 0
PNP: 002e.4: enabled 0
PNP: 002e.7: enabled 1
PNP: 002e.8: enabled 1
PNP: 002e.9: enabled 1
PNP: 00ff.1: enabled 0
IOAPIC: 04: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
  APIC: acac: enabled 0
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:02.0: enabled 1
  PCI: 00:16.0: enabled 1
  PCI: 00:16.1: enabled 0
  PCI: 00:16.2: enabled 0
  PCI: 00:16.3: enabled 0
  PCI: 00:19.0: enabled 0
  PCI: 00:1a.0: enabled 1
  PCI: 00:1b.0: enabled 1
  PCI: 00:1c.0: enabled 1
  PCI: 00:1c.1: enabled 0
  PCI: 00:1c.2: enabled 0
  PCI: 00:1c.3: enabled 1
  PCI: 00:1c.4: enabled 0
  PCI: 00:1c.5: enabled 0
  PCI: 00:1c.6: enabled 0
  PCI: 00:1c.7: enabled 0
  PCI: 00:1d.0: enabled 1
  PCI: 00:1e.0: enabled 0
  PCI: 00:1f.0: enabled 1
   PNP: 002e.1: enabled 1
   PNP: 002e.2: enabled 0
   PNP: 002e.3: enabled 0
   PNP: 002e.4: enabled 0
   PNP: 002e.7: enabled 1
   PNP: 002e.8: enabled 1
   PNP: 002e.9: enabled 1
   PNP: 00ff.1: enabled 0
   IOAPIC: 04: enabled 1
  PCI: 00:1f.2: enabled 1
  PCI: 00:1f.3: enabled 1
  PCI: 00:1f.5: enabled 0
  PCI: 00:1f.6: enabled 1
scan_static_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0104] ops
Normal boot.
PCI: 00:00.0 [8086/0104] enabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/0106] enabled
PCI: 00:16.0 [8086/1c3a] bus ops
PCI: 00:16.0 [8086/1c3a] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.1 [8086/1c3b] disabled No operations
PCI: 00:16.2: Disabling device
PCI: 00:16.2 [8086/1c3c] disabled No operations
PCI: 00:16.3: Disabling device
PCI: 00:16.3 [8086/1c3d] disabled No operations
PCI: 00:19.0: Disabling device
PCI: 00:1a.0 [8086/0000] ops
PCI: 00:1a.0 [8086/1c2d] enabled
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/1c20] enabled
PCI: 00:1c.0 [8086/0000] bus ops
PCI: 00:1c.0 [8086/1c10] enabled
PCI: 00:1c.1: Disabling device
PCI: 00:1c.2: Disabling device
PCI: 00:1c.3 [8086/0000] bus ops
PCI: 00:1c.3 [8086/1c16] enabled
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCI: 00:1c.7: Disabling device
PCH: RPFN 0x76543210 -> 0xfedc3a90
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/1c26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1e.0 [8086/2448] bus ops
PCI: 00:1e.0 [8086/2448] disabled
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/1c49] enabled
PCI: 00:1f.2 [8086/0000] ops
PCI: 00:1f.2 [8086/1c01] enabled
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/1c22] enabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.6 [8086/1c24] enabled
scan_static_bus for PCI: 00:16.0
scan_static_bus for PCI: 00:16.0 done
do_pci_scan_bridge for PCI: 00:1c.0
memalign Enter, boundary 8, size 24, free_mem_ptr 0015c040
memalign 0015c040
PCI: pci_scan_bus for bus 01
memalign Enter, boundary 8, size 152, free_mem_ptr 0015c058
memalign 0015c058
PCI: 01:00.0 [168c/0030] enabled
PCI: pci_scan_bus returning with max=001
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
do_pci_scan_bridge returns max 1
do_pci_scan_bridge for PCI: 00:1c.3
memalign Enter, boundary 8, size 24, free_mem_ptr 0015c0f0
memalign 0015c0f0
PCI: pci_scan_bus for bus 02
memalign Enter, boundary 8, size 152, free_mem_ptr 0015c108
memalign 0015c108
PCI: 02:00.0 [10ec/8168] ops
PCI: 02:00.0 [10ec/8168] enabled
PCI: pci_scan_bus returning with max=002
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L1
do_pci_scan_bridge returns max 2
scan_static_bus for PCI: 00:1f.0
memalign Enter, boundary 8, size 2560, free_mem_ptr 0015c1a0
memalign 0015c1a0
PNP: 002e.1 enabled
PNP: 002e.2 disabled
PNP: 002e.3 disabled
PNP: 002e.4 disabled
PNP: 002e.7 enabled
PNP: 002e.8 enabled
PNP: 002e.9 enabled
PNP: 00ff.1 disabled
IOAPIC: 04 enabled
scan_static_bus for PCI: 00:1f.0 done
scan_static_bus for PCI: 00:1f.3
scan_static_bus for PCI: 00:1f.3 done
PCI: pci_scan_bus returning with max=002
scan_static_bus for Root Device done
done
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
More than one caller of pci_ehci_read_resources from PCI: 00:1a.0
PCI: 00:1c.0 read_resources bus 1 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0 done
PCI: 00:1c.3 read_resources bus 2 link: 0
PCI: 00:1c.3 read_resources bus 2 link: 0 done
PCI: 00:1d.0 EHCI BAR hook registered
PCI: 00:1f.0 read_resources bus 0 link: 0
PCI: 00:1f.0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: acac
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
   PCI: 00:02.0
   PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
   PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 101201 index 18
   PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
   PCI: 00:16.0
   PCI: 00:16.0 resource base 0 size 10 align 4 gran 4 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:19.0
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.0 child on link 0 PCI: 01:00.0
   PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
    PCI: 01:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
   PCI: 00:1c.1
   PCI: 00:1c.2
   PCI: 00:1c.3 child on link 0 PCI: 02:00.0
   PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
    PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 1201 index 18
    PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
   PCI: 00:1c.4
   PCI: 00:1c.5
   PCI: 00:1c.6
   PCI: 00:1c.7
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 002e.1
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 002e.1
    PNP: 002e.1 resource base b00 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
    PNP: 002e.2
    PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
    PNP: 002e.3
    PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
    PNP: 002e.4
    PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
    PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 002e.7
    PNP: 002e.7 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.8
    PNP: 002e.8 resource base 62 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
    PNP: 002e.9
    PNP: 002e.9 resource base a00 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
    PNP: 00ff.1
    IOAPIC: 04
    IOAPIC: 04 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 0
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1f.2 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 200 index 24
   PCI: 00:1f.3
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base 0 size 100 align 8 gran 8 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1f.5
   PCI: 00:1f.6
   PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.3 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 02:00.0 10 *  [0x0 - 0xff] io
PCI: 00:1c.3 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.3 1c *  [0x0 - 0xfff] io
PCI: 00:02.0 20 *  [0x1000 - 0x103f] io
PCI: 00:1f.2 20 *  [0x1040 - 0x105f] io
PCI: 00:1f.2 10 *  [0x1060 - 0x1067] io
PCI: 00:1f.2 18 *  [0x1068 - 0x106f] io
PCI: 00:1f.2 14 *  [0x1070 - 0x1073] io
PCI: 00:1f.2 1c *  [0x1074 - 0x1077] io
DOMAIN: 0000 compute_resources_io: base: 1078 size: 1078 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 *  [0x0 - 0x1ffff] mem
PCI: 01:00.0 30 *  [0x20000 - 0x2ffff] mem
PCI: 00:1c.0 compute_resources_mem: base: 30000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.3 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 02:00.0 20 *  [0x0 - 0x3fff] prefmem
PCI: 02:00.0 18 *  [0x4000 - 0x4fff] prefmem
PCI: 00:1c.3 compute_resources_prefmem: base: 5000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:1c.3 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
PCI: 00:02.0 10 *  [0x10000000 - 0x103fffff] mem
PCI: 00:1c.0 20 *  [0x10400000 - 0x104fffff] mem
PCI: 00:1c.3 24 *  [0x10500000 - 0x105fffff] prefmem
PCI: 00:1b.0 10 *  [0x10600000 - 0x10603fff] mem
PCI: 00:1f.6 10 *  [0x10604000 - 0x10604fff] mem
PCI: 00:1f.2 24 *  [0x10605000 - 0x106057ff] mem
PCI: 00:1a.0 10 *  [0x10605800 - 0x10605bff] mem
PCI: 00:1d.0 10 *  [0x10605c00 - 0x10605fff] mem
PCI: 00:1f.3 10 *  [0x10606000 - 0x106060ff] mem
PCI: 00:16.0 10 *  [0x10606100 - 0x1060610f] mem
DOMAIN: 0000 compute_resources_mem: base: 10606110 size: 10606110 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:02.0
constrain_resources: PCI: 00:16.0
constrain_resources: PCI: 00:1a.0
constrain_resources: PCI: 00:1b.0
constrain_resources: PCI: 00:1c.0
constrain_resources: PCI: 01:00.0
constrain_resources: PCI: 00:1c.3
constrain_resources: PCI: 02:00.0
constrain_resources: PCI: 00:1d.0
constrain_resources: PCI: 00:1f.0
constrain_resources: PNP: 002e.1
constrain_resources: PNP: 002e.7
constrain_resources: PNP: 002e.8
constrain_resources: PNP: 002e.9
constrain_resources: IOAPIC: 04
constrain_resources: PCI: 00:1f.2
constrain_resources: PCI: 00:1f.3
constrain_resources: PCI: 00:1f.6
avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff
	lim->base 00001000 lim->limit 0000ffff
avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff
	lim->base 00000000 lim->limit efffffff
Setting resources...
DOMAIN: 0000 allocate_resources_io: base:1000 size:1078 align:12 gran:0 limit:ffff
Assigned: PCI: 00:1c.3 1c *  [0x1000 - 0x1fff] io
Assigned: PCI: 00:02.0 20 *  [0x2000 - 0x203f] io
Assigned: PCI: 00:1f.2 20 *  [0x2040 - 0x205f] io
Assigned: PCI: 00:1f.2 10 *  [0x2060 - 0x2067] io
Assigned: PCI: 00:1f.2 18 *  [0x2068 - 0x206f] io
Assigned: PCI: 00:1f.2 14 *  [0x2070 - 0x2073] io
Assigned: PCI: 00:1f.2 1c *  [0x2074 - 0x2077] io
DOMAIN: 0000 allocate_resources_io: next_base: 2078 size: 1078 align: 12 gran: 0 done
PCI: 00:1c.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:1c.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:1c.3 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff
Assigned: PCI: 02:00.0 10 *  [0x1000 - 0x10ff] io
PCI: 00:1c.3 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done
DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:10606110 align:28 gran:0 limit:efffffff
Assigned: PCI: 00:02.0 18 *  [0xd0000000 - 0xdfffffff] prefmem
Assigned: PCI: 00:02.0 10 *  [0xe0000000 - 0xe03fffff] mem
Assigned: PCI: 00:1c.0 20 *  [0xe0400000 - 0xe04fffff] mem
Assigned: PCI: 00:1c.3 24 *  [0xe0500000 - 0xe05fffff] prefmem
Assigned: PCI: 00:1b.0 10 *  [0xe0600000 - 0xe0603fff] mem
Assigned: PCI: 00:1f.6 10 *  [0xe0604000 - 0xe0604fff] mem
Assigned: PCI: 00:1f.2 24 *  [0xe0605000 - 0xe06057ff] mem
Assigned: PCI: 00:1a.0 10 *  [0xe0605800 - 0xe0605bff] mem
Assigned: PCI: 00:1d.0 10 *  [0xe0605c00 - 0xe0605fff] mem
Assigned: PCI: 00:1f.3 10 *  [0xe0606000 - 0xe06060ff] mem
Assigned: PCI: 00:16.0 10 *  [0xe0606100 - 0xe060610f] mem
DOMAIN: 0000 allocate_resources_mem: next_base: e0606110 size: 10606110 align: 28 gran: 0 done
PCI: 00:1c.0 allocate_resources_prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.0 allocate_resources_prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 allocate_resources_mem: base:e0400000 size:100000 align:20 gran:20 limit:efffffff
Assigned: PCI: 01:00.0 10 *  [0xe0400000 - 0xe041ffff] mem
Assigned: PCI: 01:00.0 30 *  [0xe0420000 - 0xe042ffff] mem
PCI: 00:1c.0 allocate_resources_mem: next_base: e0430000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.3 allocate_resources_prefmem: base:e0500000 size:100000 align:20 gran:20 limit:efffffff
Assigned: PCI: 02:00.0 20 *  [0xe0500000 - 0xe0503fff] prefmem
Assigned: PCI: 02:00.0 18 *  [0xe0504000 - 0xe0504fff] prefmem
PCI: 00:1c.3 allocate_resources_prefmem: next_base: e0505000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.3 allocate_resources_mem: base:efffffff size:0 align:20 gran:20 limit:efffffff
PCI: 00:1c.3 allocate_resources_mem: next_base: efffffff size: 0 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
TOUUD 0x14fe00000 TOLUD 0xafa00000 TOM 0x100000000
MEBASE 0xff800000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0xad000000 size 8M
Available memory below 4GB: 2768M
Available memory above 4GB: 1278M
Adding PCIe config bar base=0xf0000000 size=0x4000000
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:00.0 cf <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x00 mem<mmconfig>
PCI: 00:02.0 10 <- [0x00e0000000 - 0x00e03fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000002000 - 0x000000203f] size 0x00000040 gran 0x06 io
PCI: 00:16.0 10 <- [0x00e0606100 - 0x00e060610f] size 0x00000010 gran 0x04 mem64
PCI: 00:1a.0 10 <- [0x00e0605800 - 0x00e0605bff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00e0600000 - 0x00e0603fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00e0400000 - 0x00e041ffff] size 0x00020000 gran 0x11 mem64
PCI: 01:00.0 30 <- [0x00e0420000 - 0x00e042ffff] size 0x00010000 gran 0x10 romem
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 00:1c.3 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 02 io
PCI: 00:1c.3 24 <- [0x00e0500000 - 0x00e05fffff] size 0x00100000 gran 0x14 bus 02 prefmem
PCI: 00:1c.3 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 mem
PCI: 00:1c.3 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 02:00.0 18 <- [0x00e0504000 - 0x00e0504fff] size 0x00001000 gran 0x0c prefmem64
PCI: 02:00.0 20 <- [0x00e0500000 - 0x00e0503fff] size 0x00004000 gran 0x0e prefmem64
PCI: 00:1c.3 assign_resources, bus 2 link: 0
PCI: 00:1d.0 EHCI Debug Port hook triggered
PCI: 00:1d.0 10 <- [0x00e0605c00 - 0x00e0605fff] size 0x00000400 gran 0x0a mem
PCI: 00:1d.0 EHCI Debug Port relocated
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 002e.1 60 <- [0x0000000b00 - 0x0000000b00] size 0x00000001 gran 0x00 io
PNP: 002e.7 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.8 60 <- [0x0000000062 - 0x0000000062] size 0x00000001 gran 0x00 io
PNP: 002e.9 60 <- [0x0000000a00 - 0x0000000a00] size 0x00000001 gran 0x00 io
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000002060 - 0x0000002067] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000002070 - 0x0000002073] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000002068 - 0x000000206f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000002074 - 0x0000002077] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000002040 - 0x000000205f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00e0605000 - 0x00e06057ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00e0606000 - 0x00e06060ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.6 10 <- [0x00e0604000 - 0x00e0604fff] size 0x00001000 gran 0x0c mem64
DOMAIN: 0000 assign_resources, bus 0 link: 0
CBMEM region acee0000-acffffff (cbmem_late_set_table)
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: acac
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 1000 size 1078 align 12 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base d0000000 size 10606110 align 28 gran 0 limit efffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
  DOMAIN: 0000 resource base 100000 size acf00000 align 0 gran 0 limit 0 flags e0004200 index 4
  DOMAIN: 0000 resource base 100000000 size 4fe00000 align 0 gran 0 limit 0 flags e0004200 index 5
  DOMAIN: 0000 resource base ad000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
  DOMAIN: 0000 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 7
  DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 8
  DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 9
  DOMAIN: 0000 resource base 20000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index a
  DOMAIN: 0000 resource base 40000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index b
   PCI: 00:00.0
   PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags e0000200 index cf
   PCI: 00:02.0
   PCI: 00:02.0 resource base e0000000 size 400000 align 22 gran 22 limit efffffff flags 60000201 index 10
   PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit efffffff flags 60101201 index 18
   PCI: 00:02.0 resource base 2000 size 40 align 6 gran 6 limit ffff flags 60000100 index 20
   PCI: 00:16.0
   PCI: 00:16.0 resource base e0606100 size 10 align 4 gran 4 limit efffffff flags 60000201 index 10
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:19.0
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base e0605800 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base e0600000 size 4000 align 14 gran 14 limit efffffff flags 60000201 index 10
   PCI: 00:1c.0 child on link 0 PCI: 01:00.0
   PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24
   PCI: 00:1c.0 resource base e0400000 size 100000 align 20 gran 20 limit efffffff flags 60080202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base e0400000 size 20000 align 17 gran 17 limit efffffff flags 60000201 index 10
    PCI: 01:00.0 resource base e0420000 size 10000 align 16 gran 16 limit efffffff flags 60002200 index 30
   PCI: 00:1c.1
   PCI: 00:1c.2
   PCI: 00:1c.3 child on link 0 PCI: 02:00.0
   PCI: 00:1c.3 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:1c.3 resource base e0500000 size 100000 align 20 gran 20 limit efffffff flags 60081202 index 24
   PCI: 00:1c.3 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10
    PCI: 02:00.0 resource base e0504000 size 1000 align 12 gran 12 limit efffffff flags 60001201 index 18
    PCI: 02:00.0 resource base e0500000 size 4000 align 14 gran 14 limit efffffff flags 60001201 index 20
   PCI: 00:1c.4
   PCI: 00:1c.5
   PCI: 00:1c.6
   PCI: 00:1c.7
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base e0605c00 size 400 align 10 gran 10 limit efffffff flags 60000200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 002e.1
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 002e.1
    PNP: 002e.1 resource base b00 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
    PNP: 002e.2
    PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
    PNP: 002e.3
    PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
    PNP: 002e.4
    PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
    PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
    PNP: 002e.7
    PNP: 002e.7 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 002e.8
    PNP: 002e.8 resource base 62 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
    PNP: 002e.9
    PNP: 002e.9 resource base a00 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
    PNP: 00ff.1
    IOAPIC: 04
    IOAPIC: 04 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 0
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 2060 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
   PCI: 00:1f.2 resource base 2070 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
   PCI: 00:1f.2 resource base 2068 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
   PCI: 00:1f.2 resource base 2074 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
   PCI: 00:1f.2 resource base 2040 size 20 align 5 gran 5 limit ffff flags 60000100 index 20
   PCI: 00:1f.2 resource base e0605000 size 800 align 11 gran 11 limit efffffff flags 60000200 index 24
   PCI: 00:1f.3
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base e0606000 size 100 align 8 gran 8 limit efffffff flags 60000201 index 10
   PCI: 00:1f.5
   PCI: 00:1f.6
   PCI: 00:1f.6 resource base e0604000 size 1000 align 12 gran 12 limit efffffff flags 60000201 index 10
Done allocating resources.
Enabling resources...
PCI: 00:00.0 subsystem <- 1ae0/c000
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 1ae0/c000
PCI: 00:02.0 cmd <- 03
PCI: 00:16.0 subsystem <- 1ae0/c000
PCI: 00:16.0 cmd <- 02
PCI: 00:1a.0 subsystem <- 1ae0/c000
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 1ae0/c000
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 1ae0/c000
PCI: 00:1c.0 cmd <- 106
PCI: 00:1c.3 bridge ctrl <- 0003
PCI: 00:1c.3 subsystem <- 1ae0/c000
PCI: 00:1c.3 cmd <- 107
PCI: 00:1d.0 subsystem <- 1ae0/c000
PCI: 00:1d.0 cmd <- 102
pch_decode_init
PCI: 00:1f.0 subsystem <- 1ae0/c000
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 1ae0/c000
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 1ae0/c000
PCI: 00:1f.3 cmd <- 103
PCI: 00:1f.6 subsystem <- 1ae0/c000
PCI: 00:1f.6 cmd <- 02
PCI: 01:00.0 cmd <- 02
PCI: 02:00.0 cmd <- 03
done.
Initializing devices...
Root Device init
lumpy_ec_init
.CPU_CLUSTER: 0 init
memalign Enter, boundary 8, size 49, free_mem_ptr 0015cba0
memalign 0015cba0
start_eip=0x00001000, code_size=0x00000031
Installing SMM handler to 0xad000000
Installing IED header to 0xad400000
Initializing SMM handler... ... pmbase = 0x0500

SMI_STS: PM1 
PM1_STS: WAK BM TMROF 
GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO11 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 SMB_WAK 
ALT_GP_SMI_STS: GPI15 GPI14 GPI13 GPI11 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 
TCO_STS: 
  ... raise SMI#
Initializing CPU #0
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
Enabling cache
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffff9c0/0x800000
CBFS: CBFS location: 0x600000~0x7ff9e0, align: 64
CBFS: Looking for 'cpu_microcode_blob.bin' starting from 0x600000.
CBFS:  - load entry 0x600000 file name (16 bytes)...
CBFS:  (unmatched file @0x600000: cmos_layout.bin)
CBFS:  - load entry 0x6004c0 file name (32 bytes)...
CBFS:  (unmatched file @0x6004c0: pci8086,0106.rom)
CBFS:  - load entry 0x610500 file name (72 bytes)...
CBFS: Found file (offset=0x610560, len=20544).
microcode: sig=0x206a7 pf=0x10 revision=0x28
CPU: Intel(R) Celeron(R) CPU 867 @ 1.30GHz.
memalign Enter, boundary 8, size 24, free_mem_ptr 0015cbd1
memalign 0015cbd8
memalign Enter, boundary 8, size 24, free_mem_ptr 0015cbf0
memalign 0015cbf0
memalign Enter, boundary 8, size 24, free_mem_ptr 0015cc08
memalign 0015cc08
memalign Enter, boundary 8, size 24, free_mem_ptr 0015cc20
memalign 0015cc20
memalign Enter, boundary 8, size 24, free_mem_ptr 0015cc38
memalign 0015cc38
memalign Enter, boundary 8, size 24, free_mem_ptr 0015cc50
memalign 0015cc50
memalign Enter, boundary 8, size 24, free_mem_ptr 0015cc68
memalign 0015cc68
memalign Enter, boundary 8, size 24, free_mem_ptr 0015cc80
memalign 0015cc80
memalign Enter, boundary 8, size 24, free_mem_ptr 0015cc98
memalign 0015cc98
memalign Enter, boundary 8, size 24, free_mem_ptr 0015ccb0
memalign 0015ccb0
memalign Enter, boundary 8, size 24, free_mem_ptr 0015ccc8
memalign 0015ccc8
memalign Enter, boundary 8, size 24, free_mem_ptr 0015cce0
memalign 0015cce0
memalign Enter, boundary 8, size 24, free_mem_ptr 0015ccf8
memalign 0015ccf8
memalign Enter, boundary 8, size 24, free_mem_ptr 0015cd10
memalign 0015cd10
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x00000000ad000000 size 0xacf40000 type 6
0x00000000ad000000 - 0x00000000d0000000 size 0x23000000 type 0
0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1
0x00000000e0000000 - 0x00000000ff800000 size 0x1f800000 type 0
0x00000000ff800000 - 0x0000000100000000 size 0x00800000 type 5
0x0000000100000000 - 0x000000014fe00000 size 0x4fe00000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
MTRR: default type WB/UC MTRR counts: 12/8.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
MTRR: 1 base 0x0000000080000000 mask 0x0000000fe0000000 type 6
MTRR: 2 base 0x00000000a0000000 mask 0x0000000ff0000000 type 6
MTRR: 3 base 0x00000000ad000000 mask 0x0000000fff000000 type 0
MTRR: 4 base 0x00000000ae000000 mask 0x0000000ffe000000 type 0
MTRR: 5 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
MTRR: 6 base 0x00000000ff800000 mask 0x0000000fff800000 type 0
MTRR: 7 base 0x0000000100000000 mask 0x0000000f00000000 type 6

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local apic... apic_id: 0x00 done.
Enabling VMX
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 1300
Turbo is unavailable
CPU: 0 has 2 cores, 1 threads per core
memalign Enter, boundary 8, size 152, free_mem_ptr 0015cd28
memalign 0015cd28
CPU: 0 has core 2
CPU1: stack_base 0015a000, stack_end 0015aff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
Initializing CPU #1
Startup point 1.
Waiting for send to finish...
+CPU: vendor Intel device 206a7
Sending STARTUP #2 to 2.
After apic_write.
CPU: family 06, model 2a, stepping 07
Startup point 1.
Waiting for send to finish...
+Enabling cache
After Startup.
CPU #0 initialized
Waiting for 1 CPUS to stop
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffff9c0/0x800000
CBFS: CBFS location: 0x600000~0x7ff9e0, align: 64
CBFS: Looking for 'cpu_microcode_blob.bin' starting from 0x600000.
CBFS:  - load entry 0x600000 file name (16 bytes)...
CBFS:  (unmatched file @0x600000: cmos_layout.bin)
CBFS:  - load entry 0x6004c0 file name (32 bytes)...
CBFS:  (unmatched file @0x6004c0: pci8086,0106.rom)
CBFS:  - load entry 0x610500 file name (72 bytes)...
CBFS: Found file (offset=0x610560, len=20544).
microcode: sig=0x206a7 pf=0x10 revision=0x0
microcode: updated to revision 0x28 date=2012-04-24
CPU: Intel(R) Celeron(R) CPU 867 @ 1.30GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
MTRR: 1 base 0x0000000080000000 mask 0x0000000fe0000000 type 6
MTRR: 2 base 0x00000000a0000000 mask 0x0000000ff0000000 type 6
MTRR: 3 base 0x00000000ad000000 mask 0x0000000fff000000 type 0
MTRR: 4 base 0x00000000ae000000 mask 0x0000000ffe000000 type 0
MTRR: 5 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
MTRR: 6 base 0x00000000ff800000 mask 0x0000000fff800000 type 0
MTRR: 7 base 0x0000000100000000 mask 0x0000000f00000000 type 6

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local apic... apic_id: 0x02 done.
Enabling VMX
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 1300
CPU #1 initialized
All AP CPUs stopped (13703 loops)
CPU1: stack: 0015a000 - 0015b000, lowest used address 0015abec, stack used: 1044 bytes
PCI: 00:00.0 init
Set BIOS_RESET_CPL
CPU TDP: 17 Watts
PCI: 00:02.0 init
GT Power Management Init
SNB GT1 Power Meter Weights
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffff9c0/0x800000
CBFS: CBFS location: 0x600000~0x7ff9e0, align: 64
CBFS: Looking for 'pci8086,0106.rom' starting from 0x600000.
CBFS:  - load entry 0x600000 file name (16 bytes)...
CBFS:  (unmatched file @0x600000: cmos_layout.bin)
CBFS:  - load entry 0x6004c0 file name (32 bytes)...
CBFS: Found file (offset=0x6004f8, len=65536).
In CBFS, ROM address for PCI: 00:02.0 = ffe004f8
PCI expansion ROM, signature 0xaa55, INIT size 0x10000, data ptr 0x0040
PCI ROM image, vendor ID 8086, device ID 0106,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from ffe004f8 to 0xc0000, 0x10000 bytes
Real mode stub @00000600: 867 bytes
Calling Option ROM...
int15_handler: INT15 function 5f34!
... Option ROM returned.
VBE: Getting information about VESA mode 4117
VBE: resolution:  1024x768@16
VBE: framebuffer: d0000000
VBE: Setting VESA mode 4117
int15_handler: INT15 function 5f70!
VGA Option ROM has been loaded
GT Power Management Init (post VBIOS)
PCI: 00:16.0 init
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : YES
ME: Manufacturing Mode      : YES
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Normal
ME: Current Operation State : M0 with UMA
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : Host Communication
ME: Power Management Event  : Clean Moff->Mx wake
ME: Progress Phase State    : Host communication established
ME: BIOS path: Normal
ME: Extend SHA-256: 5f466e1c69b5fe232b5bb547939edd493c81c66fa0394befb8b672426018f72a
ME: Firmware Version 7.1.1161.40 (code) 7.1.1161.40 (recovery)
ME Capability: Full Network manageability     : disabled
ME Capability: Regular Network manageability  : disabled
ME Capability: Manageability                  : disabled
ME Capability: Small business technology      : disabled
ME Capability: Level III manageability        : disabled
ME Capability: IntelR Anti-Theft (AT)         : disabled
ME Capability: IntelR Capability Licensing Service (CLS) : enabled
ME Capability: IntelR Power Sharing Technology (MPC) : enabled
ME Capability: ICC Over Clocking              : enabled
ME Capability: Protected Audio Video Path (PAVP) : disabled
ME Capability: IPV6                           : disabled
ME Capability: KVM Remote Control (KVM)       : disabled
ME Capability: Outbreak Containment Heuristic (OCH) : disabled
ME Capability: Virtual LAN (VLAN)             : disabled
ME Capability: TLS                            : disabled
ME Capability: Wireless LAN (WLAN)            : disabled
PCI: 00:1a.0 init
EHCI: Setting up controller.. done.
PCI: 00:1b.0 init
Azalia: base = e0600000
Azalia: codec_mask = 09
Azalia: Initializing codec #3
Azalia: codec viddid: 80862805
Azalia: No verb!
Azalia: Initializing codec #0
Azalia: codec viddid: 10134210
Azalia: verb_size: 28
Azalia: verb loaded.
PCI: 00:1c.0 init
Initializing PCH PCIe bridge.
PCI: 00:1c.3 init
Initializing PCH PCIe bridge.
PCI: 00:1d.0 init
EHCI: Setting up controller.. done.
PCI: 00:1f.0 init
pch: lpc_init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
  reg 0x0000: 0x02000000
  reg 0x0001: 0x00170020
  reg 0x0002: 0x00170020
Set power off after power failure.
NMI sources disabled.
CougarPoint PM init
rtc_failed = 0x0
RTC Init
i8259_configure_irq_trigger: current interrupts are 0x0
i8259_configure_irq_trigger: try to set interrupts 0x200
Enabling BIOS updates outside of SMM... Disabling ACPI via APMC:
done.
Locking SMM.
PCI: 00:1f.2 init
SATA: Initializing...
SATA: Controller in AHCI mode.
ABAR: E0605000
PCI: 00:1f.3 init
PCI: 00:1f.6 init
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffff9c0/0x800000
CBFS: CBFS location: 0x600000~0x7ff9e0, align: 64
CBFS: Looking for 'pci8086,1c24.rom' starting from 0x600000.
CBFS:  - load entry 0x600000 file name (16 bytes)...
CBFS:  (unmatched file @0x600000: cmos_layout.bin)
CBFS:  - load entry 0x6004c0 file name (32 bytes)...
CBFS:  (unmatched file @0x6004c0: pci8086,0106.rom)
CBFS:  - load entry 0x610500 file name (72 bytes)...
CBFS:  (unmatched file @0x610500: cpu_microcode_blob.bin)
CBFS:  - load entry 0x6155c0 file name (32 bytes)...
CBFS:  (unmatched file @0x6155c0: fallback/romstage)
CBFS:  - load entry 0x61fec0 file name (32 bytes)...
CBFS:  (unmatched file @0x61fec0: fallback/coreboot_ram)
CBFS:  - load entry 0x636bc0 file name (32 bytes)...
CBFS:  (unmatched file @0x636bc0: fallback/payload)
CBFS:  - load entry 0x6d46c0 file name (16 bytes)...
CBFS:  (unmatched file @0x6d46c0: config)
CBFS:  - load entry 0x6d5b00 file name (16 bytes)...
CBFS:  (unmatched file @0x6d5b00: )
CBFS:  - load entry 0x77ffc0 file name (40 bytes)...
CBFS:  (unmatched file @0x77ffc0: mrc.cache)
CBFS:  - load entry 0x780000 file name (16 bytes)...
CBFS:  (unmatched file @0x780000: )
CBFS:  - load entry 0x79ffc0 file name (40 bytes)...
CBFS:  (unmatched file @0x79ffc0: mrc.bin)
CBFS:  - load entry 0x7cfcc0 file name (16 bytes)...
CBFS:  (unmatched file @0x7cfcc0: )
CBFS:  - load entry 0x7dbfc0 file name (40 bytes)...
CBFS:  (unmatched file @0x7dbfc0: spd.bin)
CBFS:  - load entry 0x7dc600 file name (16 bytes)...
CBFS:  (unmatched file @0x7dc600: )
CBFS: ERROR: No file header found at 0x7ff980 - try next aligned address: 0x7ff9c0.
CBFS: ERROR: No file header found at 0x7ff9c0 - try next aligned address: 0x7ffa00.
CBFS: WARNING: 'pci8086,1c24.rom' not found.
CBFS: Could not find file 'pci8086,1c24.rom'.
PCI: 01:00.0 init
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffff9c0/0x800000
CBFS: CBFS location: 0x600000~0x7ff9e0, align: 64
CBFS: Looking for 'pci168c,0030.rom' starting from 0x600000.
CBFS:  - load entry 0x600000 file name (16 bytes)...
CBFS:  (unmatched file @0x600000: cmos_layout.bin)
CBFS:  - load entry 0x6004c0 file name (32 bytes)...
CBFS:  (unmatched file @0x6004c0: pci8086,0106.rom)
CBFS:  - load entry 0x610500 file name (72 bytes)...
CBFS:  (unmatched file @0x610500: cpu_microcode_blob.bin)
CBFS:  - load entry 0x6155c0 file name (32 bytes)...
CBFS:  (unmatched file @0x6155c0: fallback/romstage)
CBFS:  - load entry 0x61fec0 file name (32 bytes)...
CBFS:  (unmatched file @0x61fec0: fallback/coreboot_ram)
CBFS:  - load entry 0x636bc0 file name (32 bytes)...
CBFS:  (unmatched file @0x636bc0: fallback/payload)
CBFS:  - load entry 0x6d46c0 file name (16 bytes)...
CBFS:  (unmatched file @0x6d46c0: config)
CBFS:  - load entry 0x6d5b00 file name (16 bytes)...
CBFS:  (unmatched file @0x6d5b00: )
CBFS:  - load entry 0x77ffc0 file name (40 bytes)...
CBFS:  (unmatched file @0x77ffc0: mrc.cache)
CBFS:  - load entry 0x780000 file name (16 bytes)...
CBFS:  (unmatched file @0x780000: )
CBFS:  - load entry 0x79ffc0 file name (40 bytes)...
CBFS:  (unmatched file @0x79ffc0: mrc.bin)
CBFS:  - load entry 0x7cfcc0 file name (16 bytes)...
CBFS:  (unmatched file @0x7cfcc0: )
CBFS:  - load entry 0x7dbfc0 file name (40 bytes)...
CBFS:  (unmatched file @0x7dbfc0: spd.bin)
CBFS:  - load entry 0x7dc600 file name (16 bytes)...
CBFS:  (unmatched file @0x7dc600: )
CBFS: ERROR: No file header found at 0x7ff980 - try next aligned address: 0x7ff9c0.
CBFS: ERROR: No file header found at 0x7ff9c0 - try next aligned address: 0x7ffa00.
CBFS: WARNING: 'pci168c,0030.rom' not found.
CBFS: Could not find file 'pci168c,0030.rom'.
Option ROM address for PCI: 01:00.0 = e0420000
PCI expansion ROM, signature 0x0000, INIT size 0x0000, data ptr 0x0000
Incorrect expansion ROM header signature 0000
PCI: 02:00.0 init
Initializing RTL8168 Gigabit Ethernet
PNP: 002e.1 init
PNP: 002e.7 init
Keyboard init...
PNP: 002e.8 init
PNP: 002e.9 init
IOAPIC: 04 init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: 23 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
Devices initialized
Show all devs...After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 0
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 0
PCI: 00:1c.3: enabled 1
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 0
PNP: 002e.3: enabled 0
PNP: 002e.4: enabled 0
PNP: 002e.7: enabled 1
PNP: 002e.8: enabled 1
PNP: 002e.9: enabled 1
PNP: 00ff.1: enabled 0
IOAPIC: 04: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
PCI: 01:00.0: enabled 1
PCI: 02:00.0: enabled 1
APIC: 02: enabled 1
CBMEM region acee0000-acffffff (cbmem_reinit)
Adding CBMEM entry as no. 5
Moving GDT to acee1400...ok
Updating MRC cache data.
No FMAP found at ffe10000.
FMAP: area RW_MRC_CACHE not found
find_current_mrc_cache_local: No valid MRC cache found.
read 6000 from 07e4
read 00000000 from 0880
wrote 00000000 to 0880
memalign Enter, boundary 8, size 12, free_mem_ptr 0015cdc0
memalign 0015cdc0
read 00c0 from 0870
wrote 000c to 0870
wrote 9f to 0878
read 0000 from 0876
wrote 0000 to 0876
read 0000 from 0874
wrote 00000000 to 07e8
wrote 4402 to 0871
read 00c4 from 0870
wrote 0004 to 0870
read 001740ef from 07f0
read 00 from 07f4
wrote 0000 to 0874
SF: Got idcodes
memalign Enter, boundary 8, size 32, free_mem_ptr 0015cdcc
memalign 0015cdd0
SF: Detected W25Q64 with page size 1000, total 800000
Need to erase the MRC cache region of -1 bytes at 0010c8e3
SF: Erase offset/length not multiple of erase size
Finally: write MRC cache update to flash at 0010c8e3
PP: 0xacee0800 => cmd = { 0x02 0x90c8e3 } chunk_len = 29
read 00c0 from 0870
wrote 000c to 0870
wrote 06 to 0878
read 0000 from 0876
wrote 0001 to 0876
wrote 0006 to 0874
read 00c0 from 0870
wrote 000c to 0870
wrote 02 to 0878
read 0001 from 0876
wrote 0003 to 0876
read 0006 from 0874
wrote 0090c8e3 to 07e8
wrote 4443524d to 07f0
wrote 00000bb0 to 07f4
wrote 000058e3 to 07f8
wrote 00000000 to 07fc
wrote 00187999 to 0800
wrote 0a145454 to 0804
wrote 0a023220 to 0808
wrote 90 to 080c
wrote 5c06 to 0871
read 04cc from 0870
wrote 000c to 0870
ICH SPI: Data transaction error
SF: Failed to send write command (29 bytes): -1
SF: Winbond Page Program failed
CBMEM Base is acee0000.
Adding CBMEM entry as no. 6
ACPI: Writing ACPI tables at acee1600.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * FADT
ACPI: added table 1/32, length now 40
ACPI:    * HPET
ACPI: added table 2/32, length now 44
ACPI:    * MADT
ACPI: added table 3/32, length now 48
ACPI:    * MCFG
ACPI: added table 4/32, length now 52
ACPI: Patching up global NVS in DSDT at offset 0x0158 -> 0xacee50e0
Adding CBMEM entry as no. 7
ACPI:     * DSDT @ acee1850 Length 36af
ACPI:     * SSDT
Found 1 CPU(s) with 2 core(s) each.
PSS: 1300MHz power 17000 control 0xd00 status 0xd00
PSS: 1000MHz power 12628 control 0xa00 status 0xa00
PSS: 800MHz power 9859 control 0x800 status 0x800
PSS: 1300MHz power 17000 control 0xd00 status 0xd00
PSS: 1000MHz power 12628 control 0xa00 status 0xa00
PSS: 800MHz power 9859 control 0x800 status 0x800
ACPI: added table 5/32, length now 56
current = acee6800
ACPI: done.
ACPI tables: 20992 bytes.
Adding CBMEM entry as no. 8
smbios_write_tables: aceecc00
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffff9c0/0x800000
Root Device (SAMSUNG Lumpy)
CPU_CLUSTER: 0 (Intel i7 (SandyBridge/IvyBridge) integrated Northbridge)
APIC: 00 (Socket rPGA989 CPU)
APIC: acac (Intel SandyBridge/IvyBridge CPU)
DOMAIN: 0000 (Intel i7 (SandyBridge/IvyBridge) integrated Northbridge)
PCI: 00:00.0 (Intel i7 (SandyBridge/IvyBridge) integrated Northbridge)
PCI: 00:02.0 (Intel i7 (SandyBridge/IvyBridge) integrated Northbridge)
PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PNP: 002e.1 (SMSC MEC1308 EC SuperIO Interface)
PNP: 002e.2 (SMSC MEC1308 EC SuperIO Interface)
PNP: 002e.3 (SMSC MEC1308 EC SuperIO Interface)
PNP: 002e.4 (SMSC MEC1308 EC SuperIO Interface)
PNP: 002e.7 (SMSC MEC1308 EC SuperIO Interface)
PNP: 002e.8 (SMSC MEC1308 EC SuperIO Interface)
PNP: 002e.9 (SMSC MEC1308 EC SuperIO Interface)
PNP: 00ff.1 (SMSC MEC1308 EC Mailbox Interface)
IOAPIC: 04 (IOAPIC)
PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 01:00.0 (unknown)
PCI: 02:00.0 (unknown)
APIC: 02 (unknown)
SMBIOS tables: 398 bytes.
Adding CBMEM entry as no. 9
Adding CBMEM entry as no. 10
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 7edf
Table forward entry ends at 0x00000528.
... aligned to 0x00001000
Writing coreboot table at 0xacfed400
rom_table_end = 0xacfed400
... aligned to 0xacff0000
memalign Enter, boundary 8, size 24, free_mem_ptr 0015cdf0
memalign 0015cdf0
memalign Enter, boundary 8, size 24, free_mem_ptr 0015ce08
memalign 0015ce08
memalign Enter, boundary 8, size 24, free_mem_ptr 0015ce20
memalign 0015ce20
memalign Enter, boundary 8, size 24, free_mem_ptr 0015ce38
memalign 0015ce38
memalign Enter, boundary 8, size 24, free_mem_ptr 0015ce50
memalign 0015ce50
memalign Enter, boundary 8, size 24, free_mem_ptr 0015ce68
memalign 0015ce68
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000fffff: RESERVED
 3. 0000000000100000-000000001fffffff: RAM
 4. 0000000020000000-00000000201fffff: RESERVED
 5. 0000000020200000-000000003fffffff: RAM
 6. 0000000040000000-00000000401fffff: RESERVED
 7. 0000000040200000-00000000acedffff: RAM
 8. 00000000acee0000-00000000acffffff: CONFIGURATION TABLES
 9. 00000000ad000000-00000000af9fffff: RESERVED
10. 00000000f0000000-00000000f3ffffff: RESERVED
11. 0000000100000000-000000014fdfffff: RAM
Wrote coreboot table at: acfed400, 0x358 bytes, checksum e3b9
coreboot table: 880 bytes.
Multiboot Information structure has been written.
FREE SPACE  0. acff5400 0000ac00
CAR GLOBALS 1. acee0200 00000200
TIME STAMP  2. acee0400 00000200
USBDEBUG    3. acee0600 00000200
MRC DATA    4. acee0800 00000c00
GDT         5. acee1400 00000200
ACPI        6. acee1600 0000b400
GNVS PTR    7. aceeca00 00000200
SMBIOS      8. aceecc00 00000800
ACPI RESUME 9. aceed400 00100000
COREBOOT   10. acfed400 00008000
CBFS: CBFS_HEADER_ROM_ADDRESS: 0xfffff9c0/0x800000
CBFS: CBFS location: 0x600000~0x7ff9e0, align: 64
CBFS: Looking for 'fallback/payload' starting from 0x600000.
CBFS:  - load entry 0x600000 file name (16 bytes)...
CBFS:  (unmatched file @0x600000: cmos_layout.bin)
CBFS:  - load entry 0x6004c0 file name (32 bytes)...
CBFS:  (unmatched file @0x6004c0: pci8086,0106.rom)
CBFS:  - load entry 0x610500 file name (72 bytes)...
CBFS:  (unmatched file @0x610500: cpu_microcode_blob.bin)
CBFS:  - load entry 0x6155c0 file name (32 bytes)...
CBFS:  (unmatched file @0x6155c0: fallback/romstage)
CBFS:  - load entry 0x61fec0 file name (32 bytes)...
CBFS:  (unmatched file @0x61fec0: fallback/coreboot_ram)
CBFS:  - load entry 0x636bc0 file name (32 bytes)...
CBFS: Found file (offset=0x636bf8, len=645776).
Loading segment from rom address 0xffe36bf8
  code (compression=1)
memalign Enter, boundary 8, size 28, free_mem_ptr 0015ce80
memalign 0015ce80
  New segment dstaddr 0x8200 memsize 0x16910 srcaddr 0xffe36c4c filesize 0x83c0
  (cleaned up) New segment addr 0x8200 size 0x16910 offset 0xffe36c4c filesize 0x83c0
Loading segment from rom address 0xffe36c14
  code (compression=1)
memalign Enter, boundary 8, size 28, free_mem_ptr 0015ce9c
memalign 0015cea0
  New segment dstaddr 0x100000 memsize 0x2c8054 srcaddr 0xffe3f00c filesize 0x9567c
  (cleaned up) New segment addr 0x100000 size 0x2c8054 offset 0xffe3f00c filesize 0x9567c
Loading segment from rom address 0xffe36c30
  Entry Point 0x00008200
Loading Segment: addr: 0x0000000000008200 memsz: 0x0000000000016910 filesz: 0x00000000000083c0
lb: [0x0000000000100000, 0x0000000000160040)
Post relocation: addr: 0x0000000000008200 memsz: 0x0000000000016910 filesz: 0x00000000000083c0
using LZMA
[ 0x00008200, 000173eb, 0x0001eb10) <- ffe36c4c
Clearing Segment: addr: 0x00000000000173eb memsz: 0x0000000000007725
dest 00008200, end 0001eb10, bouncebuffer acbb7f6c
Loading Segment: addr: 0x0000000000100000 memsz: 0x00000000002c8054 filesz: 0x000000000009567c
lb: [0x0000000000100000, 0x0000000000160040)
segment: [0x0000000000100000, 0x000000000019567c, 0x00000000003c8054)
 bounce: [0x00000000acbb7f6c, 0x00000000acc4d5e8, 0x00000000ace7ffc0)
Post relocation: addr: 0x00000000acbb7f6c memsz: 0x00000000002c8054 filesz: 0x000000000009567c
using LZMA
[ 0xacbb7f6c, ace7ffc0, 0xace7ffc0) <- ffe3f00c
dest acbb7f6c, end ace7ffc0, bouncebuffer acbb7f6c
move suffix around: from acc17fac, to 160040, amount: 268014
Loaded segments
int15_handler: INT15 function 5f70!
PCH watchdog disabled
Jumping to boot code at 00008200
CPU0: stack: 0015b000 - 0015c000, lowest used address 0015b9b8, stack used: 1608 bytes
entry    = 0x00008200
lb_start = 0x00100000
lb_size  = 0x00060040
buffer   = 0xacbb7f6c
