<div>
                Hello Nico,</div><div><br>My patch to ./roda/rk9/romstage.c</div><div><br></div><div><br></div><div><div>--- ./rk9_orig/romstage.c<span class="Apple-tab-span" style="white-space:pre">       </span>2014-02-14 18:26:39.000000000 +0400</div><div>+++ ./rk9_patch/romstage.c<span class="Apple-tab-span" style="white-space:pre">        </span>2014-02-14 18:36:24.859508133 +0400</div><div>@@ -47,10 +47,14 @@</div><div> <span class="Apple-tab-span" style="white-space:pre">  </span>/* Set gpio levels [31:0]. orig: 0x01140800 (~SATA0, ~SATA1, GSM, BT,</div><div> <span class="Apple-tab-span" style="white-space:pre">                                          </span>     WLAN, ~ANTMUX, ~GPIO12,</div><div> <span class="Apple-tab-span" style="white-space:pre">                                         </span>     ~SUSPWR, SMBALERT) */</div><div>-<span class="Apple-tab-span" style="white-space:pre">        </span>outl(0x00000800, DEFAULT_GPIOBASE + 0x0c);</div><div>+<span class="Apple-tab-span" style="white-space:pre">  </span>//outl(0x00000800, DEFAULT_GPIOBASE + 0x0c);</div><div> </div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>outl(0xe6c8cbff, DEFAULT_GPIOBASE + 0x0c);</div><div> <span class="Apple-tab-span" style="white-space:pre">     </span>/* Disable blink [31:0]. */</div><div> <span class="Apple-tab-span" style="white-space:pre">    </span>outl(0x00000000, DEFAULT_GPIOBASE + 0x18);</div><div>+<span class="Apple-tab-span" style="white-space:pre">  </span></div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>outl(0x00080000, DEFAULT_GPIOBASE + 0x20);</div><div>+<span class="Apple-tab-span" style="white-space:pre">  </span></div><div> <span class="Apple-tab-span" style="white-space:pre">       </span>/* Set input inversion [31:0]. */</div><div> <span class="Apple-tab-span" style="white-space:pre">      </span>outl(0x00000182, DEFAULT_GPIOBASE + 0x2c);</div><div> </div><div>@@ -61,7 +65,8 @@</div><div> <span class="Apple-tab-span" style="white-space:pre">        </span>/* Set gpio levels [60:32]. orig: 0x10020046 (LNKALERT, ~ATAIO,</div><div> <span class="Apple-tab-span" style="white-space:pre">                                                </span>      DMITERM, TXT, ~CLKSATA,</div><div> <span class="Apple-tab-span" style="white-space:pre">                                           </span>      GPS, AUDIO)  */</div><div>-<span class="Apple-tab-span" style="white-space:pre">   </span>outl(0x10020042, DEFAULT_GPIOBASE + 0x38);</div><div>+<span class="Apple-tab-span" style="white-space:pre">  </span>//outl(0x10020042, DEFAULT_GPIOBASE + 0x38);</div><div>+<span class="Apple-tab-span" style="white-space:pre">        </span>outl(0x1cfffff2, DEFAULT_GPIOBASE + 0x38);</div><div> }</div><div> </div><div> static void early_lpc_setup(void)</div><div>@@ -74,6 +79,30 @@</div><div> <span class="Apple-tab-span" style="white-space:pre">   </span>pci_write_config16(LPC_DEV, D31F0_LPC_IODEC, 0x0010);</div><div> <span class="Apple-tab-span" style="white-space:pre">  </span>/* Enable COMa, COMb, Kbd, SuperIO at 0x2e, MCs at 0x4e and 0x62/66. */</div><div> <span class="Apple-tab-span" style="white-space:pre">        </span>pci_write_config16(LPC_DEV, D31F0_LPC_EN, 0x3c03);</div><div>+<span class="Apple-tab-span" style="white-space:pre">  </span>/* Enable decoding of 0x600-0x61f through lpc. */</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pci_write_config32(LPC_DEV, D31F0_GEN1_DEC, 0x001f0601);</div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>/* Enable decoding COM3 and COM4 */</div><div>+<span class="Apple-tab-span" style="white-space:pre"> </span>pci_write_config32(LPC_DEV, D31F0_GEN2_DEC, 0x001c02e1);</div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>pci_write_config32(LPC_DEV, D31F0_GEN3_DEC, 0x001c03e1);</div><div>+}</div><div>+</div><div>+static inline void pnp_enter_ext_func_mode(device_t dev)</div><div>+{</div><div>+<span class="Apple-tab-span" style="white-space:pre">  </span>unsigned int port = dev >> 8;</div><div>+<span class="Apple-tab-span" style="white-space:pre"> </span>outb(0x55, port);</div><div>+}</div><div>+</div><div>+static void pnp_exit_ext_func_mode(device_t dev)</div><div>+{</div><div>+<span class="Apple-tab-span" style="white-space:pre"> </span>unsigned int port = dev >> 8;</div><div>+<span class="Apple-tab-span" style="white-space:pre"> </span>outb(0xaa, port);</div><div>+}</div><div>+</div><div>+static void pnp_write_register(device_t dev, int reg, int val)</div><div>+{</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>unsigned int port = dev >> 8;</div><div>+<span class="Apple-tab-span" style="white-space:pre"> </span>outb(reg, port);</div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>outb(val, port+1);</div><div> }</div><div> </div><div> static void default_superio_gpio_setup(void)</div><div>@@ -87,45 +116,88 @@</div><div> <span class="Apple-tab-span" style="white-space:pre">      </span>   GP1 GP2 GP3 GP4</div><div> <span class="Apple-tab-span" style="white-space:pre">        </span>    fd  17  88  14</div><div> <span class="Apple-tab-span" style="white-space:pre">    </span>*/</div><div>-<span class="Apple-tab-span" style="white-space:pre">  </span>const device_t sio = PNP_DEV(0x2e, 0);</div><div>+<span class="Apple-tab-span" style="white-space:pre">      </span></div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>device_t dev;</div><div> </div><div>-<span class="Apple-tab-span" style="white-space:pre">  </span>/* Enter super-io's configuration state. */</div><div>-<span class="Apple-tab-span" style="white-space:pre"> </span>pnp_enter_conf_state(sio);</div><div>-</div><div>-<span class="Apple-tab-span" style="white-space:pre">  </span>/* Set lpc47n227's runtime register block's base address. */</div><div>-<span class="Apple-tab-span" style="white-space:pre">        </span>pnp_write_config(sio, 0x30, 0x600 >> 4);</div><div>-</div><div>-<span class="Apple-tab-span" style="white-space:pre">      </span>/* Set GP23 to alternate function. */</div><div>-<span class="Apple-tab-span" style="white-space:pre">       </span>pnp_write_config(sio, 0x33, 0x40);</div><div>-</div><div>-<span class="Apple-tab-span" style="white-space:pre">  </span>/* Set GP30 - GP37 to output mode: COM control */</div><div>-<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_config(sio, 0x35, 0xff);</div><div>-</div><div>-<span class="Apple-tab-span" style="white-space:pre">  </span>/* Set GP45 - GP47 to output mode. */</div><div>-<span class="Apple-tab-span" style="white-space:pre">       </span>pnp_write_config(sio, 0x37, 0xe0);</div><div>-</div><div>-<span class="Apple-tab-span" style="white-space:pre">  </span>/* Set nIO_PME to open drain. */</div><div>-<span class="Apple-tab-span" style="white-space:pre">    </span>pnp_write_config(sio, 0x39, 0x80);</div><div>-</div><div>-<span class="Apple-tab-span" style="white-space:pre">  </span>/* Exit configuration state. */</div><div>-<span class="Apple-tab-span" style="white-space:pre">     </span>pnp_exit_conf_state(sio);</div><div>-</div><div>-</div><div>-<span class="Apple-tab-span" style="white-space:pre">   </span>/* Enable decoding of 0x600-0x60f through lpc. */</div><div>-<span class="Apple-tab-span" style="white-space:pre">   </span>pci_write_config32(LPC_DEV, D31F0_GEN1_DEC, 0x000c0601);</div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>dev=PNP_DEV(0x2e, 0x00);</div><div> </div><div>+<span class="Apple-tab-span" style="white-space:pre">       </span>pnp_enter_ext_func_mode(dev);</div><div>+<span class="Apple-tab-span" style="white-space:pre">       </span>pnp_write_register(dev, 0x01, 0x9c); // Extended Parport modes</div><div>+<span class="Apple-tab-span" style="white-space:pre">      </span>pnp_write_register(dev, 0x02, 0x00); // UART power on</div><div>+<span class="Apple-tab-span" style="white-space:pre">       </span>pnp_write_register(dev, 0x03, 0x72); // Floppy</div><div>+<span class="Apple-tab-span" style="white-space:pre">      </span>pnp_write_register(dev, 0x04, 0x00); // EPP + SPP</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x14, 0x02); // Floppy</div><div>+<span class="Apple-tab-span" style="white-space:pre">      </span>pnp_write_register(dev, 0x20, (0x3f0 >> 2)); // Floppy</div><div>+<span class="Apple-tab-span" style="white-space:pre">        </span>pnp_write_register(dev, 0x23, (0x378 >> 2)); // PP base</div><div>+<span class="Apple-tab-span" style="white-space:pre">       </span>pnp_write_register(dev, 0x24, (0x3f8 >> 2)); // UART1 base</div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>pnp_write_register(dev, 0x25, (0x2f8 >> 2)); // UART2 base</div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>pnp_write_register(dev, 0x26, (2 << 4) | 0x0f); // FDC + PP DMA</div><div>+<span class="Apple-tab-span" style="white-space:pre">       </span>pnp_write_register(dev, 0x27, (6 << 4) | 7); // FDC + PP DMA</div><div>+<span class="Apple-tab-span" style="white-space:pre">  </span>pnp_write_register(dev, 0x28, (4 << 4) | 3); // UART1,2 IRQ</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>/* These are the SMI status registers in the SIO: */</div><div>+<span class="Apple-tab-span" style="white-space:pre">        </span>pnp_write_register(dev, 0x30, (0x600 >> 4)); // Runtime Register Block Base</div><div>+</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x31, 0x00); // GPIO1 DIR</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x32, 0x00); // GPIO1 POL</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x33, 0x40); // GPIO2 DIR</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x34, 0x00); // GPIO2 POL</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x35, 0xff); // GPIO3 DIR</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x36, 0x00); // GPIO3 POL</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x37, 0xe0); // GPIO4 DIR</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x38, 0x00); // GPIO4 POL</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x39, 0x80); // GPIO4 POL</div><div>+</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_exit_ext_func_mode(dev);</div><div>+</div><div>+<span class="Apple-tab-span" style="white-space:pre">        </span>dev=PNP_DEV(0x4e, 0x00);</div><div>+</div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>pnp_enter_ext_func_mode(dev);</div><div>+<span class="Apple-tab-span" style="white-space:pre">       </span>pnp_write_register(dev, 0x01, 0x98); // Extended Parport modes</div><div>+<span class="Apple-tab-span" style="white-space:pre">      </span>pnp_write_register(dev, 0x02, 0x00); // UART power on</div><div>+<span class="Apple-tab-span" style="white-space:pre">       </span>pnp_write_register(dev, 0x03, 0x70); // Floppy</div><div>+<span class="Apple-tab-span" style="white-space:pre">      </span>pnp_write_register(dev, 0x04, 0x01); // EPP + SPP</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x14, 0x02); // Floppy</div><div>+<span class="Apple-tab-span" style="white-space:pre">      </span>//pnp_write_register(dev, 0x20, (0x3f0 >> 2)); // Floppy</div><div>+<span class="Apple-tab-span" style="white-space:pre">      </span>//pnp_write_register(dev, 0x23, (0x378 >> 2)); // PP base</div><div>+<span class="Apple-tab-span" style="white-space:pre">     </span>pnp_write_register(dev, 0x24, (0x3e8 >> 2)); // UART3 base</div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>pnp_write_register(dev, 0x25, (0x2e8 >> 2)); // UART4 base</div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>pnp_write_register(dev, 0x26, (0x0f << 4) | 0x0f); // FDC + PP DMA</div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>//pnp_write_register(dev, 0x27, (6 << 4) | 7); // FDC + PP DMA</div><div>+<span class="Apple-tab-span" style="white-space:pre">        </span>pnp_write_register(dev, 0x28, (10 << 4) | 5); // UART3,4 IRQ</div><div>+<span class="Apple-tab-span" style="white-space:pre">  </span>/* These are the SMI status registers in the SIO: */</div><div>+<span class="Apple-tab-span" style="white-space:pre">        </span>pnp_write_register(dev, 0x30, (0x610 >> 4)); // Runtime Register Block Base</div><div>+</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x31, 0x00); // GPIO1 DIR</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x32, 0x00); // GPIO1 POL</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x33, 0x00); // GPIO2 DIR</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x34, 0x00); // GPIO2 POL</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x35, 0xff); // GPIO3 DIR</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x36, 0x00); // GPIO3 POL</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x37, 0x00); // GPIO4 DIR</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x38, 0x00); // GPIO4 POL</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>pnp_write_register(dev, 0x39, 0x80); // GPIO4 POL</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span></div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span></div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>pnp_exit_ext_func_mode(dev);</div><div>+<span class="Apple-tab-span" style="white-space:pre">        </span></div><div> <span class="Apple-tab-span" style="white-space:pre">       </span>/* Set GPIO output values: */</div><div>+<span class="Apple-tab-span" style="white-space:pre">       </span>outb(0xfd, 0x600 + 0xb + 1); /* GP10 - GP17 */</div><div>+<span class="Apple-tab-span" style="white-space:pre">      </span>outb(0x17, 0x600 + 0xb + 2); /* GP20 - GP27 */</div><div> <span class="Apple-tab-span" style="white-space:pre"> </span>outb(0x88, 0x600 + 0xb + 3); /* GP30 - GP37 */</div><div> <span class="Apple-tab-span" style="white-space:pre"> </span>outb(0x10, 0x600 + 0xb + 4); /* GP40 - GP47 */</div><div>+<span class="Apple-tab-span" style="white-space:pre">      </span></div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>outb(0xff, 0x610 + 0xb + 1); /* GP10 - GP17 */</div><div>+<span class="Apple-tab-span" style="white-space:pre">      </span>outb(0x1f, 0x610 + 0xb + 2); /* GP20 - GP27 */</div><div>+<span class="Apple-tab-span" style="white-space:pre">      </span>outb(0x88, 0x610 + 0xb + 3); /* GP30 - GP37 */</div><div>+<span class="Apple-tab-span" style="white-space:pre">      </span>outb(0xff, 0x610 + 0xb + 4); /* GP40 - GP47 */</div><div> }</div><div> </div><div> void main(unsigned long bist)</div><div> {</div><div> <span class="Apple-tab-span" style="white-space:pre">      </span>sysinfo_t sysinfo;</div><div> <span class="Apple-tab-span" style="white-space:pre">     </span>int s3resume = 0;</div><div>-<span class="Apple-tab-span" style="white-space:pre">   </span>int cbmem_initted;</div><div> <span class="Apple-tab-span" style="white-space:pre">     </span>u16 reg16;</div><div>-</div><div>+<span class="Apple-tab-span" style="white-space:pre">  </span></div><div> <span class="Apple-tab-span" style="white-space:pre">       </span>/* basic northbridge setup, including MMCONF BAR */</div><div> <span class="Apple-tab-span" style="white-space:pre">    </span>gm45_early_init();</div><div> </div><div>@@ -136,8 +208,10 @@</div><div> <span class="Apple-tab-span" style="white-space:pre">     </span>i82801ix_early_init();</div><div> <span class="Apple-tab-span" style="white-space:pre"> </span>early_lpc_setup();</div><div> <span class="Apple-tab-span" style="white-space:pre">     </span>default_superio_gpio_setup();</div><div>-<span class="Apple-tab-span" style="white-space:pre">       </span>lpc47n227_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);</div><div>+<span class="Apple-tab-span" style="white-space:pre">     </span>//lpc47n227_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);</div><div>+<span class="Apple-tab-span" style="white-space:pre">   </span>uart_init();</div><div> <span class="Apple-tab-span" style="white-space:pre">   </span>console_init();</div><div>+<span class="Apple-tab-span" style="white-space:pre">     </span></div><div> <span class="Apple-tab-span" style="white-space:pre">       </span>printk(BIOS_DEBUG, "running main(bist = %lu)\n", bist);</div><div> </div><div> <span class="Apple-tab-span" style="white-space:pre"> </span>reg16 = pci_read_config16(LPC_DEV, D31F0_GEN_PMCON_3);</div><div>@@ -184,12 +258,11 @@</div><div> </div><div> <span class="Apple-tab-span" style="white-space:pre">        </span>init_iommu();</div><div> </div><div>-<span class="Apple-tab-span" style="white-space:pre">  </span>cbmem_initted = !cbmem_recovery(0);</div><div> #if CONFIG_HAVE_ACPI_RESUME</div><div> <span class="Apple-tab-span" style="white-space:pre">    </span>/* If there is no high memory area, we didn't boot before, so</div><div> <span class="Apple-tab-span" style="white-space:pre">  </span> * this is not a resume. In that case we just create the cbmem toc.</div><div> <span class="Apple-tab-span" style="white-space:pre">    </span> */</div><div>-<span class="Apple-tab-span" style="white-space:pre"> </span>if (s3resume && cbmem_initted) {</div><div>+<span class="Apple-tab-span" style="white-space:pre">    </span>if (s3resume && cbmem_reinit() {</div><div> <span class="Apple-tab-span" style="white-space:pre">               </span>void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);</div><div> </div><div> <span class="Apple-tab-span" style="white-space:pre">         </span>/* copy 1MB - 64K to high tables ram_base to prevent memory corruption</div></div><div><br></div><div><br><font color="#002162"><br></font>Thank you<br><span style="font-family: arial, sans-serif;">Best regards, Dmitry Bagryanskiy</span><br><div><br>
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