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<pre>Hi Lukasz,
maybe there is a way to run coreboot (coreboot-libre) without the VGABIOS blob on your T60.
You may check if you are running coreboot with dual channel LVDS mode enforced (register "gfx.lvds_dual_channel" = "1").
If this is true, changing to single channel LVDS mode (register "gfx.lvds_dual_channel" = "0") may result in native graphics initialization.
This would be the inversely workaround for a T400 with a "high-resolution" display [<a href="http://libreboot.org/docs/hcl/gm45_lcd.html">1</a>].
Best Regards,
Kroms
<br />[1] http://libreboot.org/docs/hcl/gm45_lcd.html
Am 14.08.2015 15:08 schrieb Łukasz Dmitrowski:
> Problem solved after using VGABIOS extracted from factory BIOS instead
> of one extracted from memory.
>
> Regards,
> Lukasz Dmitrowski
>
> On 14.08.2015 13:29, Łukasz Dmitrowski wrote:
>> Hello,
>>
>> I am trying to run coreboot with seabios payload on Lenovo T60:
>>
>> Graphic: Intel Corporation Mobile 945GM/GMS, 943/940GML Express Integrated Graphics Controller [8086:27a2] (rev 03)
>> Display panel: LTN141XA-L01
>>
>> So, graphic is Intel, but display panel LTN141XA-L01 is not supported for native
>> graphics initialization. I dumped VGABIOS from memory and attached it to the ROM file:
>>
>> ./cbfstool coreboot.rom add -f vgabios_from_mem.bin -n pci8086,27a2.rom -t raw
>> ./cbfstool coreboot.rom add-int -i 0 -n etc/optionroms-checksum
>>
>> Unfortunately after powering on - screen is black. Did I miss something?
>>
>> --------------------------------
>>
>> VGABIOS which I use:
>>
>> Image 1:
>> PCI Expansion ROM Header:
>> Signature: 0x55aa (Ok)
>> CPU unique data: 0x75 0xe9 0xa9 0xe3 0x30 0x30 0x30 0x30
>> 0x30 0x30 0x30 0x30 0x30 0x30 0x30 0x30
>> Pointer to PCI Data Structure: 0x0040
>>
>> PCI Data Structure:
>> Signature: 0x50434952 'PCIR' (Ok)
>> Vendor ID: 0x8086
>> Device ID: 0x27a2
>> Vital Product Data: 0x0000
>> PCI Data Structure Length: 0x0018 (24 bytes)
>> PCI Data Structure Revision: 0x00
>> Class Code: 0x030000 (VGA Display controller)
>> Image Length: 0x0080 blocks (65536 bytes)
>> Revision Level of Code/Data: 0x0000
>> Code Type: 0x00 (Intel x86)
>> Last-Image Flag: 0x80 (last image in rom)
>> Reserved: 0x0000
>>
>> Platform specific data for x86 compliant option rom:
>> Initialization Size: 0x75 (59904 bytes)
>> Entry point for INIT function: 0xe3af
>>
>> -----------------------------------
>>
>> ROM contents:
>>
>> cmos.default 0x0 cmos_default 256
>> cmos_layout.bin 0x140 cmos_layout 1824
>> fallback/dsdt.aml 0x8c0 raw 12037
>> fallback/romstage 0x3800 stage 36472
>> fallback/ramstage 0xc6c0 stage 53914
>> fallback/payload 0x199c0 payload 55825
>> etc/ps2-keyboard-spinup 0x27440 raw 8
>> config 0x27480 raw 82
>> revision 0x27500 raw 569
>> etc/optionroms-checksum 0x27780 raw 8
>> pci8086,27a2.rom 0x277c0 raw 32768
>> (empty) 0x2f800 null 1901528
>>
>> ------------------------------------
>>
>> Regards,
>> Lukasz Dmitrowski
>>
>>
>></pre>
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