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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>This is FSP 1.1. I’ll work on getting serial output. It shouldn’t be difficult assuming this dev board has it routed. I agree that it will make debug easier.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><div><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>--David Crammer<o:p></o:p></span></p></div><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><div><div style='border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0in 0in 0in'><p class=MsoNormal><b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> coreboot [mailto:coreboot-bounces@coreboot.org] <b>On Behalf Of </b>Jin, Huang<br><b>Sent:</b> Wednesday, December 09, 2015 2:01 PM<br><b>To:</b> David Crammer<br><b>Cc:</b> coreboot@coreboot.org<br><b>Subject:</b> Re: [coreboot] FSPInitiNot Returning<o:p></o:p></span></p></div></div><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Intel Clear";color:#1F497D'>Hi David,<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Intel Clear";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Intel Clear";color:#1F497D'>May I know which FSP version are you using? If it is not difficult, enabling early serial output in coreboot before calling FSP will be helpful for trouble shooting your problem, and your development in the long run.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Intel Clear";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Intel Clear";color:#1F497D'>Thanks,<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Intel Clear";color:#1F497D'>Huang<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Intel Clear";color:#1F497D'><o:p> </o:p></span></p><div style='border:none;border-left:solid blue 1.5pt;padding:0in 0in 0in 4.0pt'><div><div style='border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in'><p class=MsoNormal><b><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>From:</span></b><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'> David Crammer [<a href="mailto:dcrammer@gmail.com">mailto:dcrammer@gmail.com</a>] <br><b>Sent:</b> Wednesday, December 09, 2015 11:05 AM<br><b>To:</b> Jin, Huang<br><b>Cc:</b> <a href="mailto:coreboot@coreboot.org">coreboot@coreboot.org</a><br><b>Subject:</b> Re: [coreboot] FSPInitiNot Returning<o:p></o:p></span></p></div></div><p class=MsoNormal><o:p> </o:p></p><div><div><p class=MsoNormal style='margin-bottom:12.0pt'>Yes. This is a broadwell platform. I removed the UPD settings and left them default (passed NULL for that pointer in the parameters to FspInit). It seems to get past that point now. I did notice that the SMBus addresses for the DIMMs were being set to different values than what is listed in the binary configuration tool. This and the PMBASE settings were really the only things changed in the coreboot source. Maybe this is the cause?<o:p></o:p></p></div><p class=MsoNormal>I don't really have any logs as I'm only debugging with port 0x80 values.<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p><div><p class=MsoNormal>On Wed, Dec 9, 2015 at 11:19 AM, Jin, Huang <<a href="mailto:huang.jin@intel.com" target="_blank">huang.jin@intel.com</a>> wrote:<o:p></o:p></p><blockquote style='border:none;border-left:solid #CCCCCC 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-top:5.0pt;margin-right:0in;margin-bottom:5.0pt'><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:11.0pt;font-family:"Intel Clear";color:#1F497D'>Hi David,</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:11.0pt;font-family:"Intel Clear";color:#1F497D'> </span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:11.0pt;font-family:"Intel Clear";color:#1F497D'>I am assuming you are using a Broadwell platform and Broadwell FSP. Could you please share some logs? I might be able to help you.</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:11.0pt;font-family:"Intel Clear";color:#1F497D'> </span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:11.0pt;font-family:"Intel Clear";color:#1F497D'>Thanks,</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:11.0pt;font-family:"Intel Clear";color:#1F497D'>Huang</span><o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><span style='font-size:11.0pt;font-family:"Intel Clear";color:#1F497D'> </span><o:p></o:p></p><div style='border:none;border-left:solid blue 1.5pt;padding:0in 0in 0in 4.0pt'><div><div style='border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in'><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'><b><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'>From:</span></b><span style='font-size:11.0pt;font-family:"Calibri","sans-serif"'> coreboot [mailto:<a href="mailto:coreboot-bounces@coreboot.org" target="_blank">coreboot-bounces@coreboot.org</a>] <b>On Behalf Of </b>David Crammer<br><b>Sent:</b> Wednesday, December 09, 2015 8:19 AM<br><b>To:</b> <a href="mailto:coreboot@coreboot.org" target="_blank">coreboot@coreboot.org</a><br><b>Subject:</b> [coreboot] FSPInitiNot Returning</span><o:p></o:p></p></div></div><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> <o:p></o:p></p><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'>Hello All,<o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> I’m running into a rather strange error and I’m hoping someone has had experience with this or may know about what I’m seeing. <o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> <o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'>I’m working with an Intel I5 5350U on an ADLINK platform. I’m getting to the part of the boot sequence where FspInit is called but it never returns to the specified return function. The system resets 3 times with a post code (codes inserted before and in return function) indicating that it got to the FspInit call and reset. After the third time, it settles on a post code of 0xBE. I can’t find reference to the post code anywhere.<o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> <o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'>Any help would be greatly appreciated. In case anyone is interested, I’ll reply with any updates.<o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> <o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'>--David Crammer<o:p></o:p></p></div></div></div></div></div></div></blockquote></div><p class=MsoNormal><o:p> </o:p></p></div></div></div></body></html>