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<div class="moz-cite-prefix">Dear Sir. <br>
<br>
Thank's your advise.<br>
<br>
This time, I'm downloaded the intel FSP from <a
moz-do-not-send="true"
href="http://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html"><a class="moz-txt-link-freetext" href="http://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html">http://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html</a></a><br>
<br>
FSP file name is "333407_RANGELEY_POSTGOLD_4_001US.tgz". <br>
<br>
and unpack this file, can see some files. see below<br>
<br>
<small> poplinux@raw RANGELEY_POSTGOLD_4 $ > find<br>
.<br>
./FSP<br>
./FSP/RangeleyFsp.bsf<br>
<font color="#ff0000"><b>./FSP/RANGELEY_POSTGOLD4_FSP_004_20150924.fd</b></font><br>
./FSP/include<br>
./FSP/include/fspffs.h<br>
./FSP/include/fspinfoheader.h<br>
./FSP/include/fspguid.h<br>
./FSP/include/fsptypes.h<br>
./FSP/include/fspplatform.h<br>
./FSP/include/fspfv.h<br>
./FSP/include/fspvpd.h<br>
./FSP/include/fspapi.h<br>
./FSP/include/fspbootmode.h<br>
./FSP/include/fspsupport.h<br>
./FSP/include/fsphob.h<br>
./FSP/srx<br>
./FSP/srx/fsphob.c<br>
./FSP/srx/fsp_support.c<br>
./FSP Kit Production RULAC click-through License.pdf<br>
./ReadMe.pdf<br>
./DOCUMENTATION<br>
./DOCUMENTATION/ReleaseNotes.pdf<br>
./DOCUMENTATION/C2000_FSP_Integration_Guide_Rev1_2.pdf<br>
./DOCUMENTATION/license.txt<br>
./Microcode<br>
./Microcode/microcode-m01406d000e.h<br>
./Microcode/microcode-m01406d8128.h<br>
</small><br>
<br>
The "ReadME.pdf" is said to me that "<small><font color="#ff0000"><b>./FSP/RANGELEY_POSTGOLD4_FSP_004_20150924.fd</b></font></small>"
is a FSP release binary file.<br>
<br>
<br>
Next,<br>
<br>
I'm enable the "<small style="font-family:굴림체"><b>[ ] Configure
defaults for the Intel FSP package</b> </small>" option. <br>
<br>
<small style="font-family:굴림체"> Mainboard<br>
Mainboard vendor (Intel) ---> <br>
Mainboard model (Mohon Peak CRB) ---><br>
<b>[ ] Configure defaults for the Intel FSP package</b> <br>
ROM chip size (2048 KB (2 MB)) ---> <br>
(0x00200000) Size of CBFS filesystem in ROM <br>
() fmap description file in fmd format</small><br>
<div><br>
</div>
And try to make for core boot. But occured the error.<br>
<br>
<small> poplinux@raw build $ > make<br>
GEN generated/bootblock.ld<br>
CP bootblock/arch/x86/bootblock.ld<br>
LINK cbfs/fallback/bootblock.debug<br>
OBJCOPY cbfs/fallback/bootblock.elf<br>
OBJCOPY bootblock.raw.bin<br>
make: *** No rule to make target
`../intel/fsp/rangeley/FvFsp.bin', needed by
`build/coreboot.pre'. Stop.</small><br>
<br>
<br>
Question.<br>
<br>
Is equal the <small><b>./FSP/RANGELEY_POSTGOLD4_FSP_004_20150924.fd
</b>and<b> FvFsp.bin ?? </b></small><br>
<br>
or How to get the <small><b>FvFsp.bin ??</b></small><br>
<br>
<br>
Thank you.<br>
<br>
<br>
<br>
<br>
2016-02-02 오후 9:24에 WANG FEI 이(가) 쓴 글:<br>
</div>
<blockquote
cite="mid:CAGH0wH0zKt_CVruy-3EQs9=6tOTe7FY90hipzA5tikwXivc=_w@mail.gmail.com"
type="cite">
<div dir="ltr">Mohon Peak coreboot can only power on your system
with a Rangeley SoC FSP included in your coreboot.
<div><br>
</div>
<div>Please download the Rangeley FSP binary from <a
moz-do-not-send="true"
href="http://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html"><a class="moz-txt-link-freetext" href="http://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html">http://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html</a></a>,</div>
<div><br>
</div>
<b
style="outline:0px;color:rgb(102,102,102);font-family:intel-clear,tahoma,helvetica,sans-serif;font-size:14px;line-height:20px">Intel®
Atom™ processor C2000 product family</b><span
style="color:rgb(102,102,102);font-family:intel-clear,tahoma,helvetica,sans-serif;font-size:14px;line-height:20px"> (formerly
Rangeley, Compliant with FSP v1.0 Specification)</span>
<ul
style="outline:0px;font-family:intel-clear,tahoma,helvetica,sans-serif;padding:0px
0px 0px 20px;margin:0px 0px
15px;clear:none;overflow:hidden;color:rgb(102,102,102);font-size:14px;line-height:20px">
<li style="outline:0px;padding:0px;margin:0px 0px 0px
20px;list-style:disc outside none"><a moz-do-not-send="true"
href="http://www.intel.com/content/www/us/en/embedded/software/fsp/atom-c2000-fsp-g4-windows-download.html"
style="outline:0px;text-decoration:none;color:rgb(0,113,197)">Windows*
release version 004 ></a></li>
<li style="outline:0px;padding:0px;margin:0px 0px 0px
20px;list-style:disc outside none"><a moz-do-not-send="true"
href="http://www.intel.com/content/www/us/en/embedded/software/fsp/atom-c2000-fsp-g4-linux-download.html"
style="outline:0px;text-decoration:none;color:rgb(0,113,197)">Linux*
release version 004 ></a></li>
<li style="outline:0px;padding:0px;margin:0px 0px 0px
20px;list-style:disc outside none"><a moz-do-not-send="true"
href="http://www.intel.com/content/www/us/en/embedded/software/fsp/atom-c2000-fsp-g4-release-notes.html"
style="outline:0px;text-decoration:none;color:rgb(0,113,197)">Release
notes ></a></li>
<li style="outline:0px;padding:0px;margin:0px 0px 0px
20px;list-style:disc outside none"><a moz-do-not-send="true"
href="http://www.intel.com/content/www/us/en/embedded/software/fsp/atom-c2000-crb-guide.html"
style="outline:0px;text-decoration:none;color:rgb(0,113,197)">Platform
guide ></a></li>
<li style="outline:0px;padding:0px;margin:0px 0px 0px
20px;list-style:disc outside none"><a moz-do-not-send="true"
href="http://www.intel.com/content/www/us/en/embedded/software/fsp/atom-c2000-fsp-integration-guide.html"
style="outline:0px;text-decoration:none;color:rgb(0,113,197)">Integration
guide ></a></li>
</ul>
<div> And following the steps described on FSP integration guide
to include FSP into coreboot, for example, when you run "make
menuconfig", you should select "configure defaults for the
Intel FSP package", you possible need to configure more,
please follow the instruction of FSP integration guide.</div>
<div><br>
</div>
<div><span style="font-family:굴림체;font-size:12.8px"> </span><small
style="font-family:굴림체"><b> Mainboa</b><b>rd</b><br>
Mainboard vendor (<b>Intel</b>) ---> <br>
Mainboard model (<b>Mohon Peak CRB</b>) ---><br>
[ ] Configure defaults for the Intel FSP package <br>
ROM chip size (2048 KB (2 MB)) ---> <br>
(0x00200000) Size of CBFS filesystem in ROM <br>
() fmap description file in fmd format</small><br>
</div>
<div><br>
</div>
</div>
<div class="gmail_extra"><br>
<div class="gmail_quote">On Tue, Feb 2, 2016 at 7:40 AM, 김유석 <span
dir="ltr"><<a moz-do-not-send="true"
href="mailto:poplinux0@gmail.com" target="_blank">poplinux0@gmail.com</a>></span>
wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0
.8ex;border-left:1px #ccc solid;padding-left:1ex">
<div text="#000000" bgcolor="#FFFFFF"> <font face="굴림체">Dear
sir. <br>
<br>
My ENV is see below.<br>
<br>
<b>EVB : Intel rangeley Mohon Peak CRB</b><br>
<br>
<br>
<font color="#ff0000">This time</font>, I was download
the coreboot from git.<br>
<br>
<small> poplinux@raw work $ > git clone <a
moz-do-not-send="true"
href="http://review.coreboot.org/coreboot.git"
target="_blank"><a class="moz-txt-link-freetext" href="http://review.coreboot.org/coreboot.git">http://review.coreboot.org/coreboot.git</a></a>
./<br>
</small></font><small><font face="굴림체"><font
face="굴림체">poplinux@raw work $ > </font>cd
coreboot<br>
</font></small><font face="굴림체"><small><font
face="굴림체">poplinux@raw coreboot $ > </font>git
submodule update --init --checkout</small><br>
<br>
<font color="#ff0000">Next,</font> <b>run make
menuconfig</b> and set-up to mohon peak CRB and save
& exit<br>
<br>
<small><b> Mainboa</b><b>rd</b><br>
Mainboard vendor (<b>Intel</b>) ---> <br>
Mainboard model (<b>Mohon Peak CRB</b>)
---><br>
[ ] Configure defaults for the Intel FSP package <br>
ROM chip size (2048 KB (2 MB)) ---> <br>
(0x00200000) Size of CBFS filesystem in ROM <br>
() fmap description file in fmd format</small><br>
<br>
<font color="#ff0000">Next,</font> I'm try to build core
boot. <br>
<br>
<small> poplinux@raw coreboot $ > make<br>
GEN generated/bootblock.ld<br>
CP bootblock/arch/x86/bootblock.ld<br>
LINK cbfs/fallback/bootblock.debug<br>
OBJCOPY cbfs/fallback/bootblock.elf<br>
OBJCOPY bootblock.raw.bin<br>
Checking out SeaBIOS revision
01a84bea2d28a19d2405c1ecac4bdef17683cc0c<br>
Switched to branch 'master'<br>
<br>
Performing operation on 'COREBOOT' region...<br>
Name Offset
Type Size<br>
cbfs master header 0x0 cbfs
header 32<br>
fallback/romstage 0x80
stage 22684<br>
cpu_microcode_blob.bin 0x5980
microcode 0<br>
config 0x5a00
raw 127<br>
revision 0x5ac0
raw 570<br>
cmos_layout.bin 0x5d40
cmos_layout 1316<br>
fallback/dsdt.aml 0x62c0
raw 7952<br>
payload_config 0x8240
raw 1574<br>
payload_revision 0x88c0
raw 237<br>
(empty) 0x8a00
null 29848<br>
mrc.cache 0xfec0
mrc_cache 65536<br>
fallback/ramstage 0x1ff00
stage 46922<br>
fallback/payload 0x2b6c0
payload 61122<br>
(empty) 0x3a5c0
null 1856216<br>
bootblock 0x1ff8c0
bootblock 1528</small><br>
<br>
<font color="#ff0000">Finally,</font> I'm got a coreboot
image.<br>
</font><br>
<font face="굴림체"><br>
<small> poplinux@raw build $ > ls build/coreboot.rom
<br>
build/coreboot.rom<br>
poplinux@raw build $ > ./build/cbfstool
build/coreboot.rom print<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>Performing operation on 'COREBOOT'
region...<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>Name
Offset Type Size<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>cbfs master header
0x0 cbfs header 32<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>fallback/romstage
0x80 stage 22684<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>cpu_microcode_blob.bin
0x5980 microcode 0<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>config
0x5a00 raw 127<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>revision
0x5ac0 raw 570<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>cmos_layout.bin
0x5d40 cmos_layout 1316<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>fallback/dsdt.aml
0x62c0 raw 7952<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>payload_config
0x8240 raw 1574<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>payload_revision
0x88c0 raw 237<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>(empty)
0x8a00 null 29848<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>mrc.cache
0xfec0 mrc_cache 65536<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>fallback/ramstage
0x1ff00 stage 46922<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>fallback/payload
0x2b6c0 payload 61122<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>(empty)
0x3a5c0 null 1856216<br>
</small></font><font face="굴림체"><small><font face="굴림체"><small>
</small></font>bootblock
0x1ff8c0 bootblock 1528</small><br>
<br>
<br>
<font color="#ff0000">And</font> I'm write image to my
EVB using <b>ALL-100 Gang-writ</b><b>er</b>.<br>
spi flash's write <b>start address is set 0x00000000</b>.
write it success.<br>
<br>
<font color="#ff0000">And</font> I'm attach the flash
memory to my EVB.<br>
<br>
<font color="#ff0000">And </font>power-up the my EVB.
But can't see any message on my monitor and serial port
both.<br>
<br>
<br>
<b>Why did not display any message? </b><b><br>
</b><b>A</b><b>nd could you support correct
configuration file for my EVB?</b><br>
<br>
Thank you. <br>
<br>
<br>
<br>
<br>
<br>
<br>
</font> </div>
<br>
--<br>
coreboot mailing list: <a moz-do-not-send="true"
href="mailto:coreboot@coreboot.org">coreboot@coreboot.org</a><br>
<a moz-do-not-send="true"
href="http://www.coreboot.org/mailman/listinfo/coreboot"
rel="noreferrer" target="_blank">http://www.coreboot.org/mailman/listinfo/coreboot</a><br>
</blockquote>
</div>
<br>
</div>
</blockquote>
<br>
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