<div dir="ltr"><div><b style="font-size:12.8px"><u><font face="굴림체">> When write 0x7000 write to SC_GP_LVL, Can read the 0x00 from SC_GP_LVL. everytime.</font></u></b><br></div><div class="gmail_extra"><br></div><div class="gmail_extra">Please, try to do the following exercise:</div><div class="gmail_extra"><br></div><div class="gmail_extra">[1] WR 0x1000 to <span style="font-size:12.8px"><font face="굴림체">SC_GP_LVL, then RD the value out of it: what it is?</font></span></div><div class="gmail_extra">[2] WR 0x2000 to <span style="font-size:12.8px"><font face="굴림체">SC_GP_LVL, then RD the value out of it: what it is?</font></span><span style="font-size:12.8px"><font face="굴림체"><br></font></span></div><div class="gmail_extra">[3] WR 0x4000 to <span style="font-size:12.8px"><font face="굴림체">SC_GP_LVL, then RD the value out of it: what it is?</font></span></div><div class="gmail_extra"><span style="font-size:12.8px"><font face="굴림체"><br></font></span></div><div class="gmail_extra"><span style="font-size:12.8px"><font face="굴림체">If you have all 0x0, most likely it does mean that Rangeley's </font></span><span style="font-family:굴림체;font-size:12.8px">SC_GP_LVL register isd WR ONLY (when you read it, all 0s).</span></div><div class="gmail_extra"><span style="font-family:굴림체;font-size:12.8px"><br></span></div><div class="gmail_extra"><span style="font-family:굴림체;font-size:12.8px">To ver</span><span style="font-family:굴림체;font-size:12.8px">ify this, you should fetch the following document:</span></div><div class="gmail_extra"><font face="굴림체"><span style="font-size:12.8px"><a href="http://www.intel.com/content/www/us/en/processors/atom/atom-c2000-microserver-datasheet.html">http://www.intel.com/content/www/us/en/processors/atom/atom-c2000-microserver-datasheet.html</a></span></font><br></div><div class="gmail_extra"><font face="굴림체"><span style="font-size:12.8px"><br></span></font></div><div class="gmail_extra"><font face="굴림체"><span style="font-size:12.8px">And read Chapter 25 - General Purpose I/O (GPIO).</span></font></div><div class="gmail_extra"><span style="font-family:굴림체;font-size:12.8px"><br></span></div><div class="gmail_extra"><span style="font-family:굴림체;font-size:12.8px">Best Regards,</span></div><div class="gmail_extra"><span style="font-family:굴림체;font-size:12.8px">Zoran </span></div><div class="gmail_extra"><font face="굴림체"><span style="font-size:12.8px"><br></span></font><div class="gmail_quote">On Wed, Jul 13, 2016 at 6:39 AM, 김유석 <span dir="ltr"><<a href="mailto:poplinux0@gmail.com" target="_blank">poplinux0@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-style:solid;border-left-color:rgb(204,204,204);padding-left:1ex">
<div bgcolor="#FFFFFF" text="#000000">
<p><font face="굴림체">Dear Sir. <br>
</font></p>
<p><font face="굴림체"><br>
I want to control the GPIO pin that pin number is 12, 13, 14</font></p>
<p><font face="굴림체"><br>
DataSheet(P 1909) and coreboot source
code(src/southbridge/intel/fsp_rangeley/gpio.c, gpio.h) is said
to me that "It is very easy"</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">If i want to set the HIGH to 12, 13, 14</font></p>
<p><font face="굴림체">Just setup the some register, is see below.<br>
</font></p>
<p><font face="굴림체"> SC_USE_SEL = 0x7000(b0111 0000 0000 0000)<br>
</font></p>
<p><font face="굴림체"> Is mean, the 12, 13, 14 is config to GPIO
mode.(enable GPIO)<br>
</font></p>
<p><font face="굴림체"> SC_IO_SEL = 0x00(b0000 0000 0000 0000)<br>
</font></p>
<p><font face="굴림체"> Is mean, the 12, 13, 14 is output mode<br>
</font></p>
<p><font face="굴림체"> SC_GP_LVL = 0x7000</font><font face="굴림체">(b0111
0000 0000 0000)</font></p>
<p><font face="굴림체"> Is mean, the 12, 13, 14 is set to HIGH
level(1)</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">src/southbridge/intel/fsp_rangeley/gpio.h</font></p>
<p><font face="굴림체"> /* Core GPIO */<br>
const struct soc_gpio soc_gpio_mode = {<br>
.gpio12 = GPIO_MODE_GPIO, /* Board ID GPIO */<br>
.gpio13 = GPIO_MODE_GPIO, /* Board ID GPIO */<br>
.gpio14 = GPIO_MODE_GPIO, /* Board ID GPIO */<br>
};</font></p>
<p><font face="굴림체"> const struct soc_gpio soc_gpio_direction = {<br>
.gpio12 = GPIO_DIR_OUTPUT,<br>
.gpio13 = GPIO_DIR_OUTPUT,<br>
.gpio14 = GPIO_DIR_OUTPUT,<br>
};<br>
</font></p>
<p><font face="굴림체"> const struct soc_gpio soc_gpio_level = {<br>
.gpio12 = GPIO_LEVEL_HIGH,<br>
.gpio13 = GPIO_LEVEL_HIGH,<br>
.gpio14 = GPIO_LEVEL_HIGH,<br>
};<br>
<br>
</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">Yes, It is perfectley running.</font></p>
<p><font face="굴림체">The 12, 13, 14 PIN is goto active-HIGH.(I was
check this pin use by oscilloscope.)<br>
</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">And I'm try to read the SC_GP_LVL register for
check current status/config of gpio pins</font></p>
<p><font face="굴림체">I was <b>respected</b> the read value is <b>0x7000</b>,
because i was writed the <b>0x7000</b> to SC_GP_LVL.</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">But, every time readed the <b>0x00</b> from
SC_GP_LVL register.</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><u><font face="굴림체">When write 0x7000 write to SC_USE_SEL, Can
read the 0x7000 from SC_USE_SEL.</font></u></p>
<p><u><font face="굴림체">When write 0x00 write to SC_IO_SEL, Can read
the 0x00 from SC_IO_SEL.</font></u></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">But,</font></p>
<p><br>
<b><u><font face="굴림체">When write 0x7000 write to SC_GP_LVL, Can
read the 0x00 from SC_GP_LVL. everytime.</font></u></b></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">I don't understand this sistuation.<br>
</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">Please advise to me. <br>
</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">Thank you. </font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체"><br>
</font></p>
</div>
<br>--<br>
coreboot mailing list: <a href="mailto:coreboot@coreboot.org">coreboot@coreboot.org</a><br>
<a href="https://www.coreboot.org/mailman/listinfo/coreboot" rel="noreferrer" target="_blank">https://www.coreboot.org/mailman/listinfo/coreboot</a><br></blockquote></div><br></div></div>