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<div class="moz-cite-prefix">Dear Sir.<br>
<br>
Thank's your advise.<br>
<br>
SW I2C is request of my client. to control special device.<br>
<br>
And my customer are required to control at the romstage phase.<br>
<br>
So, I try to find the solution of sw I2C on romstage.<br>
<br>
<br>
But, if it is determined to be impossible, I'll be to convince
customers.<br>
<br>
Thank you. <br>
<br>
<br>
2016-07-19 오후 6:42에 Zoran Stojsavljevic 이(가) 쓴 글:<br>
</div>
<blockquote
cite="mid:CAGAf8Lz0s9uNYoaqP5Gz2uPgtJByrSVE85LV+Mjvr0DNoJLMRw@mail.gmail.com"
type="cite">
<div dir="ltr">Hello <span style="font-size:12.8px">김유석,</span>
<div><span style="font-size:12.8px"><br>
</span></div>
<div><span style="font-size:12.8px">I did not understand (very
imporatnt question): why at all you do need SW I2C
(bit-banging I2C) in Coreboot romstage? Maybe you can move
your I2C operation later, in ramstage?!</span></div>
<div><span style="font-size:12.8px"><br>
</span></div>
<div><span style="font-size:12.8px">Isn't romstage just to do
very quick boot and pass the phase where MRC (DDRs) should
be initialized? And not sure if both L1 cashes are set as
CAR (L1 I-cache as well as L1 D-cache)? It seems to me that
only L1 D-cache is initialized as CAR, L1 I-cache remains to
be true cache for flash code to be executed fast.</span></div>
<div><span style="font-size:12.8px"><br>
</span></div>
<div><span style="font-size:12.8px">I do know that romstage is
compiled with the special ROMCC compiler, which was adopted
by Eric Biederman (2003-2006, eb</span><span
style="font-size:12.8px"><a moz-do-not-send="true"
href="mailto:iederman@lnxi.com">iederman@lnxi.com</a>): <a
moz-do-not-send="true"
href="https://github.com/wt/coreboot/blob/master/util/romcc/romcc.1">https://github.com/wt/coreboot/blob/master/util/romcc/romcc.1</a></span></div>
<div><span style="font-size:12.8px"><br>
</span></div>
<div><span style="font-size:12.8px">Maybe, this compiler allows
you to store your outl() value into some 32-bit reserved
(for this purpose) common purpose register (instead of
global variable), but at this point in time, I need more
time to investigate ROMCC.</span></div>
<div><br>
</div>
<div>Some other people very well might know answers about ROMCC
on coreboot mailing list. ;-)</div>
<div><br>
</div>
<div>Zoran</div>
</div>
<div class="gmail_extra"><br>
<div class="gmail_quote">On Tue, Jul 19, 2016 at 8:40 AM, 김유석 <span
dir="ltr"><<a moz-do-not-send="true"
href="mailto:poplinux0@gmail.com" target="_blank">poplinux0@gmail.com</a>></span>
wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0
.8ex;border-left:1px #ccc solid;padding-left:1ex">
<div bgcolor="#FFFFFF" text="#000000">
<div>Sorry. i was have a miss-typing.<br>
<br>
<blockquote type="cite">I can read the some global
variable. => X<br>
I can't read the some global variable. => O</blockquote>
<br>
<br>
Thank you.<br>
<br>
<br>
<br>
2016-07-19 오후 3:26에 김유석 이(가) 쓴 글:<br>
</div>
<div>
<div class="h5">
<blockquote type="cite">
<div>Dear Sir.<br>
<br>
Thank's your advise.<br>
<br>
I can read the some global variable.<br>
Because the outl() api is directly write value to
register. Not global variable. I guess.<br>
<br>
Perhaps, your mean is a must use GLOBAL value for
SC_GP_LVL?(do not try to read from SC_GP_LVL)<br>
I was try to use the GLOBAL value on coreboot. But
occured the compile error. <br>
<br>
the global value "u32 val_sc_gp_lvl" is defined on
"src/southbridge/intel/fsp_rangeley/gpio.c"<br>
and use this value is on
"src/southbridge/intel/fsp_rangeley/gpio.c::setup_soc_gpios()"<br>
<br>
If i call setup_soc_gpios() is
"src/mainboard/intel/mohonpeak/romstage.c::early_mainboard_romstage_entry()",
occured build error. log is see below.<br>
<br>
OBJCOPY cbfs/fallback/bootblock.elf<br>
LINK cbfs/fallback/romstage.debug<br>
OBJCOPY bootblock.raw.bin<br>
Forbidden global variables in romstage:<br>
ffffff00 B val_sc_gp_lvl<br>
<br>
If i do not call setup_soc_gpios(), not occured
the build error.<br>
<br>
<br>
Current status<br>
<b> 1. setup input mode to the target pin</b><br>
=> can read the value from SC_GP_LVL
register<br>
<b>2. setup output mode to the target pin</b><br>
=> When a write value to SC_GP_LVL
register, successfully change the HIGH/LOW status
of pin.<br>
=> But when a read the value from SC_GP_LVL
register, can't read the value. <br>
<br>
<br>
My Goal is a create SW I2C port on my rangeley
platform. <br>
Almost works is done. But just one is fail.<br>
<br>
Please advise to me.<br>
<br>
Thank you. <br>
<br>
<br>
<br>
2016-07-18 오후 3:52에 Zoran Stojsavljevic 이(가) 쓴 글:<br>
</div>
<blockquote type="cite">
<div dir="ltr">
<div><span style="font-size:12.8px">> But DS
is said to me that SC_GP_LVL is WR register.</span><br>
</div>
<div><span style="font-size:12.8px"><br>
</span></div>
<div><span style="font-size:12.8px">So, as I
assumed, </span><span
style="font-size:12.8px">SC_GP_LVL is WR
ONLY register. If it always works and puts
out values, and retains them (which is
another of mine assumption), the solution to
RD problem is simplistic.</span></div>
<div><span style="font-size:12.8px"><br>
</span></div>
<div><span style="font-size:12.8px">Immediately
after the:</span><span
style="font-size:12.8px"> </span><span
style="font-size:12.8px">outl(GPIO, gpiobase
+ GPIO_SC_GP_LVL);</span></div>
<div><span style="font-size:12.8px"><br>
</span></div>
<div><span style="font-size:12.8px">Please,
always remember the I/O data value you
outl() into some heap global variable (which
will always retain the latest outl() data
value). If you need it back, read this
variable.</span></div>
<div><span style="font-size:12.8px"><br>
</span></div>
<div><span style="font-size:12.8px">Best
Regards,</span></div>
<div><span style="font-size:12.8px">Zoran</span></div>
</div>
<div class="gmail_extra"><br>
<div class="gmail_quote">On Mon, Jul 18, 2016 at
7:20 AM, 김유석 <span dir="ltr"><<a
moz-do-not-send="true"
href="mailto:poplinux0@gmail.com"
target="_blank">poplinux0@gmail.com</a>></span>
wrote:<br>
<blockquote class="gmail_quote"
style="margin:0 0 0 .8ex;border-left:1px
#ccc solid;padding-left:1ex">
<div bgcolor="#FFFFFF" text="#000000">
<div>Dear Sir.<br>
<br>
I was test with by your advise. But
SC_GP_LVL is always read 0x00<br>
<br>
source code & result is see below.<br>
<br>
<table border="1" cellpadding="2"
cellspacing="2" width="100%">
<tbody>
<tr>
<td valign="top"> u32
read_gpio_level(const struct
soc_gpio_map *gpio)<br>
{<br>
<br>
u16 gpiobase
__attribute__((unused)) =
pci_read_config16(SOC_LPC_DEV,
GBASE) & ~0xf;<br>
<br>
printk(BIOS_DEBUG, "%s() :
Start\n", __FUNCTION__);<br>
printk(BIOS_DEBUG, "
GPIO_SC_USE_SEL : 0x%x\n",
inl(gpiobase +
GPIO_SC_USE_SEL));<br>
printk(BIOS_DEBUG, "
GPIO_SC_IO_SEL : 0x%x\n",
inl(gpiobase + GPIO_SC_IO_SEL));<br>
printk(BIOS_DEBUG, "
GPIO_SC_GP_LVL : 0x%x\n",
inl(gpiobase + GPIO_SC_GP_LVL));<br>
printk(BIOS_DEBUG, "%s() :
End\n\n", __FUNCTION__);<br>
<br>
return 0;<br>
}<br>
<br>
int set_gpio_level(const
struct soc_gpio_map *gpio,<br>
const int
num,<br>
const int
lvl)<br>
{<br>
u16 gpiobase
__attribute__((unused)) =
pci_read_config16(SOC_LPC_DEV,
GBASE) & ~0xf;<br>
u32 GPIO = 0;<br>
<br>
GPIO = setBit(GPIO, num);<br>
<br>
printk(BIOS_DEBUG, "%s() :
GPIO set value 0x%x\n",
__FUNCTION__, GPIO);<br>
outl(GPIO, gpiobase +
GPIO_SC_GP_LVL);<br>
<br>
return 0;<br>
}<br>
<br>
<br>
void
early_mainboard_romstage_entry(void)<br>
{<br>
setup_soc_gpios(&gpio_map);<br>
set_gpio_level(&gpio_map,
12, 1);<br>
mdelay(500);<br>
read_gpio_level(&gpio_map);<br>
<br>
set_gpio_level(&gpio_map,
13, 1);<br>
mdelay(500);<br>
read_gpio_level(&gpio_map);<br>
<br>
set_gpio_level(&gpio_map,
14, 1);<br>
mdelay(500);<br>
read_gpio_level(&gpio_map);<br>
};<br>
<br>
<br>
==================================================================================<br>
coreboot-NexG-59a9b0a6 Mon Jul
18 05:09:30 UTC 2016 romstage
starting...<br>
set_gpio_level() : GPIO set
value 0x1000<br>
read_gpio_level() : Start<br>
GPIO_SC_USE_SEL : 7000<br>
GPIO_SC_IO_SEL : 0<br>
GPIO_SC_GP_LVL : 0<br>
read_gpio_level() : End<br>
<br>
set_gpio_level() : GPIO set
value 0x2000<br>
read_gpio_level() : Start<br>
GPIO_SC_USE_SEL : 7000<br>
GPIO_SC_IO_SEL : 0<br>
GPIO_SC_GP_LVL : 0<br>
read_gpio_level() : End<br>
<br>
set_gpio_level() : GPIO set
value 0x4000<br>
read_gpio_level() : Start<br>
GPIO_SC_USE_SEL : 7000<br>
GPIO_SC_IO_SEL : 0<br>
GPIO_SC_GP_LVL : 0<br>
read_gpio_level() : End<br>
<br>
<br>
<br>
</td>
</tr>
</tbody>
</table>
<br>
<br>
And I was re-view the DS of C2000. <br>
<br>
But DS is said to me that SC_GP_LVL is
WR register.<br>
<br>
<br>
<br>
Please help me.<br>
<br>
Thank you. <br>
<br>
<br>
<br>
<br>
2016-07-13 오후 4:40에 Zoran Stojsavljevic
이(가) 쓴 글:<br>
</div>
<div>
<div>
<blockquote type="cite">
<div dir="ltr">
<div><b style="font-size:12.8px"><u><font
face="굴림체">> When write
0x7000 write to SC_GP_LVL,
Can read the 0x00 from
SC_GP_LVL. everytime.</font></u></b><br>
</div>
<div class="gmail_extra"><br>
</div>
<div class="gmail_extra">Please,
try to do the following
exercise:</div>
<div class="gmail_extra"><br>
</div>
<div class="gmail_extra">[1] WR
0x1000 to <span
style="font-size:12.8px"><font
face="굴림체">SC_GP_LVL, then
RD the value out of it: what
it is?</font></span></div>
<div class="gmail_extra">[2] WR
0x2000 to <span
style="font-size:12.8px"><font
face="굴림체">SC_GP_LVL, then
RD the value out of it: what
it is?</font></span><span
style="font-size:12.8px"><font
face="굴림체"><br>
</font></span></div>
<div class="gmail_extra">[3] WR
0x4000 to <span
style="font-size:12.8px"><font
face="굴림체">SC_GP_LVL, then
RD the value out of it: what
it is?</font></span></div>
<div class="gmail_extra"><span
style="font-size:12.8px"><font
face="굴림체"><br>
</font></span></div>
<div class="gmail_extra"><span
style="font-size:12.8px"><font
face="굴림체">If you have all
0x0, most likely it does
mean that Rangeley's </font></span><span
style="font-family:굴림체;font-size:12.8px">SC_GP_LVL register isd WR ONLY
(when you read it, all 0s).</span></div>
<div class="gmail_extra"><span
style="font-family:굴림체;font-size:12.8px"><br>
</span></div>
<div class="gmail_extra"><span
style="font-family:굴림체;font-size:12.8px">To
ver</span><span
style="font-family:굴림체;font-size:12.8px">ify
this, you should fetch the
following document:</span></div>
<div class="gmail_extra"><font
face="굴림체"><span
style="font-size:12.8px"><a
moz-do-not-send="true"
href="http://www.intel.com/content/www/us/en/processors/atom/atom-c2000-microserver-datasheet.html"
target="_blank">http://www.intel.com/content/www/us/en/processors/atom/atom-c2000-microserver-datasheet.html</a></span></font><br>
</div>
<div class="gmail_extra"><font
face="굴림체"><span
style="font-size:12.8px"><br>
</span></font></div>
<div class="gmail_extra"><font
face="굴림체"><span
style="font-size:12.8px">And
read Chapter 25 - General
Purpose I/O (GPIO).</span></font></div>
<div class="gmail_extra"><span
style="font-family:굴림체;font-size:12.8px"><br>
</span></div>
<div class="gmail_extra"><span
style="font-family:굴림체;font-size:12.8px">Best
Regards,</span></div>
<div class="gmail_extra"><span
style="font-family:굴림체;font-size:12.8px">Zoran </span></div>
<div class="gmail_extra"><font
face="굴림체"><span
style="font-size:12.8px"><br>
</span></font>
<div class="gmail_quote">On Wed,
Jul 13, 2016 at 6:39 AM, 김유석 <span
dir="ltr"><<a
moz-do-not-send="true"
href="mailto:poplinux0@gmail.com"
target="_blank">poplinux0@gmail.com</a>></span>
wrote:<br>
<blockquote
class="gmail_quote"
style="margin:0px 0px 0px
0.8ex;border-left-width:1px;border-left-style:solid;border-left-color:rgb(204,204,204);padding-left:1ex">
<div bgcolor="#FFFFFF"
text="#000000">
<p><font face="굴림체">Dear
Sir. <br>
</font></p>
<p><font face="굴림체"><br>
I want to control the
GPIO pin that pin
number is 12, 13, 14</font></p>
<p><font face="굴림체"><br>
DataSheet(P 1909) and
coreboot source
code(src/southbridge/intel/fsp_rangeley/gpio.c, gpio.h) is said to me
that "It is very easy"</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">If i
want to set the HIGH
to 12, 13, 14</font></p>
<p><font face="굴림체">Just
setup the some
register, is see
below.<br>
</font></p>
<p><font face="굴림체">
SC_USE_SEL =
0x7000(b0111 0000 0000
0000)<br>
</font></p>
<p><font face="굴림체"> Is
mean, the 12, 13, 14
is config to GPIO
mode.(enable GPIO)<br>
</font></p>
<p><font face="굴림체">
SC_IO_SEL = 0x00(b0000
0000 0000 0000)<br>
</font></p>
<p><font face="굴림체"> Is
mean, the 12, 13, 14
is output mode<br>
</font></p>
<p><font face="굴림체">
SC_GP_LVL = 0x7000</font><font
face="굴림체">(b0111 0000
0000 0000)</font></p>
<p><font face="굴림체"> Is
mean, the 12, 13, 14
is set to HIGH
level(1)</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">src/southbridge/intel/fsp_rangeley/gpio.h</font></p>
<p><font face="굴림체"> /*
Core GPIO */<br>
const struct
soc_gpio soc_gpio_mode
= {<br>
.gpio12 =
GPIO_MODE_GPIO, /*
Board ID GPIO */<br>
.gpio13 =
GPIO_MODE_GPIO, /*
Board ID GPIO */<br>
.gpio14 =
GPIO_MODE_GPIO, /*
Board ID GPIO */<br>
};</font></p>
<p><font face="굴림체">
const struct soc_gpio
soc_gpio_direction = {<br>
.gpio12 =
GPIO_DIR_OUTPUT,<br>
.gpio13 =
GPIO_DIR_OUTPUT,<br>
.gpio14 =
GPIO_DIR_OUTPUT,<br>
};<br>
</font></p>
<p><font face="굴림체">
const struct soc_gpio
soc_gpio_level = {<br>
.gpio12 =
GPIO_LEVEL_HIGH,<br>
.gpio13 =
GPIO_LEVEL_HIGH,<br>
.gpio14 =
GPIO_LEVEL_HIGH,<br>
};<br>
<br>
</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">Yes,
It is perfectley
running.</font></p>
<p><font face="굴림체">The
12, 13, 14 PIN is goto
active-HIGH.(I was
check this pin use by
oscilloscope.)<br>
</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">And
I'm try to read the
SC_GP_LVL register for
check current
status/config of gpio
pins</font></p>
<p><font face="굴림체">I was
<b>respected</b> the
read value is <b>0x7000</b>,
because i was writed
the <b>0x7000</b> to
SC_GP_LVL.</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">But,
every time readed the
<b>0x00</b> from
SC_GP_LVL register.</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><u><font face="굴림체">When
write 0x7000 write
to SC_USE_SEL, Can
read the 0x7000 from
SC_USE_SEL.</font></u></p>
<p><u><font face="굴림체">When
write 0x00 write to
SC_IO_SEL, Can read
the 0x00 from
SC_IO_SEL.</font></u></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">But,</font></p>
<p><br>
<b><u><font face="굴림체">When
write 0x7000 write
to SC_GP_LVL, Can
read the 0x00 from
SC_GP_LVL.
everytime.</font></u></b></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">I
don't understand this
sistuation.<br>
</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">Please
advise to me. <br>
</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체">Thank
you. </font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체"><br>
</font></p>
<p><font face="굴림체"><br>
</font></p>
</div>
<br>
--<br>
coreboot mailing list: <a
moz-do-not-send="true"
href="mailto:coreboot@coreboot.org"
target="_blank">coreboot@coreboot.org</a><br>
<a moz-do-not-send="true"
href="https://www.coreboot.org/mailman/listinfo/coreboot"
rel="noreferrer"
target="_blank">https://www.coreboot.org/mailman/listinfo/coreboot</a><br>
</blockquote>
</div>
<br>
</div>
</div>
</blockquote>
<p><br>
</p>
</div>
</div>
</div>
</blockquote>
</div>
<br>
</div>
</blockquote>
<p><br>
</p>
</blockquote>
<p><br>
</p>
</div>
</div>
</div>
</blockquote>
</div>
<br>
</div>
</blockquote>
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</p>
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