<html><head></head><body>Hi.<br>
Most post codes use pre defined values instead of hardcoded values ( src/include/console/post_codes.h) . Sadly there's no documentation of possible post codes, as it's board specific.<br>
Binary blobs, like Intel mrc.bin, have their own 16bit post code set.<br>
Asm code is of course sending post codes to, and of course it's not using any c function to do so.<br>
Regards, Patrick<br><br><div class="gmail_quote">Am 7. August 2016 10:11:32 MESZ, schrieb "Łukasz Dobrowolski" <spectrallynx@gmail.com>:<blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;">
<pre class="k9mail">Hello!<br />I'm porting cb to ThinkPad X120e. I've used code from asrock/e350m1 as<br />basis and made some small changes.<br /><br />I'm getting following postcodes. Those are after "50" so romstage.c<br />finished executing. (System sometimes goes this far, other times it<br />hangs earlier.)<br /> 79 24 98 7A A8 F8<br /><br />I tried to find them in like this:<br /> grep -R 'post_code(0x24);'<br />I've only found "24", it's in device/pci_device.c:1113. Whatever is<br />sending the rest of the postcodes is not using post_code() function.<br /><br />I can think of 3 explanations:<br /> Payload is sending those postcodes. -> Seams unlikely, I'm<br />using Seabios. I've read some of the code and can't find any places<br />that would send the codes.<br /> ASM parts of cb/AGESA.<br /> EC(ITE IT8518E) is sending the codes.<br /><br />Any thoughts?<br /></pre></blockquote></div><br>
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