<div dir="ltr">Hello Rizwan,<div><br></div><div>Thank you for the tip. I am looking into the whole x86 asm file pointed by you, and cranking it reading x86 architectural manual (lot of info to digest). ;-)</div><div><br></div><div>If I'll have questions, I might come back later to ask for clarity, if you allow me. :-)</div><div><br></div><div>Thank you again,</div><div>Zoran</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Aug 8, 2016 at 12:35 PM, Qureshi, Rizwan <span dir="ltr"><<a href="mailto:rizwan.qureshi@intel.com" target="_blank">rizwan.qureshi@intel.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1f497d">Hi Zoran,<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1f497d"> For skylake refer src/soc/intel/skylake/<wbr>bootblock/cache_as_ram.S around line 256. We are marking the ROMregion as WP and cacheable and programming
an MTRR appropriately.<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1f497d">So, it’s not removed buts its being done while setting up Cache As Ram.<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1f497d"><u></u> <u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1f497d">Regards,<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1f497d">Rizwan Qureshi<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1f497d"><u></u> <u></u></span></p>
<p class="MsoNormal"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> Zoran Stojsavljevic [<a href="mailto:zoran.stojsavljevic@gmail.com" target="_blank">mailto:zoran.stojsavljevic@<wbr>gmail.com</a>]
<br>
<b>Sent:</b> Monday, August 8, 2016 12:33 PM<br>
<b>To:</b> coreboot <<a href="mailto:coreboot@coreboot.org" target="_blank">coreboot@coreboot.org</a>>; Paul Menzel <<a href="mailto:paulepanter@users.sourceforge.net" target="_blank">paulepanter@users.<wbr>sourceforge.net</a>><br>
<b>Cc:</b> Qureshi, Rizwan <<a href="mailto:rizwan.qureshi@intel.com" target="_blank">rizwan.qureshi@intel.com</a>>; Ch, Naveenkrishna <<a href="mailto:naveenkrishna.ch@intel.com" target="_blank">naveenkrishna.ch@intel.com</a>>; Yang, York <<a href="mailto:york.yang@intel.com" target="_blank">york.yang@intel.com</a>><br>
<b>Subject:</b> Mistery of the function: static void enable_rom_caching(void)<u></u><u></u></span></p>
<p class="MsoNormal"><u></u> <u></u></p>
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<p class="MsoNormal">Hello community,<u></u><u></u></p>
</div><div><div class="h5">
<div>
<p class="MsoNormal"><u></u> <u></u></p>
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<div>
<p class="MsoNormal">I was/got again today in Coreboot directory src/soc/intel/braswell/<wbr>bootblock/bootblock.c looking at static void enable_rom_caching(void).<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal"><u></u> <u></u></p>
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<div>
<p class="MsoNormal">Then, since Paul Menzel have announcement ([ANNOUNCEMENT] Support for Intel Kaby Lake), I went to look into src/soc/intel/skylake/<wbr>bootblock/bootblock.c, but I did not find this function. Kaby Lake patches do not support this function as
well.<u></u><u></u></p>
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<div>
<p class="MsoNormal"><u></u> <u></u></p>
</div>
<div>
<p class="MsoNormal">Then I did the following on my WIN 10 (using VMware workstation 12) VM Fedora 24:<u></u><u></u></p>
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<div>
<p class="MsoNormal"><u></u> <u></u></p>
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<div>
<p class="MsoNormal">[zoran@localhost intel]$ pwd<u></u><u></u></p>
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<div>
<p class="MsoNormal">/home/zoran/projects/coreboot/<wbr>coreboot/src/soc/intel<u></u><u></u></p>
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<div>
<p class="MsoNormal">[zoran@localhost intel]$ git describe<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">4.4-1038-gdd65ef8<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">[zoran@localhost intel]$ ls -al<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">total 48<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">drwxrwxr-x. 12 4096 Aug 1 10:02 .<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">drwxrwxr-x. 14 4096 Aug 1 10:02 ..<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">drwxrwxr-x. 5 4096 Aug 1 10:02 apollolake<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">drwxrwxr-x. 6 4096 Aug 1 10:02 baytrail<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">drwxrwxr-x. 6 4096 Aug 1 10:02 braswell<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">drwxrwxr-x. 6 4096 Aug 1 10:02 broadwell<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">drwxrwxr-x. 3 4096 Aug 1 10:02 common<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">drwxrwxr-x. 7 4096 Aug 1 10:02 fsp_baytrail<u></u><u></u></p>
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<div>
<p class="MsoNormal">drwxrwxr-x. 7 4096 Aug 1 10:02 fsp_broadwell_de<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">drwxrwxr-x. 5 4096 Aug 1 10:02 quark<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">drwxrwxr-x. 3 4096 Aug 1 10:02 sch<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">drwxrwxr-x. 7 4096 Aug 1 10:02 skylake<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">[zoran@localhost intel]$ grep -r enable_rom *<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">baytrail/bootblock/bootblock.<wbr>c:static void enable_rom_caching(void)<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">baytrail/bootblock/bootblock.<wbr>c: enable_rom_caching();<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">braswell/bootblock/bootblock.<wbr>c:static void enable_rom_caching(void)<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">braswell/bootblock/bootblock.<wbr>c: enable_rom_caching();<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">broadwell/bootblock/cpu.c:<wbr>static void enable_rom_caching(void)<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">broadwell/bootblock/cpu.c: enable_rom_caching();<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">fsp_baytrail/bootblock/<wbr>bootblock.c:static void enable_rom_caching(void)<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">fsp_baytrail/bootblock/<wbr>bootblock.c: enable_rom_caching();<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">[zoran@localhost intel]$<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal"><u></u> <u></u></p>
</div>
<div>
<p class="MsoNormal">We see here that from skylake (also does not exists in apollolake) this function is dropped.<u></u><u></u></p>
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<div>
<p class="MsoNormal"><u></u> <u></u></p>
</div>
<div>
<p class="MsoNormal">Any logical explanation for this mismatch?<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal"><u></u> <u></u></p>
</div>
<div>
<p class="MsoNormal">Thank you,<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal">Zoran<u></u><u></u></p>
</div>
<div>
<p class="MsoNormal"><u></u> <u></u></p>
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</blockquote></div><br></div>