<div dir="ltr"><div>I remembered Windows 7 was not well supported under coreboot (sometimes it boots sometimes not). A fresh install of MSDN Windows 10 can at least boot everytime. Could you try if Windows 10 works?<br><br></div>I don't known how to fix the usb issues. So I cc the community maillist.<br></div><div class="gmail_extra"><br><div class="gmail_quote">2016-11-08 14:54 GMT+08:00 Charlotte Plusplus <span dir="ltr"><<a href="mailto:pluspluscharlotte@gmail.com" target="_blank">pluspluscharlotte@gmail.com</a>></span>:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div><div>I have tried to boot a windows 7 to explore these issues, it didn't work.<br><br></div>I may have residual problems. I noticed I also have USB3 not working while I have in the devicetree:<br><br>device pci 1c.6 on end # PCIe Port #7 USB 3.0 only W520<br><br></div>I checked the specs, it is the correct address. However, it doesn't work, and in cbmem I can see the port is being disabled :-(<br><div><br></div></div><div class="HOEnZb"><div class="h5"><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Nov 7, 2016 at 9:36 PM, Pok Gu <span dir="ltr"><<a href="mailto:pokgoo002@gmail.com" target="_blank">pokgoo002@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><span><div><div>Hi, I'm not sure if the issue is related to power management.
I'm using Windows and an obvious issue is there is a yellow question
mark for the Dynamic Platform and Thermal Framework driver
PCI\VEN_8086&DEV_0153. I googled and found some chromebooks have the
dptf.asl in their source, but the thinkpads do not. Is this possible to
be fix and how to do it?<br><br></div>Thanks<br></div>Pokgu<br> <br>2016-11-08 3:20 GMT+08:00 Charlotte Plusplus <span dir="ltr"><<a href="mailto:pluspluscharlotte@gmail.com" target="_blank">pluspluscharlotte@gmail.com</a>></span>:<br><br>
<br></span><div><div class="m_-3756613808942509889h5">
>> I am new to coreboot. I could try to add the missing power management<br>
>> states. But can I please ask for pointers and suggestions? What is<br>
>> missing? Is there any documentation?<br>
> Power management is done through ACPI.<br>
> You'd need to figure out which ACPI functions are used by your operating system and implement/fix them.<br>
<br>
I am using Linux, Arch or Ubuntu. I don't really understand what you<br>
mean there. I thought ACPI functions for power management were quite<br>
standard. After reading my dmesg, I thought the linux kernel PSTATE<br>
and CPUFREQ drivers were working fine. I need to do more tests with<br>
powertop.<br>
<br>
Is the power management state complete enough from coreboot standpoint<br>
to work with the current linux kernel??<br>
<br>
If not, could you point me to an Ivy Bridge board that has the most<br>
complete implementation of power management, so I can use it as an<br>
example?<br>
<br>
I see some boards have cstates support, like<br>
src/mainboard/lenovo/x200/csta<wbr>tes.c and after googling I found that<br>
libreboot had "Higher battery life on GM45 (X200, T400, T500, R400)<br>
due to higher cstates now being supported (thanks Arthur Heymans). C4<br>
power states also supported. Higher battery life on i945 (X60, T60,<br>
MacBook2,1) due to better CPU<br>
C-state settings. (Deep C4, Dynamicl L2 shrinking, C2E).<br>
<br>
Patch is in:<br>
<a href="https://notabug.org/vimuser/libreboot/commit/89819c5ce3cd5c9a38e9e7e817573dca52cbabcb" rel="noreferrer" target="_blank">https://notabug.org/vimuser/li<wbr>breboot/commit/89819c5ce3cd5c9<wbr>a38e9e7e817573dca52cbabcb</a><br>
</div></div></div><div class="gmail_extra"><br><div class="gmail_quote"><span>2016-11-08 3:20 GMT+08:00 Charlotte Plusplus <span dir="ltr"><<a href="mailto:pluspluscharlotte@gmail.com" target="_blank">pluspluscharlotte@gmail.com</a>></span>:<br></span><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div class="m_-3756613808942509889h5">Hello<br>
<br>
On 11/6/16, Patrick Rudolph <<a href="mailto:siro@das-labor.org" target="_blank">siro@das-labor.org</a>> wrote:<br>
> thanks for adding support for W520.<br>
<br>
My pleasure to help! As soon as I get the RAM issues fixed, I will try<br>
to add another mainboard. This was quite fun (reading the block<br>
diagram, making sure the ports match, etc)<br>
<br>
My only real issue at the moment is the RAM. I wish I could fix that<br>
soon, because I really need my laptop to work!! And since I replaced<br>
the CPU by one that is not supported in the bios, coreboot is my only<br>
option :-/<br>
<br>
I can't even boot reliably with more than 1 ram stick inserted :-(<br>
<br>
> Am 06.11.2016 um 09:33 schrieb Charlotte Plusplus:<br>
> Please use git (<br>
> <a href="https://www.coreboot.org/Development_Guidelines#How_to_contribute" rel="noreferrer" target="_blank">https://www.coreboot.org/Devel<wbr>opment_Guidelines#How_to_contr<wbr>ibute</a> ) and<br>
> gerrit ( <a href="http://review.coreboot.org/#/q/status:open" rel="noreferrer" target="_blank">http://review.coreboot.org/#/q<wbr>/status:open</a> ) to upload your<br>
> patch. This allows easy reviewing and commenting, including an automatic<br>
> build for every change made.<br>
<br>
Sorry, I haven't used git yet ever, except to download code. I thought<br>
an archive would be ok. I will read your links and prepare a<br>
submission in the correct format. Thanks for the explanation!<br>
<br>
> Please note that I didn't test anything beyond DDR3-800. Some people<br>
> reported that DDR3-1866 is working.<br>
> Can you try to limit max frequency to DDR3-1333 or DDR3-1600 (using<br>
> max_mem_clock_mhz) and tell if it's working ?<br>
<br>
Currently doing that. I have read a bit more about memory, and<br>
apparently it could also be due to Intel XMP.<br>
<br>
> Native raminit is done in<br>
> coreboot/src/northbridge/intel<wbr>/sandybridge/raminit.c<br>
> Please have a look at this file first. I don't think that there are SPD<br>
> issues, but there might be issues with frequencies of + DDR3-1600.<br>
<br>
I looked at that. I see you recently added XMP support:<br>
<a href="https://www.coreboot.org/pipermail/coreboot-gerrit/2016-February/040779.html" rel="noreferrer" target="_blank">https://www.coreboot.org/piper<wbr>mail/coreboot-gerrit/2016-Febr<wbr>uary/040779.html</a><br>
<br>
The sticks I am using are Corsair CMSX16GX3M2B2133C1, which use XMP.<br>
They are dual voltage, 1.35 and 1.5V<br>
<br>
Here is the output from decode-dimm run in the BIOS, and from<br>
coreboot. I can also add screenshots from memtest86 7.1, which showed<br>
the proper SPD settings and speed. Speed tests curves gave numbers<br>
compatibles with 2133, which is above DDR3-1600 as bios 1.36 did not<br>
restrict their speed. I did test them for over a day in memtest86 7.1.<br>
<br>
Since the sticks work reliably in the default bios as confirmed by<br>
memtest86 71, the problem seems to be coreboot specific: memtest86+<br>
5.0 gives me various error that never showed up before. And with one<br>
stick, coreboot won't even boot.<br>
<br>
I don't understand how the existing raminit code could have issues<br>
with frequencies over DDR3-1600.<br>
<br>
My best guess is it may be due to using the CL10 profile (even if it<br>
is "correct") and ignoring the XMP CL11 profile, because I see the<br>
current code only select the 1st XMP profile, which could be the cause<br>
of the error if say the 2nd XMP profile is the one that should be<br>
used.<br>
<br>
It all looks innocent, but it is a serious error, as one 8G sticks<br>
gives me tens of thousands of errors in memtest86. I think this could<br>
cause serious data corruption :-(<br>
<br>
>> I am new to coreboot. I could try to add the missing power management<br>
>> states. But can I please ask for pointers and suggestions? What is<br>
>> missing? Is there any documentation?<br>
> Power management is done through ACPI.<br>
> You'd need to figure out which ACPI functions are used by your operating system and implement/fix them.<br>
<br>
I am using Linux, Arch or Ubuntu. I don't really understand what you<br>
mean there. I thought ACPI functions for power management were quite<br>
standard. After reading my dmesg, I thought the linux kernel PSTATE<br>
and CPUFREQ drivers were working fine. I need to do more tests with<br>
powertop.<br>
<br>
Is the power management state complete enough from coreboot standpoint<br>
to work with the current linux kernel??<br>
<br>
If not, could you point me to an Ivy Bridge board that has the most<br>
complete implementation of power management, so I can use it as an<br>
example?<br>
<br>
I see some boards have cstates support, like<br>
src/mainboard/lenovo/x200/csta<wbr>tes.c and after googling I found that<br>
libreboot had "Higher battery life on GM45 (X200, T400, T500, R400)<br>
due to higher cstates now being supported (thanks Arthur Heymans). C4<br>
power states also supported. Higher battery life on i945 (X60, T60,<br>
MacBook2,1) due to better CPU<br>
C-state settings. (Deep C4, Dynamicl L2 shrinking, C2E).<br>
<br>
Patch is in:<br>
<a href="https://notabug.org/vimuser/libreboot/commit/89819c5ce3cd5c9a38e9e7e817573dca52cbabcb" rel="noreferrer" target="_blank">https://notabug.org/vimuser/li<wbr>breboot/commit/89819c5ce3cd5c9<wbr>a38e9e7e817573dca52cbabcb</a><br>
<br>
However, I could not need documentation or explainations for the<br>
numbers used (which differ in coreboot and libreboot)<br>
<br>
I have found <a href="http://www.intel.com/content/www/us/en/support/processors/000006619.html" rel="noreferrer" target="_blank">http://www.intel.com/content/w<wbr>ww/us/en/support/processors/00<wbr>0006619.html</a><br>
but that is not super helpful.<br>
<br>
I would be happy to write proper power management support, but I would<br>
really appreciate some links to the documentation or some examples.<br>
<br>
A related question: how do I write a ACPI method to receive a call<br>
from userland and do something on coreboot side, like write a<br>
register? I would like to add a way to turn the NVidia GPU on and off<br>
from userland, for bumblebee or KVM with IOMMU GPU passthrugh.<br>
<br>
> I'm using BeagleBone Black for USBDEBUG.<br>
<br>
Ok, I will get one too. Thanks to Kyosti message I understand why I<br>
can't use my existing cable.<br>
<br>
> Once you got USBDEBUG working, please provide a full raminit log. It may<br>
> help to fix the remaining issue.<br>
<br>
Given the output from the script, I have selected port 1 This is the<br>
only external USB2 port in the laptop anyway!!<br>
<br>
The following PCI devices support a USB debug port (says lspci):<br>
0000:00:1a.0 0000:00:1d.0<br>
The following PCI devices support a USB debug port (says the kernel):<br>
0000:00:1a.0 0000:00:1d.0<br>
PCI device 0000:00:1a.0, USB bus 1, USB physical port 2<br>
PCI device 0000:00:1d.0, USB bus 2, USB physical port 2<br>
Currently connected high-speed devices:<br>
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=ehci-pci/3p, 480M<br>
|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/8p, 480M<br>
|__ Port 4: Dev 3, If 12, Class=Communications, Driver=cdc_mbim, 480M<br>
|__ Port 4: Dev 3, If 13, Class=CDC Data, Driver=cdc_mbim, 480M<br>
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=ehci-pci/3p, 480M<br>
|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/6p, 480M<br>
|__ Port 2: Dev 5, If 0, Class=Mass Storage, Driver=usb-storage, 480M<br>
<br>
I have ordered the BBB. It may take a day or two to arrive. In the<br>
meantime, do you know any tool to dump the XMP profiles and check them<br>
manually?<br>
<br>
Thanks<br>
<span class="m_-3756613808942509889m_7536883777422815771HOEnZb"><font color="#888888">Charlotte<br>
</font></span><br></div></div><span class="m_-3756613808942509889HOEnZb"><font color="#888888">--<br>
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</div></div></blockquote></div><br></div>