<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40">
<head>
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
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<style><!--
/* Font Definitions */
@font-face
{font-family:PMingLiU;
panose-1:2 2 5 0 0 0 0 0 0 0;}
@font-face
{font-family:"Cambria Math";
panose-1:2 4 5 3 5 4 6 3 2 4;}
@font-face
{font-family:Calibri;
panose-1:2 15 5 2 2 2 4 3 2 4;}
@font-face
{font-family:Tahoma;
panose-1:2 11 6 4 3 5 4 4 2 4;}
@font-face
{font-family:"\@PMingLiU";
panose-1:2 2 5 0 0 0 0 0 0 0;}
/* Style Definitions */
p.MsoNormal, li.MsoNormal, div.MsoNormal
{margin:0cm;
margin-bottom:.0001pt;
font-size:12.0pt;
font-family:"Times New Roman","serif";}
a:link, span.MsoHyperlink
{mso-style-priority:99;
color:blue;
text-decoration:underline;}
a:visited, span.MsoHyperlinkFollowed
{mso-style-priority:99;
color:purple;
text-decoration:underline;}
p.MsoAcetate, li.MsoAcetate, div.MsoAcetate
{mso-style-priority:99;
mso-style-link:"Texte de bulles Car";
margin:0cm;
margin-bottom:.0001pt;
font-size:8.0pt;
font-family:"Tahoma","sans-serif";}
span.TextedebullesCar
{mso-style-name:"Texte de bulles Car";
mso-style-priority:99;
mso-style-link:"Texte de bulles";
font-family:"Tahoma","sans-serif";}
span.EmailStyle19
{mso-style-type:personal;
font-family:"Calibri","sans-serif";
color:#1F497D;}
span.EmailStyle20
{mso-style-type:personal;
font-family:"Calibri","sans-serif";
color:#1F497D;}
span.EmailStyle21
{mso-style-type:personal-reply;
font-family:"Calibri","sans-serif";
color:#1F497D;}
.MsoChpDefault
{mso-style-type:export-only;
font-size:10.0pt;}
@page WordSection1
{size:612.0pt 792.0pt;
margin:70.85pt 70.85pt 70.85pt 70.85pt;}
div.WordSection1
{page:WordSection1;}
--></style><!--[if gte mso 9]><xml>
<o:shapedefaults v:ext="edit" spidmax="1026" />
</xml><![endif]--><!--[if gte mso 9]><xml>
<o:shapelayout v:ext="edit">
<o:idmap v:ext="edit" data="1" />
</o:shapelayout></xml><![endif]-->
</head>
<body lang="EN-US" link="blue" vlink="purple">
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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Hello all,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Thanks to all that took time to review the first set of patch concerning the support of the Exar XR28V382.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Console log messages are now fine. The error lies in the ‘end’ tag of the LPC pci device inside the devicetree.cb file.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Now, console messages looks as following:<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><…><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">PCI: 00:1f.0 [8086/1f38] enabled<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">PCI: 00:1f.3 [8086/1f3c] enabled<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">PCI: pci_scan_bus for bus 01<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">PCI: 01:00.0 [10ee/7011] enabled<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">PCIE CLK PM is not supported by endpointASPM: Enabled None<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">scan_bus: scanning of bus PCI: 00:02.0 took 5054 usecs<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">PNP: 002e.0 enabled<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">PNP: 002e.1 disabled<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">PNP: 002e.8 disabled<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><…><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">PCI: 01:00.0 init ...<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">OXE: Set Bus Master on FPGA.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">PCI: 01:00.0 init finished in 2148 usecs<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">PNP: 002e.0 init ...<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">EXAR: Enter init()<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">EXAR: Get Device ID 0xffff<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">PNP: 002e.0 init finished in 2841 usecs<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Devices initialized<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><…><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Now, I have to see why Device ID is returned with a wrong value.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Best regards,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Patrick Agrain<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span lang="FR" style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">De :</span></b><span lang="FR" style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> coreboot [mailto:coreboot-bounces@coreboot.org]
<b>De la part de</b> Agrain Patrick<br>
<b>Envoyé :</b> jeudi 29 décembre 2016 13:49<br>
<b>À :</b> coreboot@coreboot.org<br>
<b>Objet :</b> Re: [coreboot] How to add a new SuperIO ?<o:p></o:p></span></p>
</div>
</div>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Hello all,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">I’ve pushed the code to support the EXAR SuperIO XR28V382.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">It is marked “[WIP]” with “XR28V382” in the title.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Can anybody have a look at it and meaby point me to a bug, missing configuration or other… that could explain the messages on the console displayed below ?<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Thanks.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Patrick Agrain<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
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<div style="border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0cm 0cm 0cm">
<p class="MsoNormal"><b><span lang="FR" style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">De :</span></b><span lang="FR" style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> coreboot [<a href="mailto:coreboot-bounces@coreboot.org">mailto:coreboot-bounces@coreboot.org</a>]
<b>De la part de</b> Agrain Patrick<br>
<b>Envoyé :</b> jeudi 29 décembre 2016 09:43<br>
<b>À :</b> ron minnich; <a href="mailto:coreboot@coreboot.org">coreboot@coreboot.org</a><br>
<b>Objet :</b> Re: [coreboot] How to add a new SuperIO ?<o:p></o:p></span></p>
</div>
</div>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Hi Ron,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Thanks for the advice.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">It would be the first time that I will push code into a GIT project with Gerrit. Therefore, let me a few moment to gather all required information to perform
this without disturbance for others.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">For the moment, I pulled the Coreboot project and add/modify the required files. Platform build is OK.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Now, the push… if you have any checklist to follow, it could be helpful.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Best regards,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Patrick Agrain<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<div style="border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0cm 0cm 0cm">
<p class="MsoNormal"><b><span lang="FR" style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">De :</span></b><span lang="FR" style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> ron minnich [<a href="mailto:rminnich@gmail.com">mailto:rminnich@gmail.com</a>]
<br>
<b>Envoyé :</b> vendredi 16 décembre 2016 19:18<br>
<b>À :</b> Agrain Patrick; <a href="mailto:coreboot@coreboot.org">coreboot@coreboot.org</a><br>
<b>Objet :</b> Re: [coreboot] How to add a new SuperIO ?<o:p></o:p></span></p>
</div>
<p class="MsoNormal"><o:p> </o:p></p>
<div>
<p class="MsoNormal">it's way easier if you push your changes to gerrit marked as a WIP. People can see the code and will likely spot any problems very quickly.<o:p></o:p></p>
</div>
<p class="MsoNormal"><o:p> </o:p></p>
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<div>
<p class="MsoNormal">On Fri, Dec 16, 2016 at 12:40 AM Agrain Patrick <<a href="mailto:patrick.agrain@al-enterprise.com">patrick.agrain@al-enterprise.com</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal">Hi all,<br>
<br>
I'm trying to add a new superIO chip to the source tree.<br>
The chip is an EXAR XR28V932.<br>
I tried to take example of the existing superIO chips, like the i3100 and it8716 to compose a correct source tree as following:<br>
[agrain1@frilldlin059 coreboot]$ ls -als ./src/superio/exar/xr28v382/<br>
total 10<br>
1 drwxr-xr-x 2 agrain1 dhs2 512 Dec 16 09:03 .<br>
1 drwxr-xr-x 3 agrain1 dhs2 512 Dec 15 09:41 ..<br>
1 -rw-r--r-- 1 agrain1 dhs2 687 Dec 15 09:34 Makefile.inc<br>
3 -rw-r--r-- 1 agrain1 dhs2 2614 Dec 16 09:03 superio.c<br>
2 -rw-r--r-- 1 agrain1 dhs2 1287 Dec 15 16:28 xr28v382.h<br>
<br>
I modified the devicetree.cb of my board (based on an Intel Mohon Peak) as following:<br>
device pci 1f.0 on end # LPC bridge<br>
chip superio/exar/xr28v382 # Super I/O<br>
device pnp 2e.0 on # Com1<br>
io 0x60 = 0x3f8<br>
irq 0x70 = 4<br>
end<br>
device pnp 2e.1 off # Com2<br>
end<br>
device pnp 2e.8 off # Watchdog<br>
end<br>
end<br>
device pci 1f.3 on end # SMBus 0<br>
<br>
Now the output of the console log (DEBUG level):<br>
<...><br>
PCI: pci_scan_bus for bus 00<br>
PCI: 00:00.0 [8086/1f0f] enabled<br>
PCI: Static device PCI: 00:01.0 not found, disabling it.<br>
child PNP: 002e.0 not a PCI device<br>
child PNP: 002e.1 not a PCI device<br>
child PNP: 002e.8 not a PCI device<br>
child PNP: 002e.0 not a PCI device<br>
child PNP: 002e.1 not a PCI device<br>
child PNP: 002e.8 not a PCI device<br>
child PNP: 002e.0 not a PCI device<br>
child PNP: 002e.1 not a PCI device<br>
child PNP: 002e.8 not a PCI device<br>
child PNP: 002e.0 not a PCI device<br>
<...><br>
PCI: 00:1f.0 [8086/1f38] enabled<br>
child PNP: 002e.0 not a PCI device<br>
child PNP: 002e.1 not a PCI device<br>
child PNP: 002e.8 not a PCI device<br>
child PNP: 002e.0 not a PCI device<br>
child PNP: 002e.1 not a PCI device<br>
child PNP: 002e.8 not a PCI device<br>
child PNP: 002e.0 not a PCI device<br>
child PNP: 002e.1 not a PCI device<br>
child PNP: 002e.8 not a PCI device<br>
PCI: 00:1f.3 [8086/1f3c] enabled<br>
child PNP: 002e.0 not a PCI device<br>
<...><br>
PCI: Left over static devices:<br>
PNP: 002e.0<br>
PNP: 002e.1<br>
PNP: 002e.8<br>
PCI: Check your devicetree.cb.<br>
PCI: pci_scan_bus for bus 01<br>
<...><br>
DOMAIN: 0000 (Intel Rangeley Northbridge)<br>
PCI: 00:00.0 (Intel Rangeley Northbridge)<br>
PCI: 00:01.0 (Intel Rangeley Northbridge)<br>
PCI: 00:02.0 (Intel Rangeley Northbridge)<br>
PCI: 00:03.0 (Intel Rangeley Northbridge)<br>
PCI: 00:04.0 (Intel Rangeley Northbridge)<br>
PCI: 00:0b.0 (Intel Rangeley Southbridge)<br>
PCI: 00:0e.0 (Intel Rangeley Southbridge)<br>
PCI: 00:13.0 (Intel Rangeley Southbridge)<br>
PCI: 00:14.0 (Intel Rangeley Southbridge)<br>
PCI: 00:14.1 (Intel Rangeley Southbridge)<br>
PCI: 00:14.2 (Intel Rangeley Southbridge)<br>
PCI: 00:14.3 (Intel Rangeley Southbridge)<br>
PCI: 00:16.0 (Intel Rangeley Southbridge)<br>
PCI: 00:17.0 (Intel Rangeley Southbridge)<br>
PCI: 00:18.0 (Intel Rangeley Southbridge)<br>
PCI: 00:1f.0 (Intel Rangeley Southbridge)<br>
PNP: 002e.0 (EXAR XR28V382 Super I/O)<br>
PNP: 002e.1 (EXAR XR28V382 Super I/O)<br>
PNP: 002e.8 (EXAR XR28V382 Super I/O)<br>
PCI: 00:1f.3 (Intel Rangeley Southbridge)<br>
PCI: 00:0f.0 (unknown)<br>
PCI: 01:00.0 (unknown)<br>
<br>
I guess that the "" are not normal, isn't it ?<br>
And so the " Check your devicetree.cb." ?<br>
Moreover, I put a printk() in the init function of the chip and do not see it in the log.<br>
What particular point should I also check to be sure that I do not miss anything ?<br>
<br>
Thanks for your help.<br>
Best regards,<br>
Patrick Agrain<br>
<br>
--<br>
coreboot mailing list: <a href="mailto:coreboot@coreboot.org" target="_blank">coreboot@coreboot.org</a><br>
<a href="https://www.coreboot.org/mailman/listinfo/coreboot" target="_blank">https://www.coreboot.org/mailman/listinfo/coreboot</a><o:p></o:p></p>
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